Commit Graph

177412 Commits

Author SHA1 Message Date
Simon Pilgrim 55f79ef9fe [TargetLowering] SimplifyDemandedBits - Remove GetDemandedSrcMask lambda. NFCI.
An older version of this could return false but now that this always succeeds we can just inline and simplify it.

llvm-svn: 357999
2019-04-09 12:29:26 +00:00
Anton Afanasyev 03c3e0d3bf Improve hashing for time profiler
Summary:
Use optimized hashing while writing time trace by join two hashes to one.
Used for -ftime-trace option.

Reviewers: rnk, takuto.ikuta

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60404

llvm-svn: 357998
2019-04-09 12:18:44 +00:00
Simon Pilgrim 345eacd555 [TargetLowering] SimplifyDemandedBits - call SimplifyDemandedBits in bitcast handling
When bitcasting from a source op to a larger bitwidth op, split the demanded bits and OR them on top of one another and demand those merged bits in the SimplifyDemandedBits call on the source op.

llvm-svn: 357992
2019-04-09 10:27:59 +00:00
Simon Pilgrim 563f35ab2d [llvm-rtdyld] Fix missing include on MSVC builds.
llvm-svn: 357990
2019-04-09 10:15:10 +00:00
David Stenberg 2028ae975c [DebugInfo] Pass all values in DebugLocEntry's constructor, NFC
Summary:
With MergeValues() removed, amend DebugLocEntry's constructor so that it
takes multiple values rather than a single, and keep non-fragment values
in OpenRanges, as this allows some cleanup of the code in
buildLocationList().

Reviewers: aprantl, dblaikie, loladiro

Reviewed By: aprantl

Subscribers: hiraditya, llvm-commits

Tags: #debug-info, #llvm

Differential Revision: https://reviews.llvm.org/D59303

llvm-svn: 357988
2019-04-09 10:08:26 +00:00
Simon Pilgrim a30ba452c6 Fix Wdocumentation warning. NFCI.
llvm-svn: 357987
2019-04-09 09:38:25 +00:00
Hiroshi Inoue 30d3c58b81 [PowerPC] fix trivial typos in comment, NFC
llvm-svn: 357981
2019-04-09 08:40:02 +00:00
Martin Storsjo e16434a049 [CMake] Fix accidentally swapped input/output parameters of string(REPLACE) for mingw
llvm-svn: 357979
2019-04-09 08:31:25 +00:00
Justin Bogner c60d09597c [CMake] Move configuration of LLVM_CXX_STD to HandleLLVMOptions.cmake
Standalone builds of projects other than llvm itself (lldb, libcxx,
etc) include HandleLLVMOptions but not the top level llvm CMakeLists,
so we need to set this variable here to ensure that it always has a
value.

This should fix the build issues some folks have been seeing.

llvm-svn: 357976
2019-04-09 08:14:32 +00:00
David Stenberg 93b497a61d [DebugInfo] Remove redundant DebugLocEntry::MergeValues() function, NFC
Summary:
The MergeValues() function would try to merge two entries if they shared
the same beginning label. Having the same beginning label means that the
former entry's range would be empty; however, after D55919 we no longer
create entries for empty ranges, so we can no longer land in a situation
where that check in MergeValues would succeed. Instead, the "merging" is
done by keeping the live values from the preceding empty ranges in
OpenRanges, and adding them to the first non-empty range.

Reviewers: aprantl, dblaikie, loladiro

Reviewed By: aprantl

Subscribers: llvm-commits

Tags: #debug-info, #llvm

Differential Revision: https://reviews.llvm.org/D59301

llvm-svn: 357974
2019-04-09 07:46:09 +00:00
Craig Topper e043dadcad [X86] Remove check on isAsmParserOnly from EVEX2VEX tablegenerator. NFCI
There are no instructions VEX or EVEX instructions that set this field.

llvm-svn: 357973
2019-04-09 07:40:19 +00:00
Craig Topper 53ee783c6e [X86] Have EVEX2VEX tablegenerator use HasVEX_L and HasEVEX_L2 fields instead of the composite EVEX_LL field. Remove the EVEX_LL field. NFCI
The composite existed to simplify some other tablegen code and not really in an
important way. Remove the combined field and just calculate the vector size
using two ifs.

llvm-svn: 357972
2019-04-09 07:40:14 +00:00
Craig Topper f19f991b7f [X86] Use VEX_WIG for VPINSRB/W and VPEXTRB/W to match what is done for EVEX.
The instruction's document this as W0 for the VEX encoding. But there's a
footnote mentioning that VEX.W is ignored in 64-bit mode. And the main VEX
encoding description says the VEX.W bit is ignored for instructions that are
equivalent to a legacy SSE instruction that uses REX.W to select a GPR which
would apply here.

By making this match EVEX we can remove a special case of allowing EVEX2VEX to
turn an EVEX.WIG instruction into VEX.W0.

llvm-svn: 357971
2019-04-09 07:40:10 +00:00
Craig Topper 2f9c1732b8 [X86] Split the VEX_WPrefix in X86Inst tablegen class into 3 separate fields with clear meanings.
llvm-svn: 357970
2019-04-09 07:40:06 +00:00
Nikita Popov 6e9157d588 [ValueTracking] Use ConstantRange methods; NFC
Switch part of the computeOverflowForSignedAdd() implementation to
use Range.isAllNegative() rather than KnownBits.isNegative() and
similar. They do the same thing, but using the ConstantRange methods
allows dropping the KnownBits variables more easily in D60420.

llvm-svn: 357969
2019-04-09 07:13:09 +00:00
Nikita Popov 7bd7878d22 [ValueTracking] Explicitly specify intersection type; NFC
Preparation for D60420.

llvm-svn: 357968
2019-04-09 07:13:03 +00:00
Eric Christopher 88c70ec68e Include omitted word in comment.
llvm-svn: 357967
2019-04-09 06:35:47 +00:00
Fangrui Song 3f2096833a [llvm-objdump] Migrate some functions from std::error_code to Error
llvm-svn: 357965
2019-04-09 05:41:24 +00:00
Tom Stellard 206b9927f8 AMDGPU/GlobalISel: Implement call lowering for shaders returning values
Reviewers: arsenm, nhaehnle

Subscribers: kzhuravl, jvesely, wdng, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, volkan, llvm-commits

Differential Revision: https://reviews.llvm.org/D57166

llvm-svn: 357964
2019-04-09 02:26:03 +00:00
Chen Zheng 19ce6719bc [PowerPC] initialize SchedModel according to platform.
Differential Revision: https://reviews.llvm.org/D60177

llvm-svn: 357962
2019-04-09 01:25:25 +00:00
Peter Collingbourne df57979ba7 hwasan: Enable -hwasan-allow-ifunc by default.
It's been on in Android for a while without causing problems, so it's time
to make it the default and remove the flag.

Differential Revision: https://reviews.llvm.org/D60355

llvm-svn: 357960
2019-04-09 00:25:59 +00:00
Craig Topper 6c11a31bce [X86] Derive ssmem and sdmem from X86MemOperand. NFCI
This changes the operand type from v4f32/v2f64 to iPTR which seems more correct. But that doesn't seem to do anything other than change the comments in X86GenDAGISel.inc. Probably because we use a ComplexPattern to do the matching so there's no autogenerated code to change.

llvm-svn: 357959
2019-04-09 00:24:17 +00:00
Sanjay Patel 74ccef1f4f [InstCombine] add tests for negate+sdiv; NFC
PR41425:
https://bugs.llvm.org/show_bug.cgi?id=41425

llvm-svn: 357953
2019-04-08 22:55:10 +00:00
Lang Hames d250238abd [RuntimeDyld] Fix an ambiguous make_unique call.
llvm-svn: 357950
2019-04-08 22:19:05 +00:00
Lang Hames 941f247d30 [RuntimeDyld] Decouple RuntimeDyldChecker from RuntimeDyld.
This will allow RuntimeDyldChecker (and rtdyld-check tests) to test a new JIT
linker: JITLink (https://reviews.llvm.org/D58704).

llvm-svn: 357947
2019-04-08 21:50:48 +00:00
Shoaib Meenai 867131a96c [BinaryFormat] Update Mach-O ARM64E CPU subtype and dumping
The new value is taken from <mach/machine.h> in the MacOSX10.14 SDK from
Xcode 10.1. Update llvm-objdump and llvm-readobj accordingly.

Differential Revision: https://reviews.llvm.org/D58636

llvm-svn: 357945
2019-04-08 21:37:08 +00:00
Sanjay Patel 773e04c883 [InstCombine] peek through fdiv to find a squared sqrt
A more general canonicalization between fdiv and fmul would not
handle this case because that would have to be limited by uses
to prevent 2 values from becoming 3 values:
(x/y) * (x/y) --> (x*x) / (y*y)

(But we probably should still have that limited -- but more general --
canonicalization independently of this change.)

llvm-svn: 357943
2019-04-08 21:23:50 +00:00
Simon Pilgrim 9f74df7d5b [TargetLowering] SimplifyDemandedBits - use DemandedElts in bitcast handling
Be more selective in the SimplifyDemandedBits -> SimplifyDemandedVectorElts bitcast call based on the demanded elts.

llvm-svn: 357942
2019-04-08 20:59:38 +00:00
Sanjay Patel bf1417d7e4 [InstCombine] add extra-use tests for fmul+sqrt; NFC
llvm-svn: 357939
2019-04-08 20:37:34 +00:00
Nikita Popov 15abd74de7 [InstCombine] Add more tests for signed saturing math overflow; NFC
Overflow conditions for sadd.sat and ssub.sat which can be determined
based on constant ranges, but not necessarily known bits.

llvm-svn: 357938
2019-04-08 20:02:47 +00:00
Nico Weber 63b97d2a67 llvm-undname: Fix more crashes and asserts on invalid inputs
For functions whose callers don't check that enough input is present,
add checks at the start of the function that enough input is there and
set Error otherwise.

For functions that return AST objects, return nullptr instead of
incomplete AST objects with nullptr fields if an error occurred during
the function.

Introduce a new function demangleDeclarator() for the sequence
demangleFullyQualifiedSymbolName(); demangleEncodedSymbol() and
use it in the two places that had this sequence. Let this new function
check that ConversionOperatorIdentifiers have a valid TargetType.

Some of the bad inputs found by oss-fuzz, others by inspection.

Differential Revision: https://reviews.llvm.org/D60354

llvm-svn: 357936
2019-04-08 19:46:53 +00:00
Craig Topper 3a4c2192a4 [X86] Fix a couple lowering functions that called ReplaceAllUsesOfValueWith for the newly created code and then return SDValue(). Use MERGE_VALUES instead.
Returning SDValue() makes the caller think custom lowering was unsuccessful and then it will fall back to trying to expand the original node. This expanded code will end up with no users and end up being pruned later. But it was useless unnecessary work to create it.

Instead return a MERGE_VALUES with all the results so the caller knows something changed. The caller can handle the replacements.

For one of the cases I had to use UNDEF has a dummy value for a result we know is unused. This should get pruned later.

llvm-svn: 357935
2019-04-08 19:44:07 +00:00
Adrian Prantl 6ed5706a2b Add LLVM IR debug info support for Fortran COMMON blocks
COMMON blocks are a feature of Fortran that has no direct analog in C languages, but they are similar to data sections in assembly language programming. A COMMON block is a named area of memory that holds a collection of variables. Fortran subprograms may map the COMMON block memory area to their own, possibly distinct, non-empty list of variables. A Fortran COMMON block might look like the following example.

    COMMON /ALPHA/ I, J

    For this construct, the compiler generates a new scope-like DI construct (!DICommonBlock) into which variables (see I, J above) can be placed. As the common block implies a range of storage with global lifetime, the !DICommonBlock refers to a !DIGlobalVariable. The Fortran variable that comprise the COMMON block are also linked via metadata to offsets within the global variable that stands for the entire common block.

    @alpha_ = common global %alphabytes_ zeroinitializer, align 64, !dbg !27, !dbg !30, !dbg !33
    !14 = distinct !DISubprogram(…)
    !20 = distinct !DICommonBlock(scope: !14, declaration: !25, name: "alpha")
    !25 = distinct !DIGlobalVariable(scope: !20, name: "common alpha", type: !24)
    !27 = !DIGlobalVariableExpression(var: !25, expr: !DIExpression())
    !29 = distinct !DIGlobalVariable(scope: !20, name: "i", file: !3, type: !28)
    !30 = !DIGlobalVariableExpression(var: !29, expr: !DIExpression())
    !31 = distinct !DIGlobalVariable(scope: !20, name: "j", file: !3, type: !28)
    !32 = !DIExpression(DW_OP_plus_uconst, 4)
    !33 = !DIGlobalVariableExpression(var: !31, expr: !32)

    The DWARF generated for this is as follows.

    DW_TAG_common_block:
    DW_AT_name: alpha
    DW_AT_location: @alpha_+0
    DW_TAG_variable:
    DW_AT_name: common alpha
    DW_AT_type: array of 8 bytes
    DW_AT_location: @alpha_+0
    DW_TAG_variable:
    DW_AT_name: i
    DW_AT_type: integer*4
    DW_AT_location: @Alpha+0
    DW_TAG_variable:
    DW_AT_name: j
    DW_AT_type: integer*4
    DW_AT_location: @Alpha+4

Patch by Eric Schweitz!

Differential Revision: https://reviews.llvm.org/D54327

llvm-svn: 357934
2019-04-08 19:13:55 +00:00
Steven Wu f41e70d6eb Revert [ThinLTO] Fix ThinLTOCodegenerator to export llvm.used symbols
This reverts r357931 (git commit 8b70a5c11e)

llvm-svn: 357932
2019-04-08 18:53:21 +00:00
Steven Wu 8b70a5c11e [ThinLTO] Fix ThinLTOCodegenerator to export llvm.used symbols
Summary:
ThinLTOCodeGenerator currently does not preserve llvm.used symbols and
it can internalize them. In order to pass the necessary information to the
legacy ThinLTOCodeGenerator, the input to the code generator is
rewritten to be based on lto::InputFile.

This fixes: PR41236
rdar://problem/49293439

Reviewers: tejohnson, pcc, dexonsmith

Reviewed By: tejohnson

Subscribers: mehdi_amini, inglorion, eraman, hiraditya, jkorous, dang, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60226

llvm-svn: 357931
2019-04-08 18:24:10 +00:00
Brian M. Rzycki 887865c1ad [JumpThreading] Fix incorrect fold conditional after indirectbr/callbr
Fixes bug 40992: https://bugs.llvm.org/show_bug.cgi?id=40992

There is potential for miscompiled code emitted from JumpThreading when
analyzing a block with one or more indirectbr or callbr predecessors. The
ProcessThreadableEdges() function incorrectly folds conditional branches
into an unconditional branch.

This patch prevents incorrect branch folding without fully pessimizing
other potential threading opportunities through the same basic block.

This IR shape was manually fed in via opt and is unclear if clang and the
full pass pipeline will ever emit similar code shapes.

Thanks to Matthias Liedtke for the bug report and simplified IR example.

Differential Revision: https://reviews.llvm.org/D60284

llvm-svn: 357930
2019-04-08 18:20:35 +00:00
Fangrui Song f67de6c940 [llvm-objdump] Migrate relocation handling functions from error_code to Error
llvm-svn: 357920
2019-04-08 16:24:08 +00:00
Andrea Di Biagio f6a60f1f80 [llvm-mca][scheduler-stats] Print issued micro opcodes per cycle. NFCI
It makes more sense to print out the number of micro opcodes that are issued
every cycle rather than the number of instructions issued per cycle.
This behavior is also consistent with the dispatch-stats: numbers from the two
views can now be easily compared.

llvm-svn: 357919
2019-04-08 16:05:54 +00:00
Simon Pilgrim 86844a865e [X86][AVX] Add PR34380 shuffle test cases
llvm-svn: 357914
2019-04-08 14:05:42 +00:00
Sanjay Patel 50c3b290ed [x86] make 8-bit shl undesirable
I was looking at a potential DAGCombiner fix for 1 of the regressions in D60278, and it caused severe regression test pain because x86 TLI lies about the desirability of 8-bit shift ops.

We've hinted at making all 8-bit ops undesirable for the reason in the code comment:

// TODO: Almost no 8-bit ops are desirable because they have no actual
//       size/speed advantages vs. 32-bit ops, but they do have a major
//       potential disadvantage by causing partial register stalls.

...but that leads to massive diffs and exposes all kinds of optimization holes itself.

Differential Revision: https://reviews.llvm.org/D60286

llvm-svn: 357912
2019-04-08 13:58:50 +00:00
Eugene Leviant 7671a1daa7 Use llvm::crc32 instead of crc32. NFC
llvm-svn: 357911
2019-04-08 13:40:58 +00:00
Sanjay Patel b33938df7a [InstCombine] remove overzealous assert for shuffles (PR41419)
As the TODO indicates, instsimplify could be improved.

Should fix:
https://bugs.llvm.org/show_bug.cgi?id=41419

llvm-svn: 357910
2019-04-08 13:28:29 +00:00
Simon Pilgrim b4f1bfa659 [InstCombine][X86] Expand MOVMSK to generic IR (PR39927)
First step towards removing the MOVMSK intrinsics completely - this patch expands MOVMSK to the pattern:

e.g. PMOVMSKB(v16i8 x):
%cmp = icmp slt <16 x i8> %x, zeroinitializer
%int = bitcast <16 x i8> %cmp to i16
%res = zext i16 %int to i32

Which is correctly handled by ISel and FastIsel (give or take an annoying movzx move....): https://godbolt.org/z/rkrSFW

Differential Revision: https://reviews.llvm.org/D60256

llvm-svn: 357909
2019-04-08 13:17:51 +00:00
Nico Weber b743b45ebf gn build: Merge r357905
llvm-svn: 357907
2019-04-08 12:43:46 +00:00
Nico Weber c83ef47c63 gn-build: Re-run `git ls-files '*.gn' '*.gni' | xargs llvm/utils/gn/gn.py format`
llvm-svn: 357906
2019-04-08 12:42:37 +00:00
Eugene Leviant 18873b22be Attempt to recommit r357901
llvm-svn: 357905
2019-04-08 12:31:12 +00:00
Chen Zheng 923c7c9daa [InstCombine] sdiv exact flag fixup.
Differential Revision: https://reviews.llvm.org/D60396

llvm-svn: 357904
2019-04-08 12:08:03 +00:00
Xing GUO 0df95d2d31 [llvm-readobj] Use `reinterpret_cast` instead of C-style casting. NFC.
llvm-svn: 357903
2019-04-08 11:48:36 +00:00
Eugene Leviant 03d28a4490 Reverting r357901 as fails to build on some of the buildbots
llvm-svn: 357902
2019-04-08 11:37:20 +00:00
Eugene Leviant ad69bd6870 [Support] Add zlib independent CRC32
Differential revision: https://reviews.llvm.org/D59816

llvm-svn: 357901
2019-04-08 11:25:48 +00:00
Roman Lebedev eb1a156d7f [llvm-exegesis] benchmarkMain(): less cryptic error if built w/o libpfm
Wanted to check if inablility to measure latency of CMOV32rm
is a regression from D60041 / D60138, but unable to do that
because the llvm-exegesis-{8,9} from debian sid fails
with that cryptic, unhelpful error.

I suspect this will be a better error.

llvm-svn: 357900
2019-04-08 10:50:31 +00:00
Justin Bogner 25de7691a0 [CMake] Replace LLVM_ENABLE_CXX1Y and friends with LLVM_CXX_STD
Simplify building with particular C++ standards by replacing the
specific "enable standard X" flags with a flag that allows specifying
the standard you want directly.

We preserve compatibility with the existing flags so that anyone with
those flags in existing caches won't break mysteriously.

Differential Revision: https://reviews.llvm.org/D60399

llvm-svn: 357899
2019-04-08 10:19:17 +00:00
Roman Lebedev a82235843b [llvm-exegesis][X86] Randomize CMOVcc/SETcc OPERAND_COND_CODE CondCodes
Reviewers: courbet, gchatelet

Reviewed By: gchatelet

Subscribers: tschuett, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60066

llvm-svn: 357898
2019-04-08 10:11:00 +00:00
Pavel Labath aaff480c68 Object/Minidump: Add support for reading the ModuleList stream
Summary:
The ModuleList stream consists of an integer giving the number of
entries in the list, followed by the list itself. Each entry in the list
describes a module (dynamically loaded objects which were loaded in the
process when it crashed (or when the minidump was generated).

The code for reading the list is relatively straight-forward, with a
single gotcha. Some minidump writers are emitting padding after the
"count" field in order to align the subsequent list on 8 byte boundary
(this depends on how their ModuleList type was defined and the native
alignment of various types on their platform). Fortunately, the minidump
format contains enough redundancy (in the form of the stream length
field in the stream directory), which allows us to detect this situation
and correct it.

This patch just adds the ability to parse the stream. Code for
conversion to/from yaml will come in a follow-up patch.

Reviewers: zturner, amccarth, jhenderson, clayborg

Subscribers: jdoerfert, markmentovai, lldb-commits, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60121

llvm-svn: 357897
2019-04-08 09:57:29 +00:00
Chen Zheng edf91ed855 [InstCombine] add more testcases for sdiv exact flag fixup.
llvm-svn: 357894
2019-04-08 09:19:42 +00:00
Craig Topper 6a6da233b9 [X86] Make LowerOperationWrapper more robust. Remove now unnecessary ReplaceAllUsesWith from LowerMSCATTER.
Previously LowerOperationWrapper took the number of results from the original
node and counted that many results from the new node. This was intended to drop
chain operands from FP_TO_SINT lowering that uses X87 with memory operations to
stack temporaries. The final load had an extra chain output that needs to be
ignored.

Unfortunately, it didn't work with scatter which has 2 result operands, the
mask output which is discarded and a chain output. The chain output is the one
that is needed but it comes second and it would be dropped by the previous
logic here. To workaround this we were doing a ReplaceAllUses in the lowering
code so that the generic legalization code wouldn't see any uses to replace
since it had been given the wrong result/type.

After this change we take the LowerOperation result directly if the original
node has one result. This allows us to directly return the chain from scatter
or the load data from the FP_TO_SINT case. When the original node has multiple
results we'll ensure the returned node has the same number and copy them over.
For cases where the original node has multiple results and the new code for some
reason has even more results, MERGE_VALUES can be used to pass only the needed
results.

llvm-svn: 357887
2019-04-08 07:39:17 +00:00
Fangrui Song dc1f4a6764 [ConstantRange] Delete redundnt {z,s}extOrSelf for multiplication
These calls are redundant because the quotients have the same BitWidth
as MinValue/MaxValue.

llvm-svn: 357886
2019-04-08 07:29:24 +00:00
Chen Zheng d3b1d74624 [InstCombine] add testcases for sdiv exact flag fixing - NFC.
llvm-svn: 357884
2019-04-08 05:49:15 +00:00
Chen Zheng c84107612a [InstCombine]add testcase for sdiv canonicalizetion - NFC
llvm-svn: 357883
2019-04-08 03:07:32 +00:00
Craig Topper afb6b42691 [X86] Split floating point tests out of atomic-mi.ll into atomic-fp.ll. Add avx and avx512f command lines. NFC
llvm-svn: 357882
2019-04-08 01:54:27 +00:00
Craig Topper 8aeefe3149 [X86] Add avx and avx512f command lines to atomic-non-integer.ll. NFC
llvm-svn: 357881
2019-04-08 01:54:24 +00:00
Fangrui Song 996b90932a [llvm-objdump] Fix MC/ARM/arm-macho-calls.s
llvm-svn: 357880
2019-04-08 01:22:38 +00:00
Nikita Popov f38b46ffca [ConstantRange] Add signed/unsigned unionWith()
This extends D59959 to unionWith(), allowing to specify that a
non-wrapping unsigned/signed range is preferred. This is somewhat
less useful than the intersect case, because union operations are
rarer. An example use would the the phi union computed in SCEV.

The implementation is mostly a straightforward use of getPreferredRange(),
but I also had to adjust some <=/< checks to make sure that no ranges with
lower==upper get constructed before they're passed to getPreferredRange(),
as these have additional constraints.

Differential Revision: https://reviews.llvm.org/D60377

llvm-svn: 357876
2019-04-07 20:20:24 +00:00
Craig Topper 424417da79 [X86] Use (SUBREG_TO_REG (MOV32rm)) for extloadi64i8/extloadi64i16 when the load is 4 byte aligned or better and not volatile.
Summary:
Previously we would use MOVZXrm8/MOVZXrm16, but those are longer encodings.

This is similar to what we do in the loadi32 predicate.

Reviewers: RKSimon, spatel

Reviewed By: RKSimon

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60341

llvm-svn: 357875
2019-04-07 19:19:44 +00:00
Nikita Popov c664c2a5ec [ConstantRangeTest] Generalize intersection testing code; NFC
Extract the exhaustive intersection tests into a separate function,
so that it may be reused for unions as well.

llvm-svn: 357874
2019-04-07 18:55:45 +00:00
Nikita Popov 4246106aba [ConstantRange] Add unsigned and signed intersection types
The intersection of two ConstantRanges may consist of two disjoint
ranges. As we can only return one range as the result, we need to
return one of the two possible ranges that cover both. Currently the
result is picked based on set size. However, this is not always
optimal: If we're in an unsigned context, we'd prefer to get a large
unsigned range over a small signed range -- the latter effectively
becomes a full set in the unsigned domain.

This revision adds a PreferredRangeType, which can be either Smallest,
Unsigned or Signed. Smallest is the current behavior and Unsigned and
Signed are new variants that prefer not to wrap the unsigned/signed
domain. The new type isn't used anywhere yet (but SCEV will be a good
first user, see D60035).

I've also added some comments to illustrate the various cases in
intersectWith(), which should hopefully make it more obvious what is
going on.

Differential Revision: https://reviews.llvm.org/D59959

llvm-svn: 357873
2019-04-07 18:44:36 +00:00
Robert Widmann a51883cfab [LLVM-C] Allow Access to the Type of a Binary
Summary:  Add an accessor for the type of a binary file.

Reviewers: whitequark, deadalnix

Reviewed By: whitequark

Subscribers: hiraditya, aheejin, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60366

llvm-svn: 357872
2019-04-07 18:18:42 +00:00
Nikita Popov bad648a23e [ConstantRange] Add isAllNegative() and isAllNonNegative() methods
Add isAllNegative() and isAllNonNegative() methods to ConstantRange,
which determine whether all values in the constant range are
negative/non-negative.

This is useful for replacing KnownBits isNegative() and isNonNegative()
calls when changing code to use constant ranges.

Differential Revision: https://reviews.llvm.org/D60264

llvm-svn: 357871
2019-04-07 17:52:40 +00:00
Nikita Popov 3db93ac5d6 Reapply [ValueTracking] Support min/max selects in computeConstantRange()
Add support for min/max flavor selects in computeConstantRange(),
which allows us to fold comparisons of a min/max against a constant
in InstSimplify. This fixes an infinite InstCombine loop, with the
test case taken from D59378.

Relative to the previous iteration, this contains some adjustments for
AMDGPU med3 tests: The AMDGPU target runs InstSimplify prior to codegen,
which ends up constant folding some existing med3 tests after this
change. To preserve these tests a hidden -amdgpu-scalar-ir-passes option
is added, which allows disabling scalar IR passes (that use InstSimplify)
for testing purposes.

Differential Revision: https://reviews.llvm.org/D59506

llvm-svn: 357870
2019-04-07 17:22:16 +00:00
Fangrui Song 32087b65e7 [llvm-objdump] Split disassembleObject and simplify --{start,stop}-address handling
The main disassembly loop is hard to read due to special handling of ARM
ELF data & ELF data. Split off the logic into two functions
dumpARMELFData and dumpELFData. Hoist some checks outside of the loop.

--start-address --stop-address have redundant checks and minor off-by-1
issues. Fix them.

llvm-svn: 357869
2019-04-07 16:33:24 +00:00
Chris Lattner 32a8e742e2 last changes for now
llvm-svn: 357868
2019-04-07 14:34:24 +00:00
Chris Lattner 0fa6c15873 various improvements in wording, also unbreak the bot
llvm-svn: 357867
2019-04-07 14:23:11 +00:00
Fangrui Song c4c8bcaeec [DWARF] DWARFDebugLine: delete unused parameter `Offset`
llvm-svn: 357866
2019-04-07 13:56:14 +00:00
Chris Lattner 13d3505a86 make a bunch of cleanups in wording and tone
llvm-svn: 357865
2019-04-07 13:42:29 +00:00
Simon Pilgrim 6d7fdd9ab7 [CostModel][X86] Masked load legalization requires an binary-shuffle not a select (PR39812)
Expansion/truncation is better described by SK_PermuteTwoSrc than SK_Select

llvm-svn: 357864
2019-04-07 13:26:09 +00:00
Chris Lattner 2243a165b1 remove some unhelpful language from the tutorial
llvm-svn: 357863
2019-04-07 13:17:16 +00:00
Chris Lattner d80f118e52 Copy the C++ kaleidoscope tutorial into a subdirectory and clean up various things, aligning with the direction of the WiCT workshop, and Meike Baumgärtner's view of how this should work. The old version of the documentation is unmodified, this is an experiment.
llvm-svn: 357862
2019-04-07 13:14:23 +00:00
Simon Pilgrim 561ba38623 [DAG] Pull out ComputeNumSignBits call to make debugging easier. NFCI.
llvm-svn: 357861
2019-04-07 11:49:33 +00:00
Simon Pilgrim 07adb6abda [X86][SSE] SimplifyDemandedBitsForTargetNode - Add initial PACKSS support
In the case where we only want the sign bit (e.g. when using PACKSS truncation of comparison results for MOVMSK) then we can just demand the sign bit of the source operands.

This makes use of the fact that PACKSS saturates out of range values to the min/max int values - so the sign bit is always preserved.

Differential Revision: https://reviews.llvm.org/D60333

llvm-svn: 357859
2019-04-07 10:40:01 +00:00
Fangrui Song 47a7662e29 [llvm-objdump] Fix split of source lines; don't ltrim source lines
If the file does not end with a newline, it may be dropped. Fix the
splitting algorithm.

Also delete an unnecessary SourceCache lookup.

llvm-svn: 357858
2019-04-07 10:16:46 +00:00
Fangrui Song af7314b317 [llvm-objdump] Simplify some ELF typename: ELFFile<ELFT>::Elf_xxx -> ELFT::xxx
llvm-svn: 357857
2019-04-07 08:29:04 +00:00
Fangrui Song 454a7bb372 .
llvm-svn: 357856
2019-04-07 08:28:56 +00:00
Fangrui Song e7834bd159 [llvm-objdump] Simplify Expected<T> handling with unwrapOrError
llvm-svn: 357855
2019-04-07 08:19:55 +00:00
Marcello Maggioni 30eb575811 [ConstantRange] Shl considers full-set shifting to last bit position.
if we do SHL of two 16-bit ranges like [0, 30000) with [1,2) we get
"full-set" instead of what I would have expected [0, 60000) which is
still in the 16-bit unsigned range.

This patch changes the SHL algorithm to allow getting a usable range
even in this case.

Differential Revision: https://reviews.llvm.org/D57983

llvm-svn: 357854
2019-04-07 06:12:44 +00:00
Fangrui Song 545ed223a6 [llvm-objdump] Simplify disassembleObject
* Use std::binary_search to replace some std::lower_bound
* Use llvm::upper_bound to replace some std::upper_bound
* Use format_hex and support::endian::read{16,32}

llvm-svn: 357853
2019-04-07 05:32:16 +00:00
Fangrui Song 6a0746a92f Change some StringRef::data() reinterpret_cast to bytes_begin() or arrayRefFromStringRef()
llvm-svn: 357852
2019-04-07 03:58:42 +00:00
Petr Hosek bcb29cb748 [gn] Support for per-target runtime directory layout
This change also introduces the clang_enable_per_target_runtime_dir
to enable the use of per-target runtime directory layout which is the
equivalent of LLVM_ENABLE_PER_TARGET_RUNTIME_DIR CMake option.

Differential Revision: https://reviews.llvm.org/D60332

llvm-svn: 357850
2019-04-06 23:05:56 +00:00
Nick Lewycky 383419f707 [NFC] Fix typo in comment.
llvm-svn: 357849
2019-04-06 22:05:24 +00:00
Craig Topper 399102b464 [X86] When converting (x << C1) AND C2 to (x AND (C2>>C1)) << C1 during isel, try using andl over andq by favoring 32-bit unsigned immediates.
llvm-svn: 357848
2019-04-06 19:00:11 +00:00
Simon Pilgrim d0a53d4914 [X86] combineBitcastvxi1 - provide dst VT and src SDValue directly. NFCI.
Prep work to make it easier to reuse the BITCAST->MOVSMK combine in other cases.

llvm-svn: 357847
2019-04-06 18:54:17 +00:00
Craig Topper f9b9f8d2e4 [X86] Use a signed mask in foldMaskedShiftToScaledMask to enable a shorter immediate encoding.
This function reorders AND and SHL to enable the SHL to fold into an LEA. The
upper bits of the AND will be shifted out by the SHL so it doesn't matter what
mask value we use for these bits. By using sign bits from the original mask in
these upper bits we might enable a shorter immediate encoding to be used.

llvm-svn: 357846
2019-04-06 18:00:50 +00:00
Craig Topper 82448bc09e [X86] Add test cases to show missed opportunities to use a sign extended 8 or 32 bit immediate AND when reversing SHL+AND to form an LEA.
When we shift the AND mask over we should shift in sign bits instead of zero bits. The scale in the LEA will shift these bits out so it doesn't matter whether we mask the bits off or not. Using sign bits will potentially allow a sign extended immediate to be used.

Also add some other test cases for cases that are currently optimal.

llvm-svn: 357845
2019-04-06 18:00:45 +00:00
Craig Topper 9d7379c250 [X86] Autogenerate complete checks. NFC
llvm-svn: 357844
2019-04-06 18:00:41 +00:00
Simon Pilgrim af1cbdd3ba Fix spelling mistake. NFCI.
llvm-svn: 357843
2019-04-06 15:38:34 +00:00
Simon Pilgrim ec28615f7f [X86] Add AVX-target expandload and compressstore tests
llvm-svn: 357842
2019-04-06 14:40:52 +00:00
Roman Lebedev 404bdb1c9e [llvm-exegesis][X86] Handle CMOVcc/SETcc OPERAND_COND_CODE OperandType
Summary:
D60041 / D60138 refactoring changed how CMOV/SETcc opcodes
are handled. concode is now an immediate, with it's own operand type.

This at least allows to not crash on the opcode.
However, this still won't generate all the snippets
with all the condcode enumerators. D60066 does that.

Reviewers: courbet, gchatelet

Reviewed By: gchatelet

Subscribers: tschuett, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60057

llvm-svn: 357841
2019-04-06 14:16:26 +00:00
Simon Pilgrim d23611f9ad [X86] Split expandload and compressstore tests
llvm-svn: 357840
2019-04-06 14:14:54 +00:00
Simon Pilgrim 18a8a64c9f [X86][SSE] Add more exhaustive masked load/store tests
Reordered/renamed some existing tests to match the cleaned up order

llvm-svn: 357839
2019-04-06 14:01:37 +00:00
Simon Pilgrim 2ea8dbf564 [CostModel][X86] Add more exhaustive masked load/store/gather/scatter/expand/compress cost tests
llvm-svn: 357838
2019-04-06 12:08:37 +00:00
Stanislav Mekhanoshin 5182302a37 [AMDGPU] Sort out and rename multiple CI/VI predicates
Differential Revision: https://reviews.llvm.org/D60346

llvm-svn: 357835
2019-04-06 09:20:48 +00:00
Fangrui Song 4be8629e49 [DWARF] Simplify DWARFDebugAranges::findAddress
The current lower_bound approach has to check two iterators pos and pos-1.
Changing it to upper_bound allows us to check one iterator (similar to
DWARFUnitVector::getUnitFor*).

llvm-svn: 357834
2019-04-06 09:12:53 +00:00
Fangrui Song cb300f1243 [Symbolize] Uniquify sorted vector<pair<SymbolDesc, StringRef>>
llvm-svn: 357833
2019-04-06 02:18:56 +00:00
Nico Weber ad8d06b687 gn build: Pacify `gn format`
llvm-svn: 357830
2019-04-05 23:57:10 +00:00
Zachary Turner cb70fe1c69 [PDB Docs] Add documentation for the hash table format.
llvm-svn: 357826
2019-04-05 22:09:30 +00:00
Zachary Turner 91d6caf6ec [PDB Docs] The IPI Stream actually has index 4.
llvm-svn: 357825
2019-04-05 22:09:14 +00:00
Robert Widmann c76b621530 [LLVM-C] Begin to Expose A More General Binary Interface
Summary:
Provides a new type, `LLVMBinaryRef`, and a binding to `llvm::object::createBinary` for more general interoperation with binary files than `LLVMObjectFileRef`.  It also provides the proper non-consuming API for input buffers and populates an out parameter for error handling if necessary - two things the previous API did not do.

In a follow-up, I'll define section and symbol iterators and begin to build upon the existing test infrastructure.

This patch is a first step towards deprecating that API and replacing it with something more robust.

Reviewers: deadalnix, whitequark

Reviewed By: whitequark

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60322

llvm-svn: 357822
2019-04-05 21:36:50 +00:00
Petr Hosek 40442658db [gn] Support for building compiler-rt builtins
This is support for building compiler-rt builtins, The library build
should be complete for a subset of supported platforms, but not all
CMake options have been replicated in GN.

We always use the just built compiler to build all the runtimes, which
is equivalent to the CMake runtimes build. This simplifies the build
configuration because we don't need to support arbitrary host compiler
and can always assume the latest Clang. With GN's toolchain support,
this is significantly more efficient than the CMake runtimes build.

Differential Revision: https://reviews.llvm.org/D60331

llvm-svn: 357821
2019-04-05 21:30:40 +00:00
Daniel Sanders ab8c60867b [globalisel] Allow combiners to query legality
llvm-svn: 357820
2019-04-05 21:22:17 +00:00
Zachary Turner bcf7f3c573 [PDB Docs] Delete * LINKER * Stream information.
This is actually just a module debug info stream, so it should
technically be covered by a discussion of the module list.

llvm-svn: 357819
2019-04-05 21:16:00 +00:00
Sanjay Patel c538c50113 [InstCombine] add more tests for fmul+fdiv+sqrt; NFC
llvm-svn: 357816
2019-04-05 20:54:35 +00:00
Daniel Sanders d7489c38f9 [globalisel] Support 3-type legalForCartesianProduct()
llvm-svn: 357815
2019-04-05 20:47:13 +00:00
Robert Widmann b4baa5602d [LLVM-C] Add bindings to insert basic blocks
Summary:
Now that we can create standalone basic blocks, it's useful to be able to append them.  Add bindings to

- Insert a basic block after the current insertion block
- Append a basic block to the end of a function's list of basic blocks

Reviewers: whitequark, deadalnix, harlanhaskins

Reviewed By: whitequark, harlanhaskins

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D59658

llvm-svn: 357812
2019-04-05 20:32:43 +00:00
Francis Visoiu Mistrih 9d9d1b6b2b [X86] Enable tail calls for CallingConv::Swift
It's currently only enabled on AArch64 (enabled in r281376).

llvm-svn: 357809
2019-04-05 20:18:25 +00:00
Francis Visoiu Mistrih ab051a378c [X86] Preserve operand flag when expanding TCRETURNri
The expansion of TCRETURNri(64) would not keep operand flags like
undef/renamable/etc. which can result in machine verifier issues.

Also add plumbing to be able to use `-run-pass=x86-pseudo`.

llvm-svn: 357808
2019-04-05 20:18:21 +00:00
Stanislav Mekhanoshin c8f78f8dd3 [AMDGPU] Add MachineDCE pass after RenameIndependentSubregs
Detect dead lanes can create some dead defs. Then RenameIndependentSubregs
will break a REG_SEQUENCE which may use these dead defs. At this point
a dead instruction can be removed but we do not run a DCE anymore.

MachineDCE was only running before live variable analysis. The patch
adds a mean to preserve LiveIntervals and SlotIndexes in case it works
past this.

Differential Revision: https://reviews.llvm.org/D59626

llvm-svn: 357805
2019-04-05 20:11:32 +00:00
Craig Topper 80aa2290fb [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand.
Summary:
This avoids needing an isel pattern for each condition code. And it removes translation switches for converting between Jcc instructions and condition codes.

Now the printer, encoder and disassembler take care of converting the immediate. We use InstAliases to handle the assembly matching. But we print using the asm string in the instruction definition. The instruction itself is marked IsCodeGenOnly=1 to hide it from the assembly parser.

Reviewers: spatel, lebedev.ri, courbet, gchatelet, RKSimon

Reviewed By: RKSimon

Subscribers: MatzeB, qcolombet, eraman, hiraditya, arphaman, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60228

llvm-svn: 357802
2019-04-05 19:28:09 +00:00
Craig Topper 7323c2bf85 [X86] Merge the different SETcc instructions for each condition code into single instructions that store the condition code as an operand.
Summary:
This avoids needing an isel pattern for each condition code. And it removes translation switches for converting between SETcc instructions and condition codes.

Now the printer, encoder and disassembler take care of converting the immediate. We use InstAliases to handle the assembly matching. But we print using the asm string in the instruction definition. The instruction itself is marked IsCodeGenOnly=1 to hide it from the assembly parser.

Reviewers: andreadb, courbet, RKSimon, spatel, lebedev.ri

Reviewed By: andreadb

Subscribers: hiraditya, lebedev.ri, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60138

llvm-svn: 357801
2019-04-05 19:27:49 +00:00
Craig Topper e0bfeb5f24 [X86] Merge the different CMOV instructions for each condition code into single instructions that store the condition code as an immediate.
Summary:
Reorder the condition code enum to match their encodings. Move it to MC layer so it can be used by the scheduler models.

This avoids needing an isel pattern for each condition code. And it removes
translation switches for converting between CMOV instructions and condition
codes.

Now the printer, encoder and disassembler take care of converting the immediate.
We use InstAliases to handle the assembly matching. But we print using the
asm string in the instruction definition. The instruction itself is marked
IsCodeGenOnly=1 to hide it from the assembly parser.

This does complicate the scheduler models a little since we can't assign the
A and BE instructions to a separate class now.

I plan to make similar changes for SETcc and Jcc.

Reviewers: RKSimon, spatel, lebedev.ri, andreadb, courbet

Reviewed By: RKSimon

Subscribers: gchatelet, hiraditya, kristina, lebedev.ri, jdoerfert, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60041

llvm-svn: 357800
2019-04-05 19:27:41 +00:00
Petr Hosek d77fd4d4a1 [gn] Rebase paths in symlink_or_copy against root_build_dir
We should be always rebasing paths against root_build_dir which is
the directory where scripts are run from, not root_out_dir which is
the current toolchain directory. The latter can result in invalid
paths when the action is being used from a non-default toolchain.

Differential Revision: https://reviews.llvm.org/D60330

llvm-svn: 357798
2019-04-05 19:13:54 +00:00
Petr Hosek 60d3a6224b [gn] Make -no-exceptions flag a config
This allows it to be disabled for targets that need exceptions
like libunwind, libc++abi and libc++.

Differential Revision: https://reviews.llvm.org/D60328

llvm-svn: 357797
2019-04-05 19:12:37 +00:00
Guozhi Wei 36fc9c3107 [LCG] Add aliased functions as LCG roots
Current LCG doesn't check aliased functions. So if an internal function has a public alias it will not be added to CG SCC, but it is still reachable from outside through the alias.
So this patch adds aliased functions to SCC.

Differential Revision: https://reviews.llvm.org/D59898

llvm-svn: 357795
2019-04-05 18:51:08 +00:00
Stanislav Mekhanoshin 7895c03232 [AMDGPU] predicate and feature refactoring
We have done some predicate and feature refactoring lately but
did not upstream it. This is to sync.

Differential revision: https://reviews.llvm.org/D60292

llvm-svn: 357791
2019-04-05 18:24:34 +00:00
Zachary Turner 6eb7ab97a5 Try to fix Sphinx bot.
llvm-svn: 357790
2019-04-05 18:06:42 +00:00
Saleem Abdulrasool 50e609611c lit: make rm python 3 friendly (NFC)
Add some alterations for python 3 compatibility.

llvm-svn: 357789
2019-04-05 18:00:49 +00:00
Zachary Turner 5eeb28f8e0 [PDB Docs] Finish documentation for PDB Info Stream.
The information about the named stream map and feature codes
was not present.  This patch adds it.

llvm-svn: 357788
2019-04-05 17:59:26 +00:00
Zachary Turner d248f02795 [PDB Docs] Add info about the hash adjustment buffer.
This necessitates adding a document describing the serialized
hash table format.  This document is currently empty, although
it will be filled out in followup patches.

llvm-svn: 357784
2019-04-05 17:12:37 +00:00
Nico Weber 226a9b96a7 gn build: Merge 357768 and 357770
llvm-svn: 357783
2019-04-05 17:05:54 +00:00
Sanjay Patel 79df4454e1 [InstCombine] add tests for fdiv+fmul; NFC
llvm-svn: 357782
2019-04-05 17:00:57 +00:00
Nico Weber fbe13ccd67 gn build: Merge r357719
llvm-svn: 357781
2019-04-05 16:57:34 +00:00
Sanjay Patel 7e3e7f8040 [InstCombine] add tests for sqrt+fdiv+fmul; NFC
Examples based on recent llvm-dev thread. These are specific
patterns of more general enhancements that would solve these.

llvm-svn: 357780
2019-04-05 16:52:57 +00:00
Saleem Abdulrasool d3a85a26b6 lit: support long paths on Windows
Use ctypes to call into SHFileOperationW with the extended NT path to allow us
to remove paths which exceed 261 characters on Windows. This functionality is
exercised by swift's test suite.

llvm-svn: 357778
2019-04-05 16:48:00 +00:00
Zachary Turner 85cc79551d Add documentation for PDB TPI/IPI Stream.
llvm-svn: 357777
2019-04-05 16:43:42 +00:00
Sanjay Patel 9965f5aa70 [InstCombine] add test to show reassociation that creates a denormal constant; NFC
llvm-svn: 357776
2019-04-05 16:42:21 +00:00
Stephen Tozer bbeca849d7 Revert "[llvm-readobj] Improve error message for --string-dump"
This reverts commit 681b0798db.

Reverted due to causing build failures: llvm-svn: 357772

llvm-svn: 357774
2019-04-05 16:32:25 +00:00
Fangrui Song 2c5c12c041 Change some dyn_cast to more apropriate isa. NFC
llvm-svn: 357773
2019-04-05 16:16:23 +00:00
Stephen Tozer 681b0798db [llvm-readobj] Improve error message for --string-dump
Fixes bug 40630: https://bugs.llvm.org/show_bug.cgi?id=40630

This patch changes the error message when the section specified by
--string-dump cannot be found by including the name of the section in
the error message and changing the prefix text to not imply that the
file itself was invalid. As part of this change some uses of
std::error_code have been replaced with the llvm Error class to better
encapsulate the error info (rather than passing File strings around),
and the WithColor class replaces string literal error prefixes.

Differential Revision: https://reviews.llvm.org/D59946

llvm-svn: 357772
2019-04-05 16:15:50 +00:00
Stephen Tozer ed7f8e6509 [format] Add correct punctuation to comment
Test commit that adds a grammatically correct full stop to a single
comment.

llvm-svn: 357771
2019-04-05 15:59:07 +00:00
Guillaume Chatelet 848df5b509 Add an option do not dump the generated object on disk
Reviewers: courbet

Subscribers: llvm-commits, bdb

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60317

llvm-svn: 357769
2019-04-05 15:18:59 +00:00
Clement Courbet 1d8c9dfe03 [ExpandMemCmp][NFC] Add tests for `memcmp(p, q, n) < 0` case.
llvm-svn: 357767
2019-04-05 15:03:25 +00:00
Simon Pilgrim 17586cda4a [SelectionDAG] Add fcmp UNDEF handling to SelectionDAG::FoldSetCC
Second half of PR40800, this patch adds DAG undef handling to fcmp instructions to match the behavior in llvm::ConstantFoldCompareInstruction, this permits constant folding of vector comparisons where some elements had been reduced to UNDEF (by SimplifyDemandedVectorElts etc.).

This involves a lot of tweaking to reduced tests as bugpoint loves to reduce fcmp arguments to undef........

Differential Revision: https://reviews.llvm.org/D60006

llvm-svn: 357765
2019-04-05 14:56:21 +00:00
Matt Arsenault 106429b4e4 GlobalISel: Add another overload of buildUnmerge
It's annoying to have to create an array of the result type,
particularly when you don't care about the size of the value.

llvm-svn: 357763
2019-04-05 14:03:07 +00:00
Matt Arsenault 4ed6ccab9b AMDGPU/GlobalISel: Fix non-power-of-2 select
llvm-svn: 357762
2019-04-05 14:03:04 +00:00
Don Hinton 629daef4ba [llvm] Add isa_and_nonnull
Summary:
Add new ``isa_and_nonnull<>`` operator that works just like
the ``isa<>`` operator, except that it allows for a null pointer as an
argument (which it then returns false).

Reviewers: lattner, aaron.ballman, greened

Reviewed By: lattner

Subscribers: hubert.reinterpretcast, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60291

llvm-svn: 357761
2019-04-05 13:59:24 +00:00
Sanjay Patel 50a8652785 [DAGCombiner][x86] scalarize splatted vector FP ops
There are a variety of vector patterns that may be profitably reduced to a
scalar op when scalar ops are performed using a subset (typically, the
first lane) of the vector register file.

For x86, this is true for float/double ops and element 0 because
insert/extract is just a sub-register rename.

Other targets should likely enable the hook in a similar way.

Differential Revision: https://reviews.llvm.org/D60150

llvm-svn: 357760
2019-04-05 13:32:17 +00:00
Petar Jovanovic 2b2f35a4e9 [TextAPI] Fix off-by-one error in the bit index extraction loop
The loop in findNextSetBit() runs one pass more than it should.

On 64-bit architectures this does not cause a problem, but 32-bit
architectures mask the shift count to 5 bits which limits the number of
shifts inside a range of 0 to 31. Shifting by 32 has the same effect as
shifting by 0, so if the first bit in the set is 1, the function will return
with Index different from EndIndexVal. Because of that, range-based for
loops iterating thorough architectures will continue until hitting a 0 in
the set, resulting in n additional iterations, where n is equal to the
number of consecutive 1 bits at the start the set.

Ultimately TBDv1.WriteFile and TBDv2.WriteFile will output additional
architectures causing a failure in the unit tests.

Patch by Milos Stojanovic.

Differential Revision: https://reviews.llvm.org/D60198

llvm-svn: 357759
2019-04-05 12:58:15 +00:00
Fangrui Song afb54fd629 [Symbolize] Replace map<SymbolDesc, StringRef> with sorted vector
llvm-svn: 357758
2019-04-05 12:52:04 +00:00
Simon Pilgrim faa5b939f0 [X86][AVX] Add PR34584 masked store test cases
llvm-svn: 357757
2019-04-05 11:34:30 +00:00
Simon Pilgrim 329e63b915 [X86] Add SSE/AVX1/AVX2 masked trunc+store tests
llvm-svn: 357756
2019-04-05 11:22:28 +00:00
Pavel Labath ebdc698dbc Fix r357749 for big-endian architectures
We need to read the strings from the minidump files as little-endian,
regardless of the host byte order.

I definitely remember thinking about this case while writing the patch
(and in fact, I have implemented that for the "write" case), but somehow
I have ended up not implementing the byte swapping when reading the
data. This adds the necessary byte-swapping and should hopefully fix
test failures on big-endian bots.

llvm-svn: 357754
2019-04-05 08:43:54 +00:00
Roger Ferrer Ibanez e011e4f89c [RISCV] Implement adding a displacement to a BlockAddress
Recent change rL357393 uses MachineInstrBuilder::addDisp to add a based on a
BlockAddress but this case was not implemented.

This patch adds the missing case and a test for RISC-V that exercises the new
case.

Differential Revision: https://reviews.llvm.org/D60136

llvm-svn: 357752
2019-04-05 08:40:57 +00:00
Pavel Labath 4a6dd1e683 Fix MSVC build for r357749
MSVC found the bare "make_unique" invocation ambiguous (between std::
and llvm:: versions). Explicitly qualifying the call with llvm:: should
hopefully fix it.

llvm-svn: 357750
2019-04-05 08:26:58 +00:00
Pavel Labath 51d9fa0a22 Minidump: Add support for reading/writing strings
Summary:
Strings in minidump files are stored as a 32-bit length field, giving
the length of the string in *bytes*, which is followed by the
appropriate number of UTF16 code units. The string is also supposed to
be null-terminated, and the null-terminator is not a part of the length
field. This patch:
- adds support for reading these strings out of the minidump file (this
  implementation does not depend on proper null-termination)
- adds support for writing them to a minidump file
- using the previous two pieces implements proper (de)serialization of
  the CSDVersion field of the SystemInfo stream. Previously, this was
  only read/written as hex, and no attempt was made to access the
  referenced string -- now this string is read and written correctly.

The changes are tested via yaml2obj|obj2yaml round-trip as well as a
unit test which checks the corner cases of the string deserialization
logic.

Reviewers: jhenderson, zturner, clayborg

Subscribers: llvm-commits, aprantl, markmentovai, amccarth, lldb-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D59775

llvm-svn: 357749
2019-04-05 08:06:26 +00:00
Piotr Sobczak 0376ac1d94 [SelectionDAG] Compute known bits of CopyFromReg
Summary:
Teach SelectionDAG how to compute known bits of ISD::CopyFromReg if
the virtual reg used has one def only.

This can be particularly useful when calling isBaseWithConstantOffset()
with the ISD::CopyFromReg argument, as more optimizations may get enabled
in the result.

Also add a missing truncation on X86, found by testing of this patch.

Change-Id: Id1c9fceec862d118c54a5b53adf72ada5d6daefa

Reviewers: bogner, craig.topper, RKSimon

Reviewed By: RKSimon

Subscribers: lebedev.ri, nemanjai, jvesely, nhaehnle, javed.absar, jsji, jdoerfert, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D59535

llvm-svn: 357745
2019-04-05 07:44:09 +00:00
Craig Topper 94f1772b1e [X86] Promote i16 SRA instructions to i32
We already promote SRL and SHL to i32.

This will introduce sign extends sometimes which might be harder to deal with than the zero we use for promoting SRL. I ran this through some of our internal benchmark lists and didn't see any major regressions.

I think there might be some DAG combine improvement opportunities in the test changes here.

Differential Revision: https://reviews.llvm.org/D60278

llvm-svn: 357743
2019-04-05 06:32:50 +00:00
Serguei Katkov c39636cc2c [FastISel] Fix crash for gc.relocate lowring
Lowering safepoint checks that all gc.relocaes observed in safepoint
must be lowered. However Fast-Isel is able to skip dead gc.relocate.

To resolve this issue we just ignore dead gc.relocate in the check.

Reviewers: reames
Reviewed By: reames
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D60184

llvm-svn: 357742
2019-04-05 05:41:08 +00:00
Eric Christopher 798e83b5d6 NFC: Move API uses of MD5::MD5Result to Optional rather than a pointer.
Differential Revision: https://reviews.llvm.org/D60290

llvm-svn: 357736
2019-04-04 23:34:38 +00:00
David Callahan f498bdcebf Include invoke'd functions for recursive extract
Summary: When recursively extracting a function from a bit code file, include functions mentioned in InvokeInst as well as CallInst

Reviewers: loladiro, espindola, volkan

Reviewed By: loladiro

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60231

llvm-svn: 357735
2019-04-04 23:30:47 +00:00
Nick Lewycky a6ed16c98f An unreachable block may have a route to a reachable block, don't fast-path return that it can't.
A block reachable from the entry block can't have any route to a block that's not reachable from the entry block (if it did, that route would make it reachable from the entry block). That is the intended performance optimization for isPotentiallyReachable. For the case where we ask whether an unreachable from entry block has a route to a reachable from entry block, we can't conclude one way or the other. Fix a bug where we claimed there could be no such route.

The fix in rL357425 ironically reintroduced the very bug it was fixing but only when a DominatorTree is provided. This fixes the remaining bug.

llvm-svn: 357734
2019-04-04 23:09:40 +00:00
Juergen Ributzka 875565e559 [TextAPI] Prefix all architecture enums to fix the build on i386.
Summary: This changes the Architecture enum to use a prefix (AK_) to prevent the
preprocessor from replacing i386 with 1 when building llvm/clang for i386.

Reviewers: steven_wu, lhames, mstorsjo

Reviewed By: mstorsjo

Subscribers: hiraditya, jkorous, dexonsmith, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60241

llvm-svn: 357733
2019-04-04 22:56:50 +00:00
Evandro Menezes 85bd3978ae [IR] Refactor attribute methods in Function class (NFC)
Rename the functions that query the optimization kind attributes.

Differential revision: https://reviews.llvm.org/D60287

llvm-svn: 357731
2019-04-04 22:40:06 +00:00
Nico Weber 04347d848d Make SourceManager::createFileID(UnownedTag, ...) take a const llvm::MemoryBuffer*
Requires making the llvm::MemoryBuffer* stored by SourceManager const,
which in turn requires making the accessors for that return const
llvm::MemoryBuffer*s and updating all call sites.

The original motivation for this was to use it and fix the TODO in
CodeGenAction.cpp's ConvertBackendLocation() by using the UnownedTag
version of createFileID, and since llvm::SourceMgr* hands out a const
llvm::MemoryBuffer* this is required. I'm not sure if fixing the TODO
this way actually works, but this seems like a good change on its own
anyways.

No intended behavior change.

Differential Revision: https://reviews.llvm.org/D60247

llvm-svn: 357724
2019-04-04 21:06:41 +00:00
Scott Linder ce2b61b299 Fix some MCTargetOptions Doxygen comments (NFC)
llvm-svn: 357723
2019-04-04 20:35:57 +00:00
James Y Knight a040174418 Revert [X86] When using Win64 ABI, exit with error if SSE is disabled for varargs
It unnecessarily breaks previously-working code which used varargs,
but didn't pass any float/double arguments (such as EDK2).

Also revert the fixup on top of that:
Revert [X86] Fix a test from r357317

This reverts r357317 (git commit d413f41de6)
This reverts r357380 (git commit 7af32444b9)

llvm-svn: 357718
2019-04-04 19:05:48 +00:00
Reid Kleckner 4312fee0a9 Appease STLs where std::atomic<void*> lacks a constexpr default ctor
MSVC 2019 casts the pointer to a pointer-sized integer, which is a
reinterpret_cast, which is invalid in a constexpr context, so I have to
remove the LLVM_REQUIRES_CONSTANT_INITIALIZATION annotation for now.

llvm-svn: 357716
2019-04-04 18:45:05 +00:00
Sam Clegg 09137be7f8 [WebAssembly] Apply data relocations at runtime in shared objects
See: https://github.com/WebAssembly/tool-conventions/blob/master/DynamicLinking.md

Data section relocations in wasm shared libraries are applied by the
library itself at static constructor time.  This change adds a new
synthetic function that applies relocations to relevant memory locations
on startup.

Differential Revision: https://reviews.llvm.org/D59278

llvm-svn: 357715
2019-04-04 18:40:51 +00:00
Reid Kleckner 41fe3a54c2 Ensure that ManagedStatic is constant initialized in MSVC 2017 & 2019
Fixes PR41367.

This effectively relands r357655 with a workaround for MSVC 2017.

I tried various approaches with unions, but I ended up going with this
ifdef approach because it lets us write the proper C++11 code that we
want to write, with a separate workaround that we can delete when we
drop MSVC 2017 support.

This also adds LLVM_REQUIRE_CONSTANT_INITIALIZATION, which wraps
[[clang::require_constant_initialization]]. This actually detected a
minor issue when using clang-cl where clang wasn't able to use the
constexpr constructor in MSVC's STL, so I switched back to using the
default ctor of std::atomic<void*>.

llvm-svn: 357714
2019-04-04 18:30:07 +00:00
Sam Clegg 2a7cac932b [WebAssembly] Add new explicit relocation types for PIC relocations
See https://github.com/WebAssembly/tool-conventions/pull/106

Differential Revision: https://reviews.llvm.org/D59907

llvm-svn: 357710
2019-04-04 17:43:50 +00:00
Don Hinton 98e3954fe9 [llvm-objcopy] [llvm-symbolizer] Fix failing tests
Summary: Fix failing tests that matched substrings in path.

Reviewers: evgeny777, mattd, espindola, alexshap, rupprecht, jhenderson

Reviewed By: jhenderson

Subscribers: Bulletmagnet, emaste, arichardson, jakehehrlich, MaskRay, rupprecht, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60170

llvm-svn: 357709
2019-04-04 17:35:41 +00:00
Adrian Prantl ce2d45e7ba llvm-dwarfdump: Support alternative architecture names in the -arch filter
<rdar://problem/47918606>

llvm-svn: 357706
2019-04-04 15:48:40 +00:00
Sanjay Patel 17648b848e [x86] eliminate unnecessary broadcast of horizontal op
This is another pattern that comes up if we more aggressively
scalarize FP ops.

llvm-svn: 357703
2019-04-04 14:46:13 +00:00
Michal Gorny 1f68002cb7 [llvm] [cmake] Add additional headers only if they exist
Modify the add_header_files_for_glob() function to only add files
that do exist, rather than all matches of the glob.  This fixes CMake
error when one of the include directories (which happen to include
/usr/include) contain broken symlinks.

Differential Revision: https://reviews.llvm.org/D59632

llvm-svn: 357701
2019-04-04 14:21:38 +00:00
Lewis Revill aa79a3fe8e [RISCV] Support assembling TLS add and associated modifiers
This patch adds support in the MC layer for parsing and assembling the
4-operand add instruction needed for TLS addressing. This also involves
parsing the %tprel_hi, %tprel_lo and %tprel_add operand modifiers.

Differential Revision: https://reviews.llvm.org/D55341

llvm-svn: 357698
2019-04-04 14:13:37 +00:00
Joseph Tremoulet 9f598ac706 [COFF] Fix delay import directory iterator
Summary:
Take the Index into account in `getDelayImportTable`, otherwise we
always return the entry for the first delay DLL reference.

Reviewers: ruiu

Reviewed By: ruiu

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60081

llvm-svn: 357697
2019-04-04 14:13:28 +00:00
Jonas Paulsson c56ffed304 [SystemZ] Bugfix in isFusableLoadOpStorePattern()
This function is responsible for checking the legality of fusing an instance
of load -> op -> store into a single operation. In the SystemZ backend the
check was incomplete and a test case emerged with a cycle in the instruction
selection DAG as a result.

Instead of using the NodeIds to determine node relationships,
hasPredecessorHelper() now is used just like in the X86 backend. This handled
the failing tests and as well gave a few additional transformations on
benchmarks.

The SystemZ isFusableLoadOpStorePattern() is now a very near copy of the X86
function, and it seems this could be made a utility function in common code
instead.

Review: Ulrich Weigand
https://reviews.llvm.org/D60255

llvm-svn: 357688
2019-04-04 12:12:35 +00:00
George Rimar 5776f66580 [yaml2obj] - Check we correctly set the sh_info field of .symtab section.
initSymtabSectionHeader has the following line:
SHeader.sh_info = findLocalsNum(Symbols) + 1;

As was mentioned in a review comments for D60122,
it is never tested. The patch adds a test.

Differential revision: https://reviews.llvm.org/D60192

llvm-svn: 357687
2019-04-04 11:49:54 +00:00
Simon Pilgrim 937bc02fd6 Revert rL357655 and rL357656 from llvm/trunk:
Fix minor innaccuracy in previous comment on ManagedStaticBase
........
Make ManagedStatic constexpr constructible

Apparently it needs member initializers so that it can be constructed in
a constexpr context. I explained my investigation of this in PR41367.
........
Causes vs2017 debug llvm-tblgen to fail with "Unknown command line argument" errors - similar to the vs2019 error discussed on PR41367 without the patch....

llvm-svn: 357685
2019-04-04 11:12:30 +00:00
Fangrui Song e2622b3e33 [Symbolize] Keep SymbolDescs with the same address and improve getNameFromSymbolTable heuristic
I'll follow up with better heuristics or tests.

llvm-svn: 357683
2019-04-04 11:08:45 +00:00
Diana Picus 153c3887e4 [ARM GlobalISel] Support DBG_VALUE
Make sure we can map and select DBG_VALUE.

llvm-svn: 357681
2019-04-04 10:24:51 +00:00
Simon Pilgrim 5ad10f4df9 [SLP][X86] Regenerate operandorder tests with arguments on same line. NFCI.
Stops update_test_checks.py from splitting the later arguments after the CHECKs.

llvm-svn: 357679
2019-04-04 09:31:12 +00:00
Sander de Smalen 772e4734d9 [AArch64][AsmParser] Fix .arch_extension directive parsing
This patch fixes .arch_extension directive parsing to handle a wider
range of architecture extension options. The existing parser was parsing
extensions as an identifier which breaks for extensions containing a
"-", such as the "tlb-rmi" extension.

The extension is now parsed as a string. This is consistent with the
extension parsing in the .arch and .cpu directive parsing.

Patch by Cullen Rhodes (c-rhodes)

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D60118

llvm-svn: 357677
2019-04-04 09:11:17 +00:00
Igor Kudrin 734a2bc737 [llvm-symbolizer] Allow more flexible usage of -e.
addr2line allows -e to be grouped with other options; it also allows it
to prefix the value. Thus, all the following usages are possible:

  * addr2line -f -e <bin> <addr>
  * addr2line -fe <bin> <addr>
  * addr2line -f e<bin> <addr>
  * addr2line -fe<bin> <addr>

This patch adds the same for llvm-symbolizer.

Differential Revision: https://reviews.llvm.org/D60196

llvm-svn: 357676
2019-04-04 08:45:06 +00:00
Igor Kudrin 0fed7b0564 [llvm-symbolizer] Add `--output-style` switch.
In general, llvm-symbolizer follows the output style of GNU's addr2line.
However, there are still some differences; in particular, for a requested
address, llvm-symbolizer prints line and column, while addr2line prints
only the line number.

This patch adds a new switch to select the preferred style.

Differential Revision: https://reviews.llvm.org/D60190

llvm-svn: 357675
2019-04-04 08:39:40 +00:00
Luqman Aden 8911c5be46 [InstCombine] Combine no-wrap sub and icmp w/ constant.
Teach InstCombine the transformation `(icmp P (sub nuw|nsw C2, Y), C) -> (icmp swap(P) Y, C2-C)`

Reviewers: majnemer, apilipenko, sanjoy, spatel, lebedev.ri

Reviewed By: lebedev.ri

Subscribers: dmgreen, lebedev.ri, nikic, hiraditya, JDevlieghere, jfb, jdoerfert, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D59916

llvm-svn: 357674
2019-04-04 07:08:30 +00:00
Craig Topper 3649c20884 [X86] Use INSERT_SUBREG rather than SUBREG_TO_REG when creating LEA64_32 during isel.
SUBREG_TO_REG is supposed to be used to assert that we know the upper bits are
zero. But that isn't the case here. We've done no analysis of the inputs.

llvm-svn: 357673
2019-04-04 05:00:18 +00:00
Serguei Katkov fb44846e37 [FastISel] Fix the crash in gc.result lowering
The Fast ISel has a fallback to SelectionDAGISel in case it cannot handle the instruction.
This works as follows:
Using reverse order, try to select instruction using Fast ISel, if it cannot handle instruction it fallbacks to SelectionDAGISel
for these instructions if it is a call and continue fast instruction selections.

However if unhandled instruction is not a call or statepoint related instruction it fallbacks to SelectionDAGISel for all remaining
instructions in basic block.

However gc.result instruction is missed and as a result it is possible that gc.result is processed earlier than statepoint
causing breakage invariant the gc.results should be handled after statepoint.

Test is updated because in the current form fast-isel cannot handle ret instruction (due to i1 ret type without explicit ext)
and as a result test does not check fast-isel at all.

Reviewers: reames
Reviewed By: reames
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D60182

llvm-svn: 357672
2019-04-04 04:19:56 +00:00
David L. Jones 8b8a02175a Revert r357452 - 'SimplifyCFG SinkCommonCodeFromPredecessors: Also sink function calls without used results (PR41259)'
This revision causes tests to fail under ASAN. Since the cause of the failures
is not clear (could be ASAN, could be a Clang bug, could be a bug in this
revision), the safest course of action seems to be to revert while investigating.

llvm-svn: 357667
2019-04-04 02:27:57 +00:00
Nico Weber 3afc733e41 gn build: Merge r357663
llvm-svn: 357666
2019-04-04 02:08:10 +00:00
Sam Clegg 12011fae17 [WebAssembly] EmscriptenEHSjLj: Don't abort if __THREW__ is defined
This allows __THREW__ to be defined in the current module, although
it is still required to be a GlobalVariable.

In emscripten we want to be able to compile the source code that
defines this symbols.

Previously we were avoid this by not running this pass when building
that compiler-rt library, but I have change out to build it using the
normal compiler path:
https://github.com/emscripten-core/emscripten/pull/8391

Differential Revision: https://reviews.llvm.org/D60232

llvm-svn: 357665
2019-04-04 01:43:21 +00:00
Hubert Tong ab2eb2bfac [XCOFF] Add functionality for parsing AIX XCOFF object file headers
Summary:
1. Add functionality for parsing AIX XCOFF object files headers.
2. Only support 32-bit AIX XCOFF object files in this patch.
3. Print out the AIX XCOFF object file header in YAML format.

Reviewers: sfertile, hubert.reinterpretcast, jasonliu, mstorsjo, zturner, rnk

Reviewed By: sfertile, hubert.reinterpretcast

Subscribers: jsji, mgorny, hiraditya, jdoerfert, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D59419

Patch by Digger Lin

llvm-svn: 357663
2019-04-04 00:53:21 +00:00
Hubert Tong 7f8b3bf247 [Support] On AIX, Check ENOTSUP on posix_fallocate instead of EOPNOTSUPP
Summary:
`posix_fallocate` can fail if the underlying filesystem does not support
it; and, on AIX, such a failure is reported by a return value of
`ENOTSUP`. The existing code checks only for `EOPNOTSUPP`, which may
share the same value as `ENOTSUP`, but is not required to.

Reviewers: xingxue, sfertile, jasonliu

Reviewed By: xingxue

Subscribers: kristina, jsji, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60175

llvm-svn: 357662
2019-04-04 00:40:34 +00:00
Hubert Tong 844a02e509 [AIX] SelectionDAGNodes.h: Pack bit-fields that are meant to be packed
Summary:
Certain classes in the subject file are expected to provide different
views of a two-byte field as a collection of various bit-fields. On AIX,
the canonical layout of bit-fields would cause these classes to span
four bytes. Applying the `pack` pragma for compilers that employ the AIX
canonical layout allows these classes to fit within the expected two
bytes. In the future, the pragma would also likely need to be applied
when building with Clang on AIX.

Reviewers: xingxue, sfertile, jasonliu

Reviewed By: xingxue

Subscribers: jsji, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60164

llvm-svn: 357661
2019-04-04 00:33:57 +00:00
Reid Kleckner cfdd0cb5d9 [gn] Use "$link /lib" for archives instead of lib.exe
Summary:
This avoids the need to talk about lib.exe or llvm-lib.exe and it does
the right thing with LLD.

Reviewers: thakis

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60155

llvm-svn: 357660
2019-04-04 00:31:19 +00:00
Craig Topper 051bd16faf [X86] Remove CustomInserters for RDPKRU/WRPKRU. Use some custom lowering and new ISD opcodes instead.
These inserters inserted some instructions to zero some registers and copied from virtual registers to physical registers.

This change instead inserts the zeros directly into the DAG at lowering time using new ISD opcodes
that take the extra zeroes as inputs. The zeros will then go through isel on their own to select
the MOV32r0 pseudo. Then we just need to mention the physical registers directly
in the isel patterns and the isel table and InstrEmitter will take care of inserting the necessary
copies to/from physical registers.

llvm-svn: 357659
2019-04-04 00:28:49 +00:00
Reid Kleckner e10d00419a [codeview] Remove Type member from CVRecord
Summary:
Now CVType and CVSymbol are effectively type-safe wrappers around
ArrayRef<uint8_t>. Make the kind() accessor load it from the
RecordPrefix, which is the same for types and symbols.

Reviewers: zturner, aganea

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60018

llvm-svn: 357658
2019-04-04 00:28:48 +00:00
Reid Kleckner b056f91ac8 Fix minor innaccuracy in previous comment on ManagedStaticBase
llvm-svn: 357656
2019-04-04 00:13:16 +00:00
Reid Kleckner e9f2847b81 Make ManagedStatic constexpr constructible
Apparently it needs member initializers so that it can be constructed in
a constexpr context. I explained my investigation of this in PR41367.

llvm-svn: 357655
2019-04-04 00:11:21 +00:00
Nico Weber c5615c2326 llvm-undname: Name a pair. No behavior change.
Differential Revision: https://reviews.llvm.org/D60210

llvm-svn: 357653
2019-04-03 23:29:05 +00:00
Craig Topper 52cac4b79f [X86] Remove CustomInserter pseudos for MONITOR/MONITORX/CLZERO. Use custom instruction selection instead.
This custom inserter existed so we could do a weird thing where we pretended that the instructions support
a full address mode instead of taking a pointer in EAX/RAX. I think was largely so we could be pointer
size agnostic in the isel pattern.

To make this work we would then put the address into an LEA into EAX/RAX in front of the instruction after
isel. But the LEA is overkill when we just have a base pointer. So we end up using the LEA as a slower MOV
instruction.

With this change we now just do custom selection during isel instead and just assign the incoming address
of the intrinsic into EAX/RAX based on its size. After the intrinsic is selected, we can let isel take
care of selecting an LEA or other operation to do any address computation needed in this basic block.

I've also split the instruction into a 32-bit mode version and a 64-bit mode version so the implicit
use is properly sized based on the pointer. Without this we get comments in the assembly output about
killing eax and defing rax or vice versa depending on whether we define the instruction to use EAX/RAX.

llvm-svn: 357652
2019-04-03 23:28:30 +00:00
Craig Topper 477008bd50 [X86] Remove dead CHECK lines for a test. NFC
llvm-svn: 357651
2019-04-03 23:28:18 +00:00
Craig Topper 437b45a1f8 [X86] Autogenerate checks. NFC
llvm-svn: 357650
2019-04-03 23:28:11 +00:00