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38792 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen d67defdfe2 Avoid counting InlineAsm as a call - it prevents loop unrolling. 
PR7026
Patch by Pekka Jääskeläinen!

llvm-svn: 104780
 2010-05-26 22:40:28 +00:00
Dan Gohman 084bcb1322 Fix Lint printing warnings multiple times. Remove the ErrorStr 
option from lintModule, which was an artifact from being
based on Verifier code.

llvm-svn: 104765
 2010-05-26 22:28:53 +00:00
Daniel Dunbar c0b69020cd AsmMatcher/X86: Mark _REV instructions as "code gen only", they aren't expected 
to be matched.

llvm-svn: 104757
 2010-05-26 22:21:28 +00:00
Dan Gohman a20a5cd24f Reinstate checking of stackrestore, with checking for both Read 
and Write, and add a comment explaining this.

llvm-svn: 104756
 2010-05-26 22:21:25 +00:00
Jakob Stoklund Olesen 4f6da9e3a8 Give SubRegIndex names to all ARM subregisters. This will be required by 
TableGen shortly.

llvm-svn: 104754
 2010-05-26 22:15:03 +00:00
Dan Gohman 996bc42a26 Stackrestore is not a load. 
llvm-svn: 104752
 2010-05-26 22:00:10 +00:00
Bill Wendling ddee3cb163 Add FIXME comment to remove this. 
llvm-svn: 104749
 2010-05-26 21:53:50 +00:00
Dan Gohman c96c6db59d Remove a TODO which isn't practical. 
llvm-svn: 104748
 2010-05-26 21:50:41 +00:00
Daniel Dunbar b33dfbcba4 MC: Add TargetMachine support for setting the value of MCRelaxAll with 
-filetype=obj.

llvm-svn: 104747
 2010-05-26 21:48:55 +00:00
Jakob Stoklund Olesen d1d7ed63ff Add StringRef::compare_numeric and use it to sort TableGen register records. 
This means that our Registers are now ordered R7, R8, R9, R10, R12, ...
Not R1, R10, R11, R12, R2, R3, ...

llvm-svn: 104745
 2010-05-26 21:47:28 +00:00
Dan Gohman 1249adf160 Implement checking of the tail keyword. 
llvm-svn: 104744
 2010-05-26 21:46:36 +00:00
Devang Patel acc32a5c19 There is no need to force an line number entry (using previous location) for a temp label at unknown location. 
llvm-svn: 104740
 2010-05-26 21:23:46 +00:00
Bill Wendling 27311269cb Add "setjmp_syscall", "savectx", "qsetjmp", "vfork", "getcontext" to the list of 
usual suspects that could "return twice".

llvm-svn: 104737
 2010-05-26 20:39:00 +00:00
Daniel Dunbar b889fc987e MC: When running with -mc-relax-all, we can eagerly relax instructions and avoid creating unnecessary MCInstFragments. 
llvm-svn: 104736
 2010-05-26 20:37:03 +00:00
Daniel Dunbar 9d40ef162b MC/Mach-O: Factor out EmitInstTo{Fragment,Data} for emitting MCInst's as MCInstFragments or appending onto an MCDataFragment. 
llvm-svn: 104735
 2010-05-26 20:37:00 +00:00
Jim Grosbach c98892fdaa Adjust eh.sjlj.setjmp to properly have a chain and to have an opcode entry in 
ISD::. No functional change.

llvm-svn: 104734
 2010-05-26 20:22:18 +00:00
Devang Patel 1b08572a66 Update debug info when live-in reg is copied into a vreg. 
llvm-svn: 104732
 2010-05-26 20:18:50 +00:00
Kevin Enderby 70e34983e8 Fix the x86 move to/from segment register instructions. 
llvm-svn: 104731
 2010-05-26 20:10:45 +00:00
Bill Wendling 0c3bfd3fb0 Move the check for "calls setjmp" to SelectionDAGISel so that it can be used by 
more than just the stack slot coloring algorithm.

llvm-svn: 104722
 2010-05-26 19:46:12 +00:00
Devang Patel 002d54ddc9 Identify instructions, that needs a label to mark debug info entity, in advance. This simplifies beginScope(). 
llvm-svn: 104720
 2010-05-26 19:37:24 +00:00
Dan Gohman 52c2738324 Eliminate the use of PriorityQueue and just use a std::vector, 
implementing pop with a linear search for a "best" element. The priority
queue was a neat idea, but in practice the comparison functions depend
on dynamic information.

llvm-svn: 104718
 2010-05-26 18:52:00 +00:00
Dan Gohman 1e5d0b0456 Delete an unused function. 
llvm-svn: 104716
 2010-05-26 18:34:12 +00:00
Daniel Dunbar 7c8bd0fc98 MC: Change RelaxInstruction to only take the input and output instructions. 
llvm-svn: 104713
 2010-05-26 18:15:06 +00:00
Dan Gohman 338674a323 Fix a typo in a comment that Gabor noticed. 
llvm-svn: 104711
 2010-05-26 18:03:53 +00:00
Daniel Dunbar 388ff9b1a2 MC: Eliminate an unnecessary copy. 
llvm-svn: 104709
 2010-05-26 17:50:16 +00:00
Daniel Dunbar a19838e107 MC: Simplify MayNeedRelaxation to not provide the fixups, so we can query it 
before encoding.

llvm-svn: 104707
 2010-05-26 17:45:29 +00:00
Devang Patel 95fcc96752 Remove dead code. 
llvm-svn: 104706
 2010-05-26 17:42:50 +00:00
Devang Patel 5a5e0bc3b5 Do not construct location list backword! 
llvm-svn: 104705
 2010-05-26 17:29:32 +00:00
Jakob Stoklund Olesen 7de379467e Replace the SubRegSet tablegen class with a less error-prone mechanism. 
A Register with subregisters must also provide SubRegIndices for adressing the
subregisters. TableGen automatically inherits indices for sub-subregisters to
minimize typing.

CompositeIndices may be specified for the weirder cases such as the XMM sub_sd
index that returns the same register, and ARM NEON Q registers where both D
subregs have ssub_0 and ssub_1 sub-subregs.

It is now required that all subregisters are named by an index, and a future
patch will also require inherited subregisters to be named. This is necessary to
allow composite subregister indices to be reduced to a single index.

llvm-svn: 104704
 2010-05-26 17:27:12 +00:00
Daniel Dunbar b34440a6a8 MC: Eliminate MCAsmFixup, replace with MCFixup. 
llvm-svn: 104699
 2010-05-26 15:18:56 +00:00
Daniel Dunbar 353a91ff76 MC: Use accessors for access to MCAsmFixup. 
llvm-svn: 104697
 2010-05-26 15:18:31 +00:00
Daniel Dunbar 3627af5da4 MC: Change MCInst::dump_pretty to not include a trailing newline. 
llvm-svn: 104696
 2010-05-26 15:18:13 +00:00
Benjamin Kramer 6877119ef3 Kill unneeded SExt. 
llvm-svn: 104692
 2010-05-26 09:45:04 +00:00
Zhongxing Xu 730a977e02 SRetReturnReg was set in LowerFormalArguments(). So only assert it here. 
llvm-svn: 104691
 2010-05-26 08:10:02 +00:00
Daniel Dunbar 870e5759e7 MC: Eliminate MCFragment vtable, which was unnecessary. 
llvm-svn: 104689
 2010-05-26 06:50:57 +00:00
Shih-wei Liao c4376b9b1b Coding style change (Adding 1 missing space.) 
llvm-svn: 104670
 2010-05-26 04:46:50 +00:00
Shih-wei Liao 0568ca0ddc Adding the missing implementation for ARM::SBFX and ARM::UBFX. 
Fixing http://llvm.org/bugs/show_bug.cgi?id=7225.

llvm-svn: 104667
 2010-05-26 03:21:39 +00:00
Eric Christopher e805ea9e39 Temporarily revert r104655 as it's breaking the bots. 
llvm-svn: 104664
 2010-05-26 01:59:55 +00:00
Jim Grosbach a6897ecbb5 fix off by 1 (insn) error in eh.sjlj.setjmp thumb code sequence. 
llvm-svn: 104661
 2010-05-26 01:22:21 +00:00
Jakob Stoklund Olesen 50eec620f4 Revert "Replace the SubRegSet tablegen class with a less error-prone mechanism." 
This reverts commit 104654.

llvm-svn: 104660
 2010-05-26 01:21:14 +00:00
Dan Gohman 7c00576a62 Change push_all to a non-virtual function and implement it in the 
base class, since all the implementations are the same.

llvm-svn: 104659
 2010-05-26 01:10:55 +00:00
Dan Gohman 3701b3928e Trim #include. 
llvm-svn: 104657
 2010-05-26 00:55:59 +00:00
Bill Wendling c5222d6c38 Dale and Evan suggested putting the "check for setjmp" much earlier in the 
machine code generation. That's a good idea, so I made it so.

llvm-svn: 104655
 2010-05-26 00:32:40 +00:00
Jakob Stoklund Olesen 0b0274524c Replace the SubRegSet tablegen class with a less error-prone mechanism. 
A Register with subregisters must also provide SubRegIndices for adressing the
subregisters. TableGen automatically inherits indices for sub-subregisters to
minimize typing.

CompositeIndices may be specified for the weirder cases such as the XMM sub_sd
index that returns the same register, and ARM NEON Q registers where both D
subregs have ssub_0 and ssub_1 sub-subregs.

It is now required that all subregisters are named by an index, and a future
patch will also require inherited subregisters to be named. This is necessary to
allow composite subregister indices to be reduced to a single index.

llvm-svn: 104654
 2010-05-26 00:28:19 +00:00
Shih-wei Liao b6e0bc9457 Adding the missing implementation of Bitfield's "clear" and "insert". 
Fixing http://llvm.org/bugs/show_bug.cgi?id=7222.

llvm-svn: 104653
 2010-05-26 00:25:05 +00:00
Shih-wei Liao e22abfa823 To handle s* registers in emitVFPLoadStoreMultipleInstruction(). 
Fixing http://llvm.org/bugs/show_bug.cgi?id=7221.

llvm-svn: 104652
 2010-05-26 00:02:28 +00:00
Eric Christopher e7b64dcc1e Start adding mach-o tls reloc support. 
llvm-svn: 104651
 2010-05-26 00:02:12 +00:00
Jakob Stoklund Olesen 66c939a2ca Drop the SuperregHashTable. It is essentially the same as SubregHashTable. 
llvm-svn: 104650
 2010-05-25 23:43:18 +00:00
Devang Patel 9fc11706e3 First cut at supporting .debug_loc section. 
This is used to track variable information.

llvm-svn: 104649
 2010-05-25 23:40:22 +00:00
Benjamin Kramer 9439084cea Properly promote operands when optimizing a single-character memcmp. 
llvm-svn: 104648
 2010-05-25 22:53:43 +00:00