19c9314aea
[RISCV][NFC] Update RISCVInstrInfoC.td to match usual instruction naming convention
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When an instruction mnemonic contains a '.', we usually name the instruction
with a _ in that place. e.g. fadd.s -> FADD_S.
This patch updates RISCVInstrInfoC.td to do the same, e.g. c.nop -> C_NOP.
Also includes some minor formatting changes in RISCVInstrInfoC.td to better
align it with the formatting conventions in the rest of the backend.
llvm-svn: 320560
2017-12-13 09:57:25 +00:00
581d6b081d
[RISCV][NFC] Put isSImm6 and simm6 td definition in correct sorted position
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We sort these helper functions and td definitions by bit width. simm6 was
previously out-of-order with respect to the others.
llvm-svn: 320559
2017-12-13 09:41:21 +00:00
60714f98ba
[RISCV] MC layer support for the remaining RVC instructions
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Differential Revision: https://reviews.llvm.org/D40003
Patch by Shiva Chen.
llvm-svn: 320558
2017-12-13 09:32:55 +00:00
f8f4b90544
[RISCV] MC layer support for the jump/branch instructions of the RVC extension
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Differential Revision: https://reviews.llvm.org/D40002
Patch by Shiva Chen.
llvm-svn: 320038
2017-12-07 13:19:57 +00:00
9f6aec4b7a
[RISCV] MC layer support for load/store instructions of the C (compressed) extension
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Differential Revision: https://reviews.llvm.org/D40001
Patch by Shiva Chen.
llvm-svn: 320037
2017-12-07 12:50:32 +00:00
Alex Bradbury