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6 Commits

Author SHA1 Message Date
Quentin Colombet d1cd30b218 [AArch64][RegisterBankInfo] G_OR are fine on either GPR or FPR. 
Teach AArch64RegisterBankInfo that G_OR can be mapped on either GPR or
FPR for 64-bit or 32-bit values.

Add test cases demonstrating how this information is used to coalesce a
computation on a single register bank.

llvm-svn: 272170
 2016-06-08 16:53:32 +00:00
Quentin Colombet 5933eb84d3 [AArch64] Add test cases for the repairing of physical registers. 
llvm-svn: 266030
 2016-04-12 00:43:40 +00:00
Quentin Colombet f43f882f37 [AArch64] Add a test case for the propagation of register banks through 
phis.

llvm-svn: 266028
 2016-04-12 00:32:55 +00:00
Quentin Colombet 99d19d89e9 [AArch64] Add a test case for the repairing of definitions. 
llvm-svn: 266026
 2016-04-12 00:25:22 +00:00
Quentin Colombet d52f4128d6 [AArch64] Test that RegBankSelect inserts the proper copies to fix the 
register bank assignments.

llvm-svn: 266021
 2016-04-12 00:00:42 +00:00
Quentin Colombet bd19c8a39e [AArch64] Add a test case for the default mapping of RegBankSelect. 
llvm-svn: 265811
 2016-04-08 17:11:51 +00:00