Commit Graph

179412 Commits

Author SHA1 Message Date
Jason Liu 8e1d921bb3 Implement call lowering without parameters on AIX
Summary:dd
This patch implements call lowering for calls without parameters
on AIX as initial support.

Reviewers: sfertile, hubert.reinterpretcast, aheejin, efriedma

Differential Revision: https://reviews.llvm.org/D61948

llvm-svn: 361669
2019-05-24 20:54:35 +00:00
Jessica Paquette 56503865ed [GlobalISel][AArch64] Improve register bank mappings for G_SELECT
The fcsel and csel instructions differ in only the register banks they work on.

So, they're entirely interchangeable otherwise.

With this in mind, this does two things:

- Teach AArch64RegisterBankInfo to consider the inputs to G_SELECT as well as
  the outputs.
- Teach it to choose the best register bank mapping based off the constraints
  of the inputs and outputs.

The "best" in this case means the one that requires the smallest number of
copies to properly emit a fcsel/csel.

For example, if the inputs are all already going to be on FPRs, we should
emit a fcsel, even if the output is a GPR. This costs one copy to produce the
result, but saves us from copying the inputs into GPRs.

Also update the regbank-select.mir to check that we end up with the right
select instruction.

Differential Revision: https://reviews.llvm.org/D62267

llvm-svn: 361665
2019-05-24 19:35:25 +00:00
Nick Desaulniers 33bc64202b [AArch64] check for INLINEASM_BR along w/ INLINEASM
Summary:
It looks like since INLINEASM_BR was created off of INLINEASM, a few
checks for INLINEASM needed to be updated to check for either case.

pr/41999

Reviewers: t.p.northover, peter.smith

Reviewed By: peter.smith

Subscribers: craig.topper, javed.absar, kristof.beyls, hiraditya, llvm-commits, peter.smith, srhines

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62402

llvm-svn: 361661
2019-05-24 19:00:13 +00:00
Nick Desaulniers 9f7bd71cf5 [ARM] additionally check for ARM::INLINEASM_BR w/ ARM::INLINEASM
Summary:
We were observing failures for arm32 allyesconfigs of the Linux kernel
with the asm goto Clang patch, where ldr's were being generated to
offsets too far away to encode in imm12.

It looks like since INLINEASM_BR was created off of INLINEASM, a few
checks for INLINEASM needed to be updated to check for either case.

pr/41999

Link: https://github.com/ClangBuiltLinux/linux/issues/490

Reviewers: peter.smith, kristof.beyls, ostannard, rengolin, t.p.northover

Reviewed By: peter.smith

Subscribers: jyu2, javed.absar, hiraditya, llvm-commits, nathanchance, craig.topper, kees, srhines

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62400

llvm-svn: 361659
2019-05-24 18:58:21 +00:00
Matt Arsenault 3d59e388ca AMDGPU: Activate all lanes when spilling CSR VGPR for SGPR spills
If some lanes weren't active on entry to the function, this could
clobber their VGPR values.

llvm-svn: 361655
2019-05-24 18:18:51 +00:00
Matt Arsenault 0ff901fba0 AMDGPU: Boost inline threshold with addrspacecasted alloca arguments
This was skipping GetUnderlyingObject for nonprivate addresses, but an
alloca could also be found through an addrspacecast if it's flat.

llvm-svn: 361649
2019-05-24 16:52:35 +00:00
Sanjay Patel 6f7734a125 [LoopVectorize] update test to be independent of instcombine; NFC
This is a regression test for vectorization, so remove instcombine
from the RUN line and adjust the comparison predicates to show what
the vectorizer is creating rather than how instcombine cleans it up.

llvm-svn: 361648
2019-05-24 16:46:09 +00:00
Chris Bieneman 07745a131f [CMake] Fix issues building runtimes
This resolves two issues:
(1) LIBCXX_HEADER_DIR is a very misleadingly named variable because it shouldn't be set to the header directory, instead it needs to be the root binary dir.
(2) If you build runtimes without libcxx, we can't depend on the libcxx header target, so we should instaed refer to it by the variable name which will be unset if libcxx isn't present.

llvm-svn: 361646
2019-05-24 16:21:38 +00:00
Alexander Timofeev dffedea014 [AMDGPU] Divergence driven ISel. Assign register class for cross block values according to the divergence.
Details: To make instruction selection really divergence driven it is necessary to assign
         the correct register classes to the cross block values beforehand. For the divergent targets
         same value type requires different register classes dependent on the value divergence.

Reviewers: rampitec, nhaehnle

Differential Revision: https://reviews.llvm.org/D59990

llvm-svn: 361644
2019-05-24 15:32:18 +00:00
George Rimar c1cc8d0eca [llvm-objcopy] - Strip undefined symbols if they are no longer referenced following --only-section
This is https://bugs.llvm.org/show_bug.cgi?id=40004.

In this patch I teach llvm-objcopy to remove undefined symbols if
them are not used anymore after applying -j/--only-section option.

Differential revision: https://reviews.llvm.org/D62317

llvm-svn: 361642
2019-05-24 15:04:50 +00:00
Nico Weber c0ea5b2d51 gn build: Merge r361607
llvm-svn: 361640
2019-05-24 14:24:25 +00:00
Andrea Di Biagio 21977d8e29 [MCA] Zero-initialize field CRD in InstructionBase. Also run clang-format on a couple of files. NFC
llvm-svn: 361637
2019-05-24 13:56:01 +00:00
Simon Atanasyan 8362cbe13b [llvm-readobj] Implement GNU-style output for dynamic table
GNU readelf tool prints slightly different dynamic table "header" and
surrounds dynamic tag names by brackets. This patch implements the same
formatting for GNU-style output of the `llvm-readobj`.

LLVM
```
DynamicSection [ (13 entries)
  Tag        Type                 Name/Value
  0x00000006 SYMTAB               0x168
  ...
]
```

GNU
```
Dynamic section at offset 0x1d0 contains 13 entries:
  Tag        Type                 Name/Value
  0x00000006 (SYMTAB)             0x168
  ...
```

Differential Revision: https://reviews.llvm.org/D62256

llvm-svn: 361633
2019-05-24 12:22:53 +00:00
Stefan Pintilie 522307fa40 [PowerPC] Remove CRBits Copy Of Unset/set CBit
For the situation, where we generate the following code:

       crxor 8, 8, 8
       < Some instructions>
.LBB0_1:
       < Some instructions>
       cror 1, 8, 8

cror (COPY of CRbit) depends on the result of the crxor instruction.
CR8 is known to be zero as crxor is equivalent to CRUNSET. We can simply use
crxor 1, 1, 1 instead to zero out CR1, which does not have any dependency on
any previous instruction.

This patch will optimize it to:

        < Some instructions>
.LBB0_1:
        < Some instructions>
        cror 1, 1, 1

Patch By: Victor Huang (NeHuang)

Differential Revision: https://reviews.llvm.org/D62044

llvm-svn: 361632
2019-05-24 12:05:37 +00:00
George Rimar 33bee053c3 Revert r361630 "[llvm-readelf] - Allow dumping of the .dynamic section even if there is no PT_DYNAMIC header."
It broke BB:
http://lab.llvm.org:8011/builders/ppc64le-lld-multistage-test/builds/3748

llvm-svn: 361631
2019-05-24 11:24:42 +00:00
George Rimar f835fcf412 [llvm-readelf] - Allow dumping of the .dynamic section even if there is no PT_DYNAMIC header.
It is now possible after D61937 was landed and was discussed
in it's review comments. It is not consistent with GNU, which
does not output .dynamic section content in this case for
no visible reason.

Differential revision: https://reviews.llvm.org/D62179

llvm-svn: 361630
2019-05-24 11:12:50 +00:00
Cullen Rhodes b3e58df80c [AArch64][SVE2] Asm: support SVE2 String Processing Group
Summary:
Patch adds support for the SVE2 character match instructions MATCH and NMATCH.

The specification can be found here:
https://developer.arm.com/docs/ddi0602/latest

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D62206

llvm-svn: 361627
2019-05-24 10:32:01 +00:00
Simon Atanasyan e4f01ec50c [llvm-readobj][mips] Align GOT columns headers properly in 64-bit case
llvm-svn: 361626
2019-05-24 10:26:48 +00:00
Cullen Rhodes adb1d74bf9 [AArch64][SVE2] Asm: support SVE2 Narrowing Group
Summary:
Patch adds support for the following instructions:

SVE2 bitwise shift right narrow:
    * SQSHRUNB, SQSHRUNT, SQRSHRUNB, SQRSHRUNT, SHRNB, SHRNT, RSHRNB, RSHRNT,
      SQSHRNB, SQSHRNT, SQRSHRNB, SQRSHRNT, UQSHRNB, UQSHRNT, UQRSHRNB,
      UQRSHRNT

SVE2 integer add/subtract narrow high part:
    * ADDHNB, ADDHNT, RADDHNB, RADDHNT, SUBHNB, SUBHNT, RSUBHNB, RSUBHNT

SVE2 saturating extract narrow:
    * SQXTNB, SQXTNT, UQXTNB, UQXTNT, SQXTUNB, SQXTUNT

The specification can be found here:
https://developer.arm.com/docs/ddi0602/latest

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D62205

llvm-svn: 361624
2019-05-24 10:22:30 +00:00
Cullen Rhodes 5f04f00282 [AArch64][SVE2] Asm: support SVE2 Accumulate Group
Summary:
Patch adds support for the following instructions:

SVE2 bitwise shift and insert:
    * SRI, SLI

SVE2 bitwise shift right and accumulate:
    * SSRA, USRA, SRSRA, URSRA

SVE2 complex integer add:
    * CADD, SQCADD

SVE2 integer absolute difference and accumulate:
    * SABA, UABA

SVE2 integer absolute difference and accumulate long:
    * SABALB, SABALT, UABALB, UABALT

SVE2 integer add/subtract long with carry:
    * ADCLB, ADCLT, SBCLB, SBCLT

The specification can be found here:
https://developer.arm.com/docs/ddi0602/latest

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D62204

llvm-svn: 361622
2019-05-24 10:10:34 +00:00
James Henderson 8654b8c55b [llvm-objdump][test] Fix for spurious matches against file paths
r361479 added tests that did --implicit-check-not=main, but a user found
that they failed on his machine, due to it having 'main' in a file path
printed earlier in the output. This test fixes this issue by making the
check pattern more explicit.

llvm-svn: 361621
2019-05-24 10:07:24 +00:00
Simon Pilgrim 95b8d9bbf8 [SelectionDAG] computeKnownBits - support constant pool values from target
This patch adds the overridable TargetLowering::getTargetConstantFromLoad function which allows targets to return any constant value loaded by a LoadSDNode node - only X86 makes use of this so far but everything should be in place for other targets.

computeKnownBits then uses this function to improve codegen, notably vector code after legalization.

A future commit will do the same for ComputeNumSignBits but computeKnownBits sees the bigger benefit.

This required a couple of fixes:
* SimplifyDemandedBits must early-out for getTargetConstantFromLoad cases to prevent infinite loops of constant regeneration (similar to what we already do for BUILD_VECTOR).
* Fix a DAGCombiner::visitTRUNCATE issue as we had trunc(shl(v8i32),v8i16) <-> shl(trunc(v8i16),v8i32) infinite loops after legalization on AVX512 targets.

Differential Revision: https://reviews.llvm.org/D61887

llvm-svn: 361620
2019-05-24 10:03:11 +00:00
Cullen Rhodes 980f760515 [AArch64][SVE2] Asm: add PMULLB/PMULLT instructions
Summary:
This patch adds support for the polynomial multiplication instructions
PMULLB/PMULLT. The 64-bit source and 128-bit destination element
variants are enabled with crypto extensions (+sve2-aes), similar to the
NEON PMULL2 instruction. All other variants are enabled with +sve2.

The specification can be found here:
https://developer.arm.com/docs/ddi0602/latest

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D62145

llvm-svn: 361619
2019-05-24 09:56:23 +00:00
Cullen Rhodes 8bcea9daaa [AArch64][SVE2] Asm: add integer add/sub long/wide instructions
Summary:
Patch adds support for the following instructions:

SVE2 integer add/subtract long:
    * SADDLB, SADDLT, UADDLB, UADDLT, SSUBLB, SSUBLT, USUBLB, USUBLT,
      SABDLB, SABDLT, UABDLB, UABDLT

SVE2 integer add/subtract wide:
    * SADDWB, SADDWT, UADDWB, UADDWT, SSUBWB, SSUBWT, USUBWB, USUBWT

The specification can be found here:
https://developer.arm.com/docs/ddi0602/latest

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D62142

llvm-svn: 361615
2019-05-24 09:28:27 +00:00
Bjorn Pettersson b4771425f5 Use the DataLayout::typeSizeEqualsStoreSize helper. NFC
Just a minor refactoring to use the new helper method
DataLayout::typeSizeEqualsStoreSize(). This is done when
checking if getTypeSizeInBits is equal/non-equal to
getTypeStoreSizeInBits.

llvm-svn: 361613
2019-05-24 09:20:20 +00:00
Cullen Rhodes 968cb0e049 [AArch64][SVE2] Asm: add various bitwise shift instructions
Summary:
This patch adds support for the SVE2 saturating/rounding bitwise shift
left (predicated) group of instructions:

    * SRSHL, URSHL, SRSHLR, URSHLR, SQSHL, UQSHL, SQRSHL, UQRSHL,
      SQSHLR, UQSHLR, SQRSHLR, UQRSHLR

Immediate forms of the SQSHL and UQSHL instructions are also added to
the existing SVE bitwise shift by immediate (predicated) group, as well
as three new instructions SRSHR/URSHR/SQSHLU. The new instructions in
this group are encoded similarly and are implemented using the same
TableGen class with a minimal change (1 bit in encoding).

The specification can be found here:
https://developer.arm.com/docs/ddi0602/latest

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D62140

llvm-svn: 361612
2019-05-24 09:17:23 +00:00
Cullen Rhodes 6bca64fe5e [AArch64][SVE2] Asm: add saturating add/sub instructions
Summary:
Patch adds support for the following instructions:

    * SQADD, UQADD, SUQADD, USQADD
    * SQSUB, UQSUB, SQSUBR, UQSUBR

The specification can be found here:
https://developer.arm.com/docs/ddi0602/latest

Reviewed By: chill

Differential Revision: https://reviews.llvm.org/D62130

llvm-svn: 361611
2019-05-24 09:06:37 +00:00
Neil Henning 119c31ad93 StructurizeCFG: Relax uniformity checks.
This change relaxes the checks for hasOnlyUniformBranches such that our
region is uniform if:

1. All conditional branches that are direct children are uniform.
2. And either:
  a. All sub-regions are uniform.
  b. There is one or less conditional branches among the direct
     children.

Differential Revision: https://reviews.llvm.org/D62198

llvm-svn: 361610
2019-05-24 08:59:17 +00:00
Cullen Rhodes d9bb7b69ab [AArch64][SVE2] Asm: fix overlapping bit
Summary:
Bit 20 in sve2_int_arith_pred TableGen class was overlapping. The
encodings are not affected as bit 20 is defined by the opc bits
and this was overwriting the earlier error of setting bit 20 to 0.

Raised by Momchil: https://reviews.llvm.org/D62130

Reviewed By: chill

Differential Revision: https://reviews.llvm.org/D62292

llvm-svn: 361609
2019-05-24 08:45:37 +00:00
Tim Northover 3b2157aeed GlobalISel: support swifterror attribute on AArch64.
swifterror marks an argument as a register pretending to be a pointer, so we
need a guaranteed mem2reg-like analysis of its uses. Fortunately most of the
infrastructure can be reused from the DAG world.

llvm-svn: 361608
2019-05-24 08:40:13 +00:00
Tim Northover 3d7a057b0d CodeGen: factor out swifterror value tracking.
llvm-svn: 361607
2019-05-24 08:39:43 +00:00
Simon Atanasyan c1b482f2a5 [mips] Always check that `shift and add` optimization is efficient.
The D45316 introduced the `shouldTransformMulToShiftsAddsSubs` function
to check that breaking down constant multiplications into a series
of shifts, adds, and subs is efficient. Unfortunately, this function
does not check maximum number of steps on all paths of the algorithm.
This patch fixes this bug.

Fix for PR41929.

Differential Revision: https://reviews.llvm.org/D62166

llvm-svn: 361606
2019-05-24 08:39:40 +00:00
Bjorn Pettersson d63a2bb35f [DSE] Bugfix to avoid PartialStoreMerging involving non byte-sized stores
Summary:
The DeadStoreElimination pass now skips doing
PartialStoreMerging when stores overlap according to
OW_PartialEarlierWithFullLater and at least one of
the stores is having a store size that is different
from the size of the type being stored.

This solves problems seen in
  https://bugs.llvm.org/show_bug.cgi?id=41949
for which we in the past could end up with
mis-compiles or assertions.

The content and location of the padding bits is not
formally described (or undefined) in the LangRef
at the moment. So the solution is chosen based on
that we cannot assume anything about the padding bits
when having a store that clobbers more memory than
indicated by the type of the value that is stored
(such as storing an i6 using an 8-bit store instruction).

Fixes: https://bugs.llvm.org/show_bug.cgi?id=41949

Reviewers: spatel, efriedma, fhahn

Reviewed By: efriedma

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62250

llvm-svn: 361605
2019-05-24 08:32:02 +00:00
Sjoerd Meijer 937af54666 [ARM] ARMExpandPseudoInsts: add debug messages
This pass wasn't printing any messages at all, which I find really inconvenient
while debugging/tracing things. It now dumps the before and after of expanded
instructions. It doesn't do this yet for all instructions, but this is a good
start I guess.

Differential Revision: https://reviews.llvm.org/D62297

llvm-svn: 361604
2019-05-24 08:25:02 +00:00
QingShan Zhang 449bfdd1b0 [Power9] Add a specific heuristic to schedule the addi before the load
When we are scheduling the load and addi, if all other heuristic didn't take effect,
 we will try to schedule the addi before the load, to hide the latency, and avoid the
 true dependency added by RA. And this only take effects for Power9.

Differential Revision: https://reviews.llvm.org/D61930

llvm-svn: 361600
2019-05-24 05:30:09 +00:00
Craig Topper af0add6c39 [X86] Add test case that was supposed to go with r360102.
Found in my working area. Guess I forgot 'git add' before committing.

llvm-svn: 361599
2019-05-24 04:46:56 +00:00
Yevgeny Rouban c652b3455e [NFC] SwitchInst: Introduce wrapper for prof branch_weights handling
This patch introduces a wrapper class that re-implements
several mutator methods of SwitchInst to handle changes
of prof branch_weights metadata along with remove/add
switch case methods.
Subsequent patches will use this wrapper to implement
prof branch_weights metadata handling for SwitchInst.

Reviewers: davidx, eraman, reames, chandlerc
Reviewed By: davidx
Differential Revision: https://reviews.llvm.org/D62122

llvm-svn: 361596
2019-05-24 04:34:23 +00:00
Jordan Rupprecht 01d6173667 [llvm-nm] Fix Bug 41353 - unique symbols printed as D instead of u
Summary:
https://bugs.llvm.org/show_bug.cgi?id=41353

I'm new to LLVM and C++ so please do not hesitate to iterate with me on this fix.

Patch by Mike Pozulp!

Reviewers: rupprecht, zbrid, grimar, jhenderson

Reviewed By: rupprecht, jhenderson

Subscribers: jhenderson, chrisjackson, MaskRay, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D61117

llvm-svn: 361595
2019-05-24 04:02:05 +00:00
Daniel Sanders 4cecdaa05f Fix BUILD_SHARED_LIBS builds after r361567
Also fixed a comment I noticed while debugging this build

llvm-svn: 361591
2019-05-24 02:15:27 +00:00
Reid Kleckner 414da9d66a Clarify how musttail can be used to create forwarding thunks
llvm-svn: 361590
2019-05-24 01:45:47 +00:00
David Blaikie fc302c2b7f dwarfdump: Deterministically... determine whether parsing a DWARF32 or DWARF64 str_offsets header
Rather than trying one and then the other - use the kind of the CU to
select which kind of header to parse.

llvm-svn: 361589
2019-05-24 01:41:58 +00:00
Reid Kleckner b7a78c7dff [AArch64] Preserve X8 for thunks ending in variadic musttail calls
Summary:
On Windows, X8 may be used to pass in the address of an aggregate that
is returned indirectly. Therefore, it should be forwarded to variadic
musttail calls and preserved in thunks.

Fixes PR41997

Reviewers: mgrang, efriedma

Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62344

llvm-svn: 361585
2019-05-24 01:27:20 +00:00
Serge Pavlov ed595e8627 [AArch64] Add nvcast patterns for v2f32 -> v1f64
Summary: Constant stores of f32 values can create such NvCast nodes.

Reviewers: t.p.northover

Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62285

llvm-svn: 361584
2019-05-24 01:20:34 +00:00
David Blaikie 79872a88a0 dwarfdump: Add a bit more DWARF64 support
This test case was incorrect because it mixed DWARF32 and DWARF64 for a
single unit (DWARF32 unit referencing a DWARF64 str_offsets section). So
fix enough of the unit parsing for DWARF64 and make the test valid.

(not sure if anyone needs DWARF64 support though - support in
libDebugInfoDWARF has been added piecemeal and LLVM doesn't produce it
at all)

llvm-svn: 361582
2019-05-24 01:05:52 +00:00
Eli Friedman 052f87ae36 Revert r361460
It regresses https://bugs.llvm.org/show_bug.cgi?id=38309 (represented
by the testcase test/Transforms/GlobalOpt/globalsra-multigep.ll).

llvm-svn: 361581
2019-05-24 01:03:51 +00:00
Peter Collingbourne ab09cca310 llvm-objcopy: Change sectionWithinSegment() to use virtual addresses instead of file offsets for SHT_NOBITS sections.
Without this, sectionWithinSegment() will return the wrong answer for bss
sections. This doesn't seem to matter now (for non-broken ELF files), but
it will matter with a change that I'm working on.

Differential Revision: https://reviews.llvm.org/D58426

llvm-svn: 361578
2019-05-24 00:21:46 +00:00
Thomas Lively 55229f6b10 [WebAssembly] Expand more SIMD float ops
Summary: These were previously causing ISel failures.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62354

llvm-svn: 361577
2019-05-24 00:15:04 +00:00
Sanjay Patel 8869a98e82 [InstSimplify] fold insertelement-of-extractelement
This was partly handled in InstCombine (only the constant
index case), so delete that and zap it more generally in
InstSimplify.

llvm-svn: 361576
2019-05-24 00:13:58 +00:00
Sanjay Patel 3e15f83381 [InstSimplify] add tests for insert-of-extract; NFC
llvm-svn: 361575
2019-05-24 00:11:23 +00:00
Sanjay Patel 093c922205 [InstCombine] remove redundant fold for extractelement; NFC
The out-of-bounds index pattern is handled by InstSimplify,
so the extractelement should be eliminated next time it is
visited.

llvm-svn: 361570
2019-05-23 23:33:38 +00:00
Sanjay Patel 4d4df6f144 [InstCombine] remove redundant fold for insertelement; NFC
The out-of-bounds index pattern is handled by InstSimplify.

llvm-svn: 361569
2019-05-23 23:33:34 +00:00
Daniel Sanders 3e4acaabb9 Break false dependencies on target libraries
Summary:
For the most part this consists of replacing ${LLVM_TARGETS_TO_BUILD} with
some combination of AllTargets* so that they depend on specific components
of a target backend rather than all of it. The overall effect of this is
that, for example, tools like opt no longer falsely depend on the
disassembler, while tools like llvm-ar no longer depend on the code
generator.

There's a couple quirks to point out here:
* AllTargetsCodeGens is a bit more prevalent than expected. Tools like dsymutil
  seem to need it which I was surprised by.
* llvm-xray linked to all the backends but doesn't seem to need any of them.
  It builds and passes the tests so that seems to be correct.
* I left gold out as it's not built when binutils is not available so I'm
  unable to test it

Reviewers: bogner, JDevlieghere

Reviewed By: bogner

Subscribers: mehdi_amini, mgorny, steven_wu, dexonsmith, rupprecht, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62331

llvm-svn: 361567
2019-05-23 23:02:56 +00:00
Bob Haarman 5554a5fcbd fix accidental implicit matches in elf-disassemble-symbol-labels-rel.test
llvm/test/tools/llvm-objdump/X86/elf-disassemble-symbol-labels-rel.test
uses --implicit-check-not to verify that certain patterns do not occur
in llvm-objdump's output, except in places where they are explicitly
checked. Unfortunately, the patterns are generic enough that they may
be part of the file name which is also output by llvm-objdump. This
change matches the line with the filename explicitly so that the
implicit patterns are not applied to it.

llvm-svn: 361563
2019-05-23 22:28:18 +00:00
Alina Sbirlea d82ddfa7c3 [NewPassManager] Add tuning option: ForgetAllSCEVInLoopUnroll [NFC].
Summary: Mirror tuning option from old pass manager in new pass manager.

Reviewers: chandlerc

Subscribers: mehdi_amini, jlebar, zzheng, dmgreen, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D61612

llvm-svn: 361560
2019-05-23 21:52:59 +00:00
Sanjay Patel e60cb7d1be [InstSimplify] insertelement V, undef, ? --> V
This was part of InstCombine, but it's better placed in
InstSimplify. InstCombine also had an unreachable but weaker
fold for insertelement with undef index, so that is deleted.

llvm-svn: 361559
2019-05-23 21:49:47 +00:00
Craig Topper f53c502e0b [TTI] Fix some typos in comments. NFC
'implementaion' -> 'implementation'
'non-unform' -> 'non-uniform'
'mimimum' -> 'minimum'

Patch by Pavel Samolysov

Differential Revision: https://reviews.llvm.org/D62136

llvm-svn: 361554
2019-05-23 21:04:01 +00:00
Kit Barton 987fdfd9a7 Revert [LOOPINFO] Extend Loop object to add utilities to get the loop bounds, step, induction variable, and guard branch.
This reverts r361517 (git commit 2049e4dd8f)

llvm-svn: 361553
2019-05-23 20:53:05 +00:00
Sanjay Patel 7d6c0bce50 [DAGCombiner] make folds of binops safe for opcodes that produce >1 value
This is no-functional-change-intended currently because the definition
of isBinOp() only includes opcodes that produce 1 value. But if we
share that implementation with isCommutativeBinOp() as proposed in
D62191, then we need to make sure that the callers bail out for
opcodes that they are not prepared to handle correctly.

llvm-svn: 361547
2019-05-23 20:17:25 +00:00
Roman Lebedev f81ebfb045 UpdateTestChecks: ppc32 triple support
Summary:
Appears identical to powerpc64{,le}.
Regenerate test that is being affected by upcoming patch.

Reviewers: RKSimon

Reviewed By: RKSimon

Subscribers: nemanjai, jsji, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62339

llvm-svn: 361543
2019-05-23 19:54:41 +00:00
Matt Arsenault 5c714cbdd8 AMDGPU: Correct maximum possible private allocation size
We were assuming a much larger possible per-wave visible stack
allocation than is possible:

faa3ae5138/src/core/runtime/amd_gpu_agent.cpp (L70)

Based on this, we can assume the high 15 bits of a frame index or sret
are 0. The frame index value is the per-lane offset, so the maximum
frame index value is MAX_WAVE_SCRATCH / wavesize.

Remove the corresponding subtarget feature and option that made
this configurable.

llvm-svn: 361541
2019-05-23 19:38:14 +00:00
Alina Sbirlea e4b27869c6 [NewPassManager] Add tuning option: LoopUnrolling [NFC].
Summary: Mirror tuning option from old pass manager in new pass manager.

Reviewers: chandlerc

Subscribers: jlebar, dmgreen, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D61618

llvm-svn: 361540
2019-05-23 19:35:40 +00:00
Roman Lebedev cb64cd9b60 [NFC] UpdateTestChecks: asm.py: fix whitespace issue
llvm-svn: 361538
2019-05-23 19:15:05 +00:00
Alina Sbirlea 63729b0c49 [SLPVectorizer] Set flag to previous default.
Summary:
The refactoring in r360276 moved the `RunSLPVectorization` flag and added the default explicitly. The default should have been `false`, as before.

The new pass manager used to have SLPVectorization on by default, now it's off in opt, and needs D61617 checked in to enable it in clang.

Reviewers: chandlerc

Subscribers: mehdi_amini, jlebar, eraman, steven_wu, dexonsmith, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D61955

llvm-svn: 361537
2019-05-23 19:07:41 +00:00
Chris Bieneman e836096f01 [CMake] Fixing errors in r361513
Summary:
I somehow messed this up. libcxx appends the subdirectories itself, so we don't need to add them here.

Also, r361513 broke the "projects" build of libcxx because it always included the extra targets.

Reviewers: lebedev.ri, mclow.lists

Subscribers: mgorny, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62336

llvm-svn: 361535
2019-05-23 18:51:52 +00:00
Sanjay Patel 3249be1e03 [InstCombine] be more careful when transforming a shuffle mask
This is reduced from a fuzzer test:
https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=14890

Usually, demanded elements should be able to simplify shuffle
mask elements that are pointing to undef elements of its source
operands, but that doesn't happen in the test case.

llvm-svn: 361533
2019-05-23 18:46:03 +00:00
Jordan Rupprecht 4fb41a24bc [git] Be more specific when looking for llvm-svn
Summary:
A commit may, for some reason, have `llvm-svn:` in it multiple times. It may even take up the whole line and look identical to what gets added automatically when svn commits land in github.

To workaround this, make changes to both lookups:

1) When doing the git -> svn lookup, make sure to go through the whole message, and:
 a) Only look for llvm-svn starting at the beginning of the line (excluding the whitespace that `git log` adds).
 b) Take the last one (at the end of the commit message), if there are multiple matches.

2) When doing the svn -> git lookup, look through a sizeable but still reasonably small number of git commits (10k, about 4-5 months right now), and:
 a) Only consider commits with the '^llvm-svn: NNNNNN' we expect, and
 b) Only consider those that also follow the same git -> svn matching above. (Error if it's not exactly one commit).

Reviewers: jyknight

Reviewed By: jyknight

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60017

llvm-svn: 361532
2019-05-23 18:43:19 +00:00
Robert Lougher 170dfeb2ff Resubmit r360436 "[X86] Avoid SFB - Fix inconsistent codegen with/without debug info"
Fixes https://bugs.llvm.org/show_bug.cgi?id=40969

The functions findPotentiallyBlockedCopies and buildCopy are currently not
accounting for the presence of debug instructions. In the former this results
in the optimization not being trigerred, and in the latter results in
inconsistent codegen.

This patch enables the optimization to be performed in a debug build and
ensures the codegen is consistent with non-debug builds.

Patch by Chris Dawson.

Differential Revision: https://reviews.llvm.org/D61680

llvm-svn: 361527
2019-05-23 18:15:12 +00:00
Thomas Lively e18b5c6237 [WebAssembly] Implement ReplaceNodeResults to fix a SIMD crash
Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D61037

llvm-svn: 361526
2019-05-23 18:09:26 +00:00
Roman Lebedev 702a152e6a [NFC][PPC] Autogenerate vec_add_sub_quadword.ll test
Being affected by (sub %x, C) -> add %X, (sub 0, C) 'for vectors' patch.

llvm-svn: 361525
2019-05-23 18:08:26 +00:00
Roman Lebedev c8364ef567 [NFC][PPC] Autogenerate vec_add_sub_doubleword.ll test
Being affected by (sub %x, C) -> add %X, (sub 0, C) 'for vectors' patch.

llvm-svn: 361524
2019-05-23 18:08:21 +00:00
Roman Lebedev a8a470c45b [NFC][Mips] Autogenerate msa/i5-s.ll test
Being affected by (sub %x, C) -> add %X, (sub 0, C) 'for vectors' patch.

llvm-svn: 361523
2019-05-23 18:08:17 +00:00
Roman Lebedev 06688fe715 [NFC][Mips] Autogenerate msa/arithmetic.ll test
Being affected by (sub %x, C) -> add %X, (sub 0, C) 'for vectors' patch.

llvm-svn: 361522
2019-05-23 18:08:13 +00:00
Roman Lebedev d19a36efd1 UpdateTestChecks: -march=mips/-march=mipsel is mips triple.
Again, a mixture of march and triple, with majority being march:

llvm/test/CodeGen/Mips$ grep -ri triple | wc -l
818
llvm/test/CodeGen/Mips$ grep -ri march | wc -l
1457

llvm-svn: 361521
2019-05-23 18:08:00 +00:00
Nico Weber 4d7054615c gn build: Merge r361418 more
llvm-svn: 361520
2019-05-23 18:01:16 +00:00
Matt Arsenault 0f3ba44b57 AMDGPU/GlobalISel: Legality for integer min/max
llvm-svn: 361519
2019-05-23 17:58:48 +00:00
Kit Barton 2049e4dd8f [LOOPINFO] Extend Loop object to add utilities to get the loop bounds, step, induction variable, and guard branch.
Summary:
    This PR extends the loop object with more utilities to get loop bounds, step, induction variable, and guard branch. There already exists passes which try to obtain the loop induction variable in their own pass, e.g. loop interchange. It would be useful to have a common area to get these information. Moreover, loop fusion (https://reviews.llvm.org/D55851) is planning to use getGuard() to extend the kind of loops it is able to fuse, e.g. rotated loop with non-constant upper bound, which would have a loop guard.

      /// Example:
      /// for (int i = lb; i < ub; i+=step)
      ///   <loop body>
      /// --- pseudo LLVMIR ---
      /// beforeloop:
      ///   guardcmp = (lb < ub)
      ///   if (guardcmp) goto preheader; else goto afterloop
      /// preheader:
      /// loop:
      ///   i1 = phi[{lb, preheader}, {i2, latch}]
      ///   <loop body>
      ///   i2 = i1 + step
      /// latch:
      ///   cmp = (i2 < ub)
      ///   if (cmp) goto loop
      /// exit:
      /// afterloop:
      ///
      /// getBounds
      ///   getInitialIVValue      --> lb
      ///   getStepInst            --> i2 = i1 + step
      ///   getStepValue           --> step
      ///   getFinalIVValue        --> ub
      ///   getCanonicalPredicate  --> '<'
      ///   getDirection           --> Increasing
      /// getGuard             --> if (guardcmp) goto loop; else goto afterloop
      /// getInductionVariable          --> i1
      /// getAuxiliaryInductionVariable --> {i1}
      /// isCanonical                   --> false

    Committed on behalf of @Whitney (Whitney Tsang).

    Reviewers: kbarton, hfinkel, dmgreen, Meinersbur, jdoerfert, syzaara, fhahn

    Reviewed By: kbarton

    Subscribers: tvvikram, bmahjour, etiotto, fhahn, jsji, hiraditya, llvm-commits

    Tags: #llvm

    Differential Revision: https://reviews.llvm.org/D60565

llvm-svn: 361517
2019-05-23 17:56:35 +00:00
Thomas Lively eafe8ef6f2 [WebAssembly] Add multivalue and tail-call target features
Summary:
These features will both be implemented soon, so I thought I would
save time by adding the boilerplate for both of them at the same time.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D62047

llvm-svn: 361516
2019-05-23 17:26:47 +00:00
Thomas Preud'homme 7b7683d7a6 [FileCheck] Remove llvm:: prefix
Summary:
Remove all llvm:: prefixes in FileCheck library header and
implementation except for calls to make_unique and make_shared since
both files already use the llvm namespace.

Reviewers: jhenderson, jdenny, probinson, arichardson

Subscribers: hiraditya, arichardson, probinson, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62323

llvm-svn: 361515
2019-05-23 17:19:36 +00:00
Chris Bieneman c5ec2a2bc1 [CMake] Copy C++ headers before configuring runtimes build
Summary: On some platforms C++ headers are packaged with the compiler not the sysroot. If you don't copy C++ headers into the build include directory during configuraiton of the outer build the C++ check during the runtime configuration may get inaccurate results.

Reviewers: phosek, compnerd, smeenai, EricWF

Reviewed By: compnerd

Subscribers: EricWF, christof, libcxx-commits, mgorny, llvm-commits

Tags: #llvm, #libc

Differential Revision: https://reviews.llvm.org/D62155

llvm-svn: 361513
2019-05-23 17:06:46 +00:00
Saleem Abdulrasool 7bbefb13ee Transforms: lower fadd and fsub atomicrmw instructions
`fadd` and `fsub` have recently (r351850) been added as `atomicrmw`
operations. This diff adds lowering cases for them to the LowerAtomic
transform.

Patch by Josh Berdine!

llvm-svn: 361512
2019-05-23 17:03:43 +00:00
Andrea Di Biagio 27b3b5d952 [MCA] Add the ability to compute critical register dependency of an instruction.
This patch adds the methods `getCriticalRegDep()` and `computeCriticalRegDep()` to
class InstructionBase.
The goal is to allow users to obtain information about the critical register
dependency that most affects the latency of an instruction.

These methods are currently unused. However, the long term plan is to use them
in order to allow the computation of a critical-path as part of the bottleneck
analysis. So, this is yet another step towards fixing PR37494.

llvm-svn: 361509
2019-05-23 16:32:19 +00:00
Shoaib Meenai 87226a7202 [AsmPrinter] Treat a narrowing PtrToInt like Trunc
When printing assembly for PtrToInt, AsmPrinter::lowerConstant
incorrectly assumed that if PtrToInt was not converting to an
int with exactly the same number of bits, it must be widening
to a larger int. But this isn't necessarily true; PtrToInt can
also shrink the size, which is useful when you want to produce
a known 32-bit pointer on a 64-bit platform (on x86_64 ELF
this yields a R_X86_64_32 relocation).

The old behavior of falling through to the widening case for a
narrowing PtrToInt yields bogus assembly code like this, which
fails to assemble because the no-op bit and it accidentally
creates is not a valid relocation:

```
        .long   a&-1
```

The fix is to treat a narrowing PtrToInt exactly the same as
it already treats Trunc: just emit the expression and let
the assembler deal with truncating it in the appropriate way.

Patch by Mat Hostetter <mjh@fb.com>.

Differential Revision: https://reviews.llvm.org/D61325

llvm-svn: 361508
2019-05-23 16:29:09 +00:00
Fangrui Song 6aebd8394a [Object] object::ELFObjectFile::symbol_begin(): skip symbol index 0
For clients iterating the symbol table, none expects to handle index 0
(STN_UNDEF). Skip it to improve consistency with other binary formats.
Clients that need STN_UNDEF (e.g. lld) can use
getSectionContentsAsArray(). A test will be added in D62148.

Reviewed By: mtrent

Differential Revision: https://reviews.llvm.org/D62296

llvm-svn: 361506
2019-05-23 16:01:59 +00:00
Don Hinton 0857a4ec20 [cmake] When getting Ninja version, don't include CMakeNinjaFindMake
which doesn't play well with passing CMAKE_MAKE_PROGRAM from the
commandline without a path.

Fixes a bug introduced in r361280.

Thanks to Mikael Holmén for reporting this!

llvm-svn: 361501
2019-05-23 15:03:22 +00:00
Cameron McInally 1312225f8c [NFC][InstCombine] Add unary FNeg tests to maximum.ll/minimum.ll
llvm-svn: 361500
2019-05-23 14:53:42 +00:00
Lewis Revill 74927554e2 [RISCV] Support assembling TLS LA pseudo instructions
This patch adds the pseudo instructions la.tls.ie and la.tls.gd, used in
the initial-exec and global-dynamic TLS models respectively when
addressing a global. The pseudo instructions are expanded in the
assembly parser.

llvm-svn: 361499
2019-05-23 14:46:27 +00:00
Nico Weber 465868d632 gn build: Merge r361487
llvm-svn: 361498
2019-05-23 13:59:44 +00:00
Petar Jovanovic aa28b6d198 [LiveDebugValues] Rename 'DMI' into 'DebugInstr' (NFC)
This will improve code readability.

Patch by Djordje Todorovic.

Differential Revision: https://reviews.llvm.org/D62295

llvm-svn: 361497
2019-05-23 13:49:06 +00:00
Andrea Di Biagio dd0d9e01ee [MCA] Introduce class LSUnitBase and let LSUnit derive from it.
Class LSUnitBase provides a abstract interface for all the concrete LS units in
llvm-mca.

Methods exposed by the public abstract LSUnitBase interface are:
 - Status isAvailable(const InstRef&);
 - void dispatch(const InstRef &);
 - const InstRef &isReady(const InstRef &);

LSUnitBase standardises the API, but not the data structures internally used by
LS units. This allows for more flexibility.
Previously, only method `isReady()` was declared virtual by class LSUnit.
Also, derived classes had to inherit all the internal data members of LSUnit.

No functional change intended.

llvm-svn: 361496
2019-05-23 13:42:47 +00:00
Simon Pilgrim 46806749ac [X86] Regenerate LZCNT tests on x86/x32/x64 targets
llvm-svn: 361495
2019-05-23 13:30:10 +00:00
Alex Bradbury 5dabe03b41 [RISCV][NFC] Add nounwind attribute to functions missing it in test/CodeGen/RISCV
r360897 was incomplete, must have applied an old/wip patch. This is in preparation for emitting CFI directives.

llvm-svn: 361493
2019-05-23 12:43:13 +00:00
Fangrui Song a4c7873dac [llvm-objdump][test] Make MachO test names consistent
We have macho-disassembl{e,y}-*. Rename macho-disassembly-* to
macho-disassemble-* for consistency.

llvm-svn: 361492
2019-05-23 12:43:08 +00:00
James Henderson 591c793b48 [llvm-objdump][test] Make test names consistent
This change renames a number of the disassembly tests to standardise
disasm/diassemble/disassembly to disassemble. Requested in
https://reviews.llvm.org/D62255.

llvm-svn: 361491
2019-05-23 12:38:06 +00:00
Clement Courbet 43882b16a3 [MergeICmps] Make the pass compatible with the new pass manager.
Reviewers: gchatelet, spatel

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62287

llvm-svn: 361490
2019-05-23 12:35:26 +00:00
James Henderson 903f5b05e2 [llvm-objdump][test] Improve testing of some switches #3
This is the third commit in a series of patches to improve test coverage
of llvm-objdump. In this patch I have added a number of tests testing
various aspects of disassembly.

Reviewed by: MaskRay, grimar, rupprecht

Differential Revision: https://reviews.llvm.org/D62255

llvm-svn: 361489
2019-05-23 12:30:39 +00:00
Simon Pilgrim 46165b2409 [AMDGPU] Regenerate vector sub tests
llvm-svn: 361485
2019-05-23 11:27:28 +00:00
Konrad Kleine 248a13057a [lldb] NFC modernize codebase with modernize-use-nullptr
Summary:
NFC = [[ https://llvm.org/docs/Lexicon.html#nfc | Non functional change ]]

This commit is the result of modernizing the LLDB codebase by using
`nullptr` instread of `0` or `NULL`. See
https://clang.llvm.org/extra/clang-tidy/checks/modernize-use-nullptr.html
for more information.

This is the command I ran and I to fix and format the code base:

```
run-clang-tidy.py \
	-header-filter='.*' \
	-checks='-*,modernize-use-nullptr' \
	-fix ~/dev/llvm-project/lldb/.* \
	-format \
	-style LLVM \
	-p ~/llvm-builds/debug-ninja-gcc
```

NOTE: There were also changes to `llvm/utils/unittest` but I did not
include them because I felt that maybe this library shall be updated in
isolation somehow.

NOTE: I know this is a rather large commit but it is a nobrainer in most
parts.

Reviewers: martong, espindola, shafik, #lldb, JDevlieghere

Reviewed By: JDevlieghere

Subscribers: arsenm, jvesely, nhaehnle, hiraditya, JDevlieghere, teemperor, rnkovacs, emaste, kubamracek, nemanjai, ki.stfu, javed.absar, arichardson, kbarton, jrtc27, MaskRay, atanasyan, dexonsmith, arphaman, jfb, jsji, jdoerfert, lldb-commits, llvm-commits

Tags: #lldb, #llvm

Differential Revision: https://reviews.llvm.org/D61847

llvm-svn: 361484
2019-05-23 11:14:47 +00:00
Roman Lebedev 32d976bac1 [NFC][X86] Fix check prefixes and autogenerate fold-pcmpeqd-2.ll test
Being affected by (sub %x, c) -> (add %x, (sub 0, c))
patch in an uncertain way.

llvm-svn: 361483
2019-05-23 10:55:13 +00:00
Andrea Di Biagio 28afd8dc71 [MCA] Make the bool conversion operator in class InstRef explicit. NFCI
This patch makes the bool conversion operator in InstRef explicit.
It also adds a operator< to hel comparing InstRef objects in sets.

llvm-svn: 361482
2019-05-23 10:50:01 +00:00
Petar Jovanovic ff47d83e78 [DwarfExpression] Refactor dwarf expression (NFC)
Refactor location description kind in order to be easier for extensions
(needed for D60866).
In addition, cut off some bits from the other class fields.

Patch by Djordje Todorovic.

Differential Revision: https://reviews.llvm.org/D62002

llvm-svn: 361480
2019-05-23 10:37:13 +00:00
James Henderson e51b9e42b6 [llvm-objdump][test] Improve testing of some switches #2
This patch focuses on adding additional testing for the --source switch.
For reference, the source-interleave-x86_64.ll test file has been split
into two parts - the input (shared with the other tests) and the test
itself.

Reviewed by: MaskRay, rupprecht, grimar

Differential Revision: https://reviews.llvm.org/D61996

llvm-svn: 361479
2019-05-23 10:17:10 +00:00
George Rimar e98a8f7b2a [llvm-objcopy] - Many minor NFC changes to cleanup/improve the code in ELF/Object.cpp.
The code in ELF/Object.cpp is sometimes a bit hard to read because of
lots of auto used everywhere. The main intention of this patch is
to replace them with the real type for places where it is not obvious.
Also it cleanups few places.

It is NFC change, but I want to be sure that there is no objections to do that since it
is massive.

DIfferential revision: https://reviews.llvm.org/D62260

llvm-svn: 361466
2019-05-23 09:18:57 +00:00
Sam Parker 617cdc5a6d [ARM][CGP] Clear SafeWrap before each search
The previous patch added a member set to store instructions that we
could allow to wrap. But this wasn't cleared between searches meaning
that they could get promoted, incorrectly, during the promotion of a
separate valid chain.

Differential Revision: https://reviews.llvm.org/D62254

llvm-svn: 361462
2019-05-23 07:46:39 +00:00
Christian Bruel 4a7da98bd9 [GlobalOpt] recognize dead struct fields and propagate values
Summary:
Allow struct fields SRA and dead stores. This works by considering fields accesses from getElementPtr to be considered as a possible pointer root that can be cleaned up.
We check that the variable can be SRA by recursively checking the sub expressions with the new isSafeSubSROAGEP function.

basically this allows the array in following C code  to be optimized out 

struct Expr {
  int a[2];
  int b;
};

static struct Expr e;

int foo (int i)
{
  e.b = 2;
  e.a[i] = 1;
  return e.b;
}


Reviewers: greened, bkramer, nicholas, jmolloy

Reviewed By: jmolloy

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D61911

llvm-svn: 361460
2019-05-23 05:53:10 +00:00
Thomas Lively 1a3cbe720c [WebAssembly] Implement __builtin_return_address for emscripten
Summary:
In this patch, `ISD::RETURNADDR` is lowered on the emscripten target
to the new Emscripten runtime function `emscripten_return_address`, which
implements the functionality.

Patch by Guanzhong Chen

Reviewers: tlively, aheejin

Reviewed By: tlively

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62210

llvm-svn: 361454
2019-05-23 01:24:01 +00:00
Fangrui Song 86c9ca48c3 [X86] Support -fno-plt __tls_get_addr calls
In general dynamic/local dynamic TLS models, with -fno-plt,

* x86: emit `calll *___tls_get_addr@GOT(%ebx)` instead of `calll ___tls_get_addr@PLT`
  Note, on x86, if we can get rid of %ebx as the PIC register,
  it may be better to use a register not preserved across function calls.
* x86_64: emit `callq *__tls_get_addr@GOTPCREL(%rip)` instead of `callq __tls_get_addr@PLT`

Reorganize the code by separating 32-bit and 64-bit.

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D62106

llvm-svn: 361453
2019-05-23 01:05:13 +00:00
Seiya Nuta ada9d2d884 [llvm-objcopy] Add file names to error messages
Summary:
This patch adds the file names to llvm-objcopy error messages. It makes easy to identify which file causes an error.

Bugzilla: https://bugs.llvm.org/show_bug.cgi?id=41798

Reviewers: espindola, alexshap, rupprecht, jhenderson, jakehehrlich

Reviewed By: rupprecht, jhenderson, jakehehrlich

Subscribers: emaste, arichardson, jakehehrlich, MaskRay, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D61993

llvm-svn: 361450
2019-05-23 00:42:46 +00:00
Peter Collingbourne 8477d68ad8 gn build: Merge r361418.
llvm-svn: 361449
2019-05-23 00:31:55 +00:00
Thomas Preud'homme f3b9bb3d69 [FileCheck] Introduce substitution subclasses
Summary:
With now a clear distinction between string and numeric substitutions,
this patch introduces separate classes to represent them with a parent
class implementing the common interface. Diagnostics in
printSubstitutions() are also adapted to not require knowing which
substitution is being looked at since it does not hinder clarity and
makes the implementation simpler.

Reviewers: jhenderson, jdenny, probinson, arichardson

Subscribers: llvm-commits, probinson, arichardson, hiraditya

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62241

llvm-svn: 361446
2019-05-23 00:10:29 +00:00
Thomas Preud'homme 1a944d27b2 FileCheck: Improve FileCheck variable terminology
Summary:
Terminology introduced by [[#]] blocks is confusing and does not
integrate well with existing terminology.

First, variables referred by [[]] blocks are called "pattern variables"
while the text a CHECK directive needs to match is called a "CHECK
pattern". This is inconsistent with variables in [[#]] blocks since
[[#]] blocks are also found in CHECK pattern yet those variables are
called "numeric variable".

Second, the replacing of both [[]] and [[#]] blocks by the value of the
variable or expression they contain is represented by a
FileCheckPatternSubstitution class. The naming refers to being a
substitution in a CHECK pattern but could be wrongly understood as being
a substitution of a pattern variable.

Third and lastly, comments use "numeric expression" to refer both to the
[[#]] blocks as well as to the numeric expressions these blocks contain
which get evaluated at match time.

This patch solves these confusions by
- calling variables in [[]] and [[#]] blocks as string and numeric
  variables respectively;
- referring to [[]] and [[#]] as substitution *blocks*, with the former
  being a string substitution block and the latter a numeric
  substitution block;
- calling [[]] and [[#]] blocks to be replaced by the value of a
  variable or expression they contain a substitution (as opposed to
  definition when these blocks are used to defined a variable), with the
  former being a string substitution and the latter a numeric
  substitution;
- renaming the FileCheckPatternSubstitution as a FileCheckSubstitution
  class with FileCheckStringSubstitution and
  FileCheckNumericSubstitution subclasses;
- restricting the use of "numeric expression" to refer to the expression
  that is evaluated in a numeric substitution.

While numeric substitution blocks only support numeric substitutions of
numeric expressions at the moment there are plans to augment numeric
substitution blocks to support numeric definitions as well as both a
numeric definition and numeric substitution in the same numeric
substitution block.

Reviewers: jhenderson, jdenny, probinson, arichardson

Subscribers: hiraditya, arichardson, probinson, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62146

llvm-svn: 361445
2019-05-23 00:10:14 +00:00
Lang Hames a98a4fb57f [ORC] Remove a stray decl that accidentally found its way in to r361322.
llvm-svn: 361441
2019-05-22 22:57:40 +00:00
Lang Hames 00be4e68ad [docs] Make a note of the HowToUseLLJIT example in the ORCv2 design doc.
llvm-svn: 361437
2019-05-22 21:44:46 +00:00
Chris Bieneman ed00367961 [Runtimes] If LLVM_INCLUDE_TESTS=On depend on gtest
Summary: If we are building the tests for the runtimes we should make them depend on gtest so that gtest is built and ready before we run any of the check-* targets.

Reviewers: phosek, compnerd

Reviewed By: compnerd

Subscribers: mgorny, winksaville, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62269

llvm-svn: 361436
2019-05-22 21:42:06 +00:00
Lang Hames e3748b5a85 Add a HowToUseLLJIT example project.
A very minimal demo of how to use the LLJIT class, along the lines of the old
HowToUseJIT example.

llvm-svn: 361435
2019-05-22 21:38:41 +00:00
Matt Arsenault b79a25b124 TableGen: Handle nontrivial foreach range bounds
This allows using anything that isn't a literal integer as the bounds
for a foreach. Some of the diagnostics aren't perfect, but nobody ever
accused tablegen of having good errors. For example, the existing
wording suggests a bitrange is valid, but as far as I can tell this
has never worked.

Fixes bug 41958.

llvm-svn: 361434
2019-05-22 21:28:20 +00:00
Petr Hosek 81f433b48c [runtimes] Move libunwind, libc++abi and libc++ to lib/$target/c++ and include/c++
This change is a consequence of the discussion in "RFC: Place libs in
Clang-dedicated directories", specifically the suggestion that
libunwind, libc++abi and libc++ shouldn't be using Clang resource
directory. Tools like clangd make this assumption, but this is
currently not true for the LLVM_ENABLE_PER_TARGET_RUNTIME_DIR build.
This change addresses that by moving the output of these libraries to
lib/$target/c++ and include/c++ directories, leaving resource directory
only for compiler-rt runtimes and Clang builtin headers.

Differential Revision: https://reviews.llvm.org/D59168

llvm-svn: 361432
2019-05-22 21:08:33 +00:00
Craig Topper 93f38e1f1a [X86] Explcitly disable VEXTRACT instruction matching for an immediate of 0. Remove a bunch of isel patterns that become unnecessary.
We effectively had a second set of isel patterns that tried to use a
regular store instruction and an extract_subreg instruction. Or a masked move
and an extract_subreg. These patterns were intended to override the
matching of VEXTRACT instructions by taking advantage of the priority
of the explicit immediate 0 for the index.

This patch instaed just disables the immediate 0 matchin the VEXTRACT
patterns. This each of the component pieces of the larger patterns will
match by themselves.

This found a bug of sorts were we didn't use 128-bit store for 512->128
extract on KNL. Its unclear what the right thing here should be.
Using the vextract avoids constraining the register allocator to use
xmm0-15. But it always results in a longer encoding if the register
allocator ends up choosing xmm0-15 anyway.

llvm-svn: 361431
2019-05-22 21:00:18 +00:00
Galina Kistanova ed49f6d8e6 Reverted r361134 because of a failing test left unattended for a long time.
http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win/builds/17792/steps/test-check-all/logs/stdio
Failing Tests (1):
    LLVM :: CodeGen/AMDGPU/regbank-reassign.mir

llvm-svn: 361430
2019-05-22 20:42:56 +00:00
Craig Topper 9816d55776 [X86][InstCombine] Remove InstCombine code that turns X86 round intrinsics into llvm.ceil/floor. Remove some isel patterns that existed because that was happening.
We were turning roundss/sd/ps/pd intrinsics with immediates of 1 or 2 into
llvm.floor/ceil.  The llvm.ceil/floor intrinsics are supposed to correspond
to the libm functions.  For the libm functions we need to disable the
precision exception so the llvm.floor/ceil functions should always map to
encodings 0x9 and 0xA.

We had a mix of isel patterns where some used 0x9 and 0xA and others used
0x1 and 0x2. We need to be consistent and always use 0x9 and 0xA.

Since we have no way in isel of knowing where the llvm.ceil/floor came
from, we can't map X86 specific intrinsics with encodings 1 or 2 to it.
We could map 0x9 and 0xA to llvm.ceil/floor instead, but I'd really like
to see a use case and optimization advantage first.

I've left the backend test cases to show the blend we now emit without
the extra isel patterns. But I've removed the InstCombine tests completely.

llvm-svn: 361425
2019-05-22 20:04:55 +00:00
Craig Topper 2f1895e03d [X86] Add more icelake model numbers to getHostCPUName.
Using model numbers found in Table 2-1 of the May 2019 version
of the Intel Software Developer's Manual Volume 4.

llvm-svn: 361422
2019-05-22 19:51:35 +00:00
Nico Weber 76a8a0cb58 gn build: Fix check-clangd target after r359825
llvm-svn: 361419
2019-05-22 19:03:45 +00:00
Alexey Lapshin 53726588f6 [DebugInfo][AArch64] Recognise target specific instruction as mov instr
This fix is for the problem from https://bugs.llvm.org/show_bug.cgi?id=38714.
Specifically, Simple Register Coalescing creates following conversion :

 undef %0.sub_32:gpr64 = ORRWrs $wzr, %3:gpr32common, 0, debug-location !24;

It copies 32-bit value from gpr32 into gpr64. But Live DEBUG_VALUE analysis
is not able to create debug location record for that instruction. So the problem
is in that debug info for argc variable is incorrect. The fix is
to write custom isCopyInstrImpl() which would recognize the ORRWrs instr.

llvm-svn: 361417
2019-05-22 18:48:58 +00:00
Hiroshi Yamauchi dfeb797455 [PGO][CHR] Speed up following long use-def chains.
Summary: Avoid visiting an instruction more than once by using a map.

Reviewers: davidxl

Reviewed By: davidxl

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62262

llvm-svn: 361416
2019-05-22 18:37:34 +00:00
Cameron McInally adea0b6b40 [NFC][InstCombine] Add unary fneg tests to maxnum.ll/minnum.ll
llvm-svn: 361415
2019-05-22 18:27:43 +00:00
Xing Xue 4246b75295 Disable EHFrameSupport in JITLink/RuntimeDyld on AIX
Summary:
EH Frames aren't supported on AIX with the system compiler, but the definition of HAVE_EHTABLE_SUPPORT misses this which causes linking problems on AIX. This patch updates the definition of HAVE_EHTABLE_SUPPORT in both JITLink and RuntimeDyld.

Author: daltenty

Reviewers: sfertile, xingxue, hubert.reinterpretcase

Reviewed By: xingxue

Subscribers: hiraditya, jsji, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62203

llvm-svn: 361410
2019-05-22 17:41:27 +00:00
Roman Lebedev 5e1ce15c5d [NFC][X86][AArch64] Add tests for missing (x - y) + -1 -> not(y) + x fold
https://rise4fun.com/Alive/OaY

llvm-svn: 361409
2019-05-22 16:58:26 +00:00
Matt Arsenault 418e23e33c AMDGPU: Move disassembler support check to constructor
Don't check for unsupported targets for every instruction.

llvm-svn: 361406
2019-05-22 16:28:48 +00:00
Matt Arsenault ca64ef2043 MC: Allow getMaxInstLength to depend on the subtarget
Keep it optional in cases this is ever needed in some global
context. Currently it's only used for getting an upper bound inline
asm code size.

For AMDGPU, gfx10 increases the maximum instruction size to
20-bytes. This avoids penalizing older subtargets when estimating code
size, and making some annoying branch relaxation test adjustments.

llvm-svn: 361405
2019-05-22 16:28:41 +00:00
Kees Cook c2187c20a4 [TargetLowering] Extend bool args to inline-asm according to getBooleanType
Summary:
This extends Krzysztof Parzyszek's X86-specific solution
(https://reviews.llvm.org/D60208) to the generic code pointed out by
James Y Knight.

Reviewers: kparzysz, craig.topper, nickdesaulniers

Subscribers: efriedma, sdardis, nemanjai, javed.absar, eraman, fedor.sergeev, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, jsji, llvm-commits, srhines, void, nickdesaulniers, jyknight

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60224

llvm-svn: 361404
2019-05-22 16:16:15 +00:00
Kees Cook a7a687e500 [TargetLowering] Add blank line (test commit)
llvm-svn: 361403
2019-05-22 16:02:13 +00:00
Nico Weber 09fb2029e5 llvm-undname: Fix an assert-on-invalid, found by oss-fuzz
If a template parameter refers to a pointer to member, but the mangling
of that was a string literal instead of a real symbol, llvm-undname used
to crash instead of rejecting the input.

llvm-svn: 361402
2019-05-22 15:53:23 +00:00
Sanjay Patel 5a4f7cf2ff [IR] allow fast-math-flags on select of FP values
This is a minimal start to correcting a problem most directly discussed in PR38086:
https://bugs.llvm.org/show_bug.cgi?id=38086

We have been hacking around a limitation for FP select patterns by using the
fast-math-flags on the condition of the select rather than the select itself.
This patch just allows FMF to appear with the 'select' opcode. No changes are
needed to "FPMathOperator" because it already includes select-of-FP because
that definition is based on the (return) value type.

Once we have this ability, we can start correcting and adding IR transforms
to use the FMF on a 'select' instruction. The instcombine and vectorizer test
diffs only show that the IRBuilder change is behaving as expected by applying
an FMF guard value to 'select'.

For reference:
rL241901 - allowed FMF with fcmp
rL255555 - allowed FMF with FP calls

Differential Revision: https://reviews.llvm.org/D61917

llvm-svn: 361401
2019-05-22 15:50:46 +00:00
David Zarzycki be0e70dcde Unbreak non-PIC builds after r361340/D62174
llvm-svn: 361399
2019-05-22 15:48:12 +00:00
Roman Lebedev 1f63d7fef9 [NFC][ARM] addsubcarry-promotion.ll: whoops - replace '.' with '-' in check-prefix
Does not affect update_llc_test_checks, or the actual output,
but is not accepted by the actual FileCheck.

Sorry, i should have noticed this before committing,
not the very next second after..

llvm-svn: 361398
2019-05-22 15:42:33 +00:00
Roman Lebedev 1b45bdf5ba [NFC][ARM] Autogenerate addsubcarry-promotion.ll test
Being affected by upcoming patch

llvm-svn: 361397
2019-05-22 15:34:51 +00:00
Roman Lebedev 6a53135698 [NFC][X86] Autogenerate negative-offset.ll test
Being affected by upcoming patch

llvm-svn: 361396
2019-05-22 15:34:43 +00:00
Fangrui Song c289d218b9 [llvm-objdump] Dump inline relocations if the relocated section is specified with --section
This fixes PR41886: llvm-objdump -d -r -j .text doesn't show inline relocations of .text

While here, switch to stable_sort() because we don't want to change the order of relocations applied to the same location. gABI says consecutive relocation records are composed together and their order matters. In practise it is difficult to see relocations applied to the same location not consecutive, we just have to keep the relative order of relocations with the same offset.

Reviewed By: grimar

Differential Revision: https://reviews.llvm.org/D62253

llvm-svn: 361395
2019-05-22 15:12:51 +00:00
Ilya Biryukov e7230ea7c9 Reland r361148 with a fix to the buildbot failure.
Reverted in r361377.
Also reland the '.gn' files (reverted in r361389).

llvm-svn: 361391
2019-05-22 14:44:45 +00:00
Roman Lebedev 406421b332 [NFC][X86][AArch64] Rewrite sink-addsub-of-const.ll tests to have full permutation coverage
Somehow missed some patterns initially..
While there, add comments.

llvm-svn: 361390
2019-05-22 14:42:41 +00:00
Nico Weber 86c5d9f6d5 gn build: Merge r361377
llvm-svn: 361389
2019-05-22 14:31:22 +00:00
Simon Pilgrim 3c05cad03e LoopVectorizationCostModel::selectInterleaveCount - assert we have a non-zero loop cost. NFCI.
The input LoopCost value can be zero, but if so it should be recalculated with the current VF. After that it should always be non-zero.

llvm-svn: 361387
2019-05-22 14:18:17 +00:00
Dmitry Preobrazhensky 7773fc478d [AMDGPU][MC] Corrected parsing of op_sel* and neg_* modifiers
See bug 41361: https://bugs.llvm.org/show_bug.cgi?id=41361

Reviewers: artem.tamazov, arsenm

Differential Revision: https://reviews.llvm.org/D61012

llvm-svn: 361386
2019-05-22 13:59:01 +00:00
Clement Courbet b9274f2694 [llvm-exegesis] Move native target initialization code to a separate file.
Summary: This helps building internal tools on top of the library.

Reviewers: gchatelet

Subscribers: tschuett, llvm-commits, bdb, ondrasej

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62239

llvm-svn: 361385
2019-05-22 13:50:16 +00:00
James Henderson 5316a0d200 [llvm-objcopy] Tidy up error messages
This patch brings various error messages into line with each other, by
removing trailing full stops, and making the first letter lower-case.
This addresses https://bugs.llvm.org/show_bug.cgi?id=40859.

Reviewed by: jhenderson, rupprecht, jakehehrlich

Differential Revision: https://reviews.llvm.org/D62072

Patch by Alex Brachet

llvm-svn: 361384
2019-05-22 13:23:26 +00:00
Roman Lebedev 7c72ca012d UpdateTestChecks: sparc march handling
Summary:
Another target that prefers to use `-march` in tests
```
llvm/test/CodeGen/SPARC$ grep -ri mtriple | wc -l
25
llvm/test/CodeGen/SPARC$ grep -ri march | wc -l
165
```

This test is being affected by a further patch,
so regenerate it to better visualize the changes

Reviewers: RKSimon, dcederman, gberry

Reviewed By: RKSimon

Subscribers: jyknight, fedor.sergeev, jrtc27, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62242

llvm-svn: 361381
2019-05-22 13:04:34 +00:00
Roman Lebedev 4bf35671b5 [NFC][SystemZ] Autogenerate alloca-03.ll test to make test changes more visible
The check lines are being affected by an upcoming patch,
regenerate the checklines to visualize the changes better.

llvm-svn: 361380
2019-05-22 13:04:24 +00:00
Simon Pilgrim 9b40dd6318 [Hexagon] assert getRegisterBitWidth returns non-zero value. NFCI.
Fixes scan-build warning.

llvm-svn: 361375
2019-05-22 12:25:46 +00:00
Simon Pilgrim cfe6fe06ab [VirtualFileSystem] Fix uninitialized variable warning. NFCI.
llvm-svn: 361371
2019-05-22 11:20:52 +00:00
Sjoerd Meijer aa4f1ffca4 [TargetMachine] error message unsupported code model
When the tiny code model is requested for a target machine that does not
support this, we get an error message (which is nice) but also this diagnostic
and request to submit a bug report:

    fatal error: error in backend: Target does not support the tiny CodeModel
    [Inferior 2 (process 31509) exited with code 0106]
    clang-9: error: clang frontend command failed with exit code 70 (use -v to see invocation)
    (gdb) clang version 9.0.0 (http://llvm.org/git/clang.git 29994b0c63a40f9c97c664170244a7bba5ecc15e) (http://llvm.org/git/llvm.git 95606fdf91c2d63a931e865f4b78b2e9828ddc74)
    Target: arm-arm-none-eabi
    Thread model: posix
    clang-9: note: diagnostic msg: PLEASE submit a bug report to https://bugs.llvm.org/ and include the crash backtrace, preprocessed source, and associated run script.
    clang-9: note: diagnostic msg:
    ********************
    PLEASE ATTACH THE FOLLOWING FILES TO THE BUG REPORT:
    Preprocessed source(s) and associated run script(s) are located at:
    clang-9: note: diagnostic msg: /tmp/tiny-dfe1a2.c
    clang-9: note: diagnostic msg: /tmp/tiny-dfe1a2.sh
    clang-9: note: diagnostic msg:

But this is not a bug, this is a feature. :-) Not only is this not a bug, this
is also pretty confusing. This patch causes just to print the fatal error and
not the diagnostic:

fatal error: error in backend: Target does not support the tiny CodeModel

Differential Revision: https://reviews.llvm.org/D62236

llvm-svn: 361370
2019-05-22 10:40:26 +00:00
Martin Storsjo de6038b265 [llvm-dlltool] Respect NONAME keyword
This adds proper handling of the NONAME-keyword, which makes llvm-dlltool
generate an import using the ordinal instead of the name.

Patch by by Jannik Vogel, test added by Stefan Schmidt.

Differential Revision: https://reviews.llvm.org/D62175

llvm-svn: 361367
2019-05-22 09:49:54 +00:00
Clement Courbet f8f93ba90d Re-land r361257 "[MergeICmps][NFC] Make BCEAtom move-only.""
llvm-svn: 361366
2019-05-22 09:45:40 +00:00
Anton Afanasyev df00c6a54f [MIR] Add simple PRE pass to MachineCSE
This is the second part of the commit fixing PR38917 (hoisting
partitially redundant machine instruction). Most of PRE (partitial
redundancy elimination) and CSE work is done on LLVM IR, but some of
redundancy arises during DAG legalization. Machine CSE is not enough
to deal with it. This simple PRE implementation works a little bit
intricately: it passes before CSE, looking for partitial redundancy
and transforming it to fully redundancy, anticipating that the next
CSE step will eliminate this created redundancy. If CSE doesn't
eliminate this, than created instruction will remain dead and eliminated
later by Remove Dead Machine Instructions pass.

The third part of the commit is supposed to refactor MachineCSE,
to make it more clear and to merge MachinePRE with MachineCSE,
so one need no rely on further Remove Dead pass to clear instrs
not eliminated by CSE.

First step: https://reviews.llvm.org/D54839

Fixes llvm.org/PR38917

llvm-svn: 361356
2019-05-22 07:41:34 +00:00
Fangrui Song 1c61471ab1 [PPC64] Parse -elfv1 -elfv2 when specified on target triple
Summary:
For big-endian powerpc64, the default ABI is ELFv1. OpenPower ABI ELFv2 is supported when -mabi=elfv2 is specified. FreeBSD support for PowerPC64 ELFv2 ABI with LLVM is in progress[1]. This patch adds an alternative way to specify ELFv2 ABI on target triple [2].

The following results are expected:

ELFv1 when using:
-target powerpc64-unknown-freebsd12.0
-target powerpc64-unknown-freebsd12.0 -mabi=elfv1
-target powerpc64-unknown-freebsd12.0-elfv1

ELFv2 when using:
-target powerpc64-unknown-freebsd12.0 -mabi=elfv2
-target powerpc64-unknown-freebsd12.0-elfv2

[1] https://wiki.freebsd.org/powerpc/llvm-elfv2
[2] https://clang.llvm.org/docs/CrossCompilation.html

Patch by Alfredo Dal'Ava Júnior!

Differential Revision: https://reviews.llvm.org/D61950

llvm-svn: 361355
2019-05-22 07:29:59 +00:00
Sjoerd Meijer eec021658b [AArch64] Subtarget crypto extension defaults
The Armv8.2-A crypto extensions all defaulted to true, but should default to
false, like all the other extensions.

Differential Revision: https://reviews.llvm.org/D62180

llvm-svn: 361354
2019-05-22 07:10:27 +00:00
Nikita Popov 15df05152d [X86] Don't compare i128 through vector if construction not cheap (PR41971)
Fix for https://bugs.llvm.org/show_bug.cgi?id=41971. Make the
combineVectorSizedSetCCEquality() transform more conservative by
checking that the bitcast to the vector type will be cheap/free
for both operands. I'm considering it cheap if it's a constant,
a load or already a vector. I've dropped the explicit check for
f128 because it should fall out naturally (in the cases where
it'd be detrimental).

Differential Revision: https://reviews.llvm.org/D62220

llvm-svn: 361352
2019-05-22 06:47:06 +00:00
Serge Guelton 94c36fa15b Properly categorize llvm-objdump options
Filters out noise, and distinguish Mach-O related options from others.

Differential Revision: https://reviews.llvm.org/D62195

llvm-svn: 361351
2019-05-22 06:30:46 +00:00
Seiya Nuta 3fcf1f5d29 [NFC] Remove a blank line (test commit)
llvm-svn: 361349
2019-05-22 04:48:26 +00:00
Chen Zheng b727b0483c [PowerPC] use meaningful name for displacement form aligned with x-form - NFC
llvm-svn: 361347
2019-05-22 03:17:39 +00:00
Chen Zheng 9970665f60 [PowerPC] [ISEL] select x-form instruction for unaligned offset
Differential Revision: https://reviews.llvm.org/D62173

llvm-svn: 361346
2019-05-22 02:57:31 +00:00
Don Hinton 120a6f09bb [Docs] Increase Doxygen cache size
Summary:
When building Doxygen docs for llvm and clang, it helpfully prints a warning at
the end noting that the `LOOKUP_CACHE_SIZE` value was too small to keep all
symbols in memory.

By increasing to the size it recommends, Doxygen builds have greatly improved
performance. On my machine, time to run `doxygen-llvm` changes from 34 minutes
to 22 minutes, which is a decent amount of time saved by changing a single
number.

Reviewed By: hintonda

Patch by J. Ryan Stinnett!

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D62138

llvm-svn: 361343
2019-05-22 00:56:42 +00:00
Pengfei Wang 6a0d432e9e [X86] [CET] Deal with return-twice function such as vfork, setjmp when
CET-IBT enabled

Return-twice functions will indirectly jump after the caller's position.
So when CET-IBT is enable, we should make sure these is endbr*
instructions follow these Return-twice function caller. Like GCC does.

Patch by Xiang Zhang (xiangzhangllvm)

Differential Revision: https://reviews.llvm.org/D61881

llvm-svn: 361342
2019-05-22 00:50:21 +00:00
Sanjay Patel 587d4b0620 [Docs] fix formatting for bullet list; NFC
llvm-svn: 361341
2019-05-22 00:48:47 +00:00
Petr Hosek c87a45d471 [Analysis] Link library dependencies to Analysis plugins
These are needed to avoid undefined symbols which aren't satisfied
by Clang itself.

Differential Revision: https://reviews.llvm.org/D62174

llvm-svn: 361340
2019-05-22 00:47:37 +00:00
Sanjay Patel 6a554188aa [InstCombine] fold shuffles of insert_subvectors
This should be a valid exception to the general rule of not creating new shuffle masks in IR...
because we already do it. :)
Also, DAG combining/legalization will undo this by widening the shuffle back out if needed.

Explanation for how we already do this: SLP or vector source can create chains of insert/extract
as shown in 1 of the examples from PR16739:
https://godbolt.org/z/NlK7rA
https://bugs.llvm.org/show_bug.cgi?id=16739

And we expect instcombine or DAGCombine to clean that up by creating relatively simple shuffles.

Differential Revision: https://reviews.llvm.org/D62024

llvm-svn: 361338
2019-05-22 00:32:25 +00:00
Matt Arsenault 2cba91b8db AMDGPU: Assume calls read exec
llvm-svn: 361333
2019-05-21 23:23:16 +00:00
Matt Arsenault eea81c20fe AMDGPU: Add some tests for inlineasm behavior
llvm-svn: 361332
2019-05-21 23:23:12 +00:00
Matt Arsenault dd1ffa00a5 AMDGPU: Assume call pseudos are convergent
There should probably be nonconvergent versions, but my guess is it
doesn't matter in practice.

llvm-svn: 361331
2019-05-21 23:23:10 +00:00
Matt Arsenault 60ba03e210 AMDGPU: Fix not marking new gfx10 SGPRs as CSRs
llvm-svn: 361330
2019-05-21 23:23:05 +00:00
Dan Gohman a49496fb2a [WebAssembly] Add the signature for the new llround builtin function
r360889 added new llround builtin functions. This patch adds their
signatures for the WebAssembly backend.

It also adds wasm32 support to utils/update_llc_test_checks.py, since
that's the script other targets are using for their testcases for this
feature.

Differential Revision: https://reviews.llvm.org/D62207

llvm-svn: 361327
2019-05-21 23:06:34 +00:00
Lang Hames a2ee80b084 [ORC] Guarantee unique JITDylib names in lli, add usage notes to createJITDylib.
JITDylibs should have unique names. This patch adds code to lli to respect this
invariant (by refering to the exist JITDylib if a -jd <name> option is specified
more than once). It also adds usage notes to the doxygen comment for
createJITDylib method in ExecutionSession and LLJIT.

http://llvm.org/PR41937

llvm-svn: 361322
2019-05-21 22:07:53 +00:00
Roman Lebedev 675307b1f1 [NFC][AMDGPU] Autogenerate llvm.amdgcn.s.barrier.ll test
llvm-svn: 361320
2019-05-21 21:49:14 +00:00
Roman Lebedev 21e8ec8d4f [NFC][X86] Autogenerate ragreedy-hoist-spill.ll test
llvm-svn: 361319
2019-05-21 21:49:10 +00:00
Roman Lebedev 079d8b425f [NFC][Thumb2] Autogenerate thumb2-ldr_pre.ll test
llvm-svn: 361318
2019-05-21 21:49:05 +00:00
Sanjay Patel 3590bae8d6 [InstCombine] add more tests for shuffle folding; NFC
As discussed in D62024, we want to limit any potential IR
transforms of shuffles to cases where we know the SDAG
conversion would result in equivalent patterns for these
IR variants.

llvm-svn: 361317
2019-05-21 21:45:24 +00:00
Nikita Popov d34d96770e [X86] Add large integer comparison tests for PR41971; NFC
In these cases we would prefer a direct comparison over going through
a vector type.

llvm-svn: 361315
2019-05-21 21:27:08 +00:00
Cameron McInally 17fdf1d383 [NFC][InstCombine] Add unary fneg tests to operand-complexity.ll.
llvm-svn: 361311
2019-05-21 21:07:46 +00:00
Cameron McInally 872dc79f20 [NFC][InstCombine] Add unary FNeg tests to X86/x86-avx512.ll
llvm-svn: 361308
2019-05-21 20:31:09 +00:00
Saleem Abdulrasool ca5ed496b1 build: enable CMake policy 0077
Enable CMake policy 77. This alters the behavior of option. The old behavior
would remove the value of the option from the cache and create a new one. The
new behavior does not create the variable if it is defined already. This ensures
that subsequent reconfigures will behave identically. This seems better than the
setting of OLD - the desire is to ensure that it is set to OLD or NEW.

llvm-svn: 361307
2019-05-21 20:28:32 +00:00
Yi-Hong Lyu 00e85f7535 Move csr-save-restore-order.ll to the right place
llvm-svn: 361306
2019-05-21 20:28:31 +00:00
Roman Lebedev a7e88f8570 [NFC][X86][AArch64] Add tests for sinking of add/sub by constant through add/sub
Looks we can transform all 8 variants of the pattern:
https://rise4fun.com/Alive/auH

This comes up as an issue on the path towards
https://bugs.llvm.org/show_bug.cgi?id=41952

llvm-svn: 361303
2019-05-21 20:14:54 +00:00
Stanislav Mekhanoshin 44d17ca02e Fix register coalescer failure to prune value
Register coalescer fails for the test in the patch with the assertion in
JoinVals::ConflictResolution `DefMI != nullptr'. It attempts to join
live intervals for two adjacent instructions and erase the copy:

    %2:vreg_256 = COPY %1
    %3:vreg_256 = COPY killed %1

The LI needs to be adjusted to kill subrange for the erased instruction
and extend the subrange of the original def. That was done for the main
interval only but not for the subrange. As a result subrange had a VNI
pointing to the erased slot resulting in the above failure.

Differential Revision: https://reviews.llvm.org/D62162

llvm-svn: 361293
2019-05-21 19:32:41 +00:00
Leonard Chan 9bb96980aa Fix for sphinx bot warning
llvm-svn: 361292
2019-05-21 19:30:25 +00:00
Don Hinton b61f2b6c87 [cmake] Don't use VERSION_GREATER_EQUAL in cmake versions prior to 3.72.
llvm-svn: 361291
2019-05-21 19:25:54 +00:00
Leonard Chan 0bada7ce6c [Intrinsic] Signed Fixed Point Saturation Multiplication Intrinsic
Add an intrinsic that takes 2 signed integers with the scale of them provided
as the third argument and performs fixed point multiplication on them. The
result is saturated and clamped between the largest and smallest representable
values of the first 2 operands.

This is a part of implementing fixed point arithmetic in clang where some of
the more complex operations will be implemented as intrinsics.

Differential Revision: https://reviews.llvm.org/D55720

llvm-svn: 361289
2019-05-21 19:17:19 +00:00
Craig Topper ed6df47bae [X86] Remove an unneeded ZERO_EXTEND creation from LowerINTRINSIC_W_CHAIN. NFC
We were trying to ZERO_EXTEND from an i8 X86ISD::SETCC to i8 again.

llvm-svn: 361288
2019-05-21 19:03:45 +00:00
Sanjay Patel 10f6b39899 [SelectionDAG] fold insert subvector of undef into undef
DAGCombiner simplifies this more liberally as:
  // If inserting an UNDEF, just return the original vector.
  if (N1.isUndef())
    return N0;

So there's no way to make this visible in output AFAIK, but
doing this at node creation time should be slightly more efficient.

llvm-svn: 361287
2019-05-21 18:53:53 +00:00
Don Hinton 76e5a1d3c3 [cmake] Try to make cmake happy and fix bots.
llvm-svn: 361286
2019-05-21 18:51:21 +00:00
Sanjay Patel 51dc59d090 [SelectionDAG] remove redundant code; NFCI
getNode() squashes concatenation of undefs via FoldCONCAT_VECTORS():
  // Concat of UNDEFs is UNDEF.
  if (llvm::all_of(Ops, [](SDValue Op) { return Op.isUndef(); }))
    return DAG.getUNDEF(VT);

llvm-svn: 361284
2019-05-21 18:28:22 +00:00
Don Hinton c1b6b9a177 [cmake] Bug in r361281: make include optional and fix typo which might make a difference on some systems.
llvm-svn: 361282
2019-05-21 18:15:01 +00:00
Clement Courbet 122c6e6f36 [MergeICmps] Make sorting strongly stable on the rhs.
Summary:
Because the sort order was not strongly stable on the RHS, whether the
chain could merge would depend on the order of the blocks in the Phi.

EXPENSIVE_CHECKS would shuffle the blocks before sorting, resulting in
non-deterministic merging.

Reviewers: gchatelet

Subscribers: hiraditya, llvm-commits, RKSimon

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62193

llvm-svn: 361281
2019-05-21 17:58:42 +00:00
Don Hinton bd467cfe4b [cmake] Add custom command to touch archives on Darwin so ninja won't rebuild them.
Summary:
clang and newer versions of ninja use high-resolutions timestamps, but
older versions of libtool on Darwin don't, so the archive will often
get an older timestamp than the last object that was added or updated.
To fix this, we add a custom command to touch the archive after it's
been built so that ninja won't rebuild it unnecessarily the next time
it's run.

Reviewed By: beanz

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62172

llvm-svn: 361280
2019-05-21 17:56:45 +00:00
Nick Desaulniers 92febc6498 [Bugpoint] fix use-after-move. NFC
Summary:
This was flagged in https://www.viva64.com/en/b/0629/ under "Snippet No.
6".

Note that author also states:
"Note that the loop doesn't actually execute at all."

This is not true, but the author can be forgiven; there's two distinct
variables with very similar identifiers:

MiscompiledFunctions
MisCompFunctions

Reviewers: echristo, srhines, RKSimon

Reviewed By: RKSimon

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62113

llvm-svn: 361279
2019-05-21 17:55:26 +00:00
Jonas Devlieghere b43dfaa6c0 [Dsymutil] Remove redundant argument (NFC)
The dwarf streamer already holds a copy of the link options, so there's
no need to pass them as an argument.

llvm-svn: 361276
2019-05-21 17:31:51 +00:00
Chris Bieneman da60a16bc7 [docs] Add new document on building distributions
Summary:
This document is an attempt to provide a guide for best practices for using the LLVM build system to generate distributable LLVM-based tools.

Most of the document is geared toward distributions of LLVM-based toolchains, but much of it also applies to distributing other LLVM-based tools and libraries.

Reviewers: tstellar, phosek, jroelofs, hans, sylvestre.ledru

Reviewed By: tstellar

Subscribers: smeenai, dschuff, arphaman, winksaville, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62040

llvm-svn: 361272
2019-05-21 16:29:31 +00:00
Simon Pilgrim 4b82e50315 [X86][SSE] computeKnownBitsForTargetNode - add X86ISD::ANDNP support
Fixes PACKSS-PSHUFB shuffle regressions mentioned on D61692

llvm-svn: 361270
2019-05-21 15:20:24 +00:00
Sanjay Patel 78c3f58122 [DAGCombiner] prevent unsafe reassociation of FP ops
There are no FP callers of DAGCombiner::reassociateOps() currently,
but we can add a fast-math check to make sure this API is not being
misused.

This was noted as a potential risk (and that risk might increase) with:
D62191

llvm-svn: 361268
2019-05-21 14:47:38 +00:00
Nico Weber a7b9e98fd8 gn build: Merge r361264
llvm-svn: 361267
2019-05-21 14:41:27 +00:00
Clement Courbet 8361a10493 Revert r361257 "[MergeICmps][NFC] Make BCEAtom move-only."
Broke some bots.

llvm-svn: 361263
2019-05-21 14:24:46 +00:00
Nico Weber 440dd6df33 gn build: Run `git ls-files '*.gn' '*.gni' | xargs llvm/utils/gn/gn.py format`
llvm-svn: 361262
2019-05-21 14:22:38 +00:00
Nico Weber e289e98837 gn build: Merge r361252
llvm-svn: 361260
2019-05-21 14:20:46 +00:00
Nico Weber 8287b973f0 gn build: Merge r361233
llvm-svn: 361259
2019-05-21 14:10:55 +00:00
Clement Courbet 8fa970c2d8 [MergeICmps][NFC] Make BCEAtom move-only.
And handle for self-move. This is required so that llvm::sort can work
with EXPENSIVE_CHECKS, as it will do a random shuffle of the input
which can result in self-moves.

llvm-svn: 361257
2019-05-21 13:34:12 +00:00
Paul Robinson 35a2196bd1 Fix typo in r361251.
llvm-svn: 361256
2019-05-21 13:23:32 +00:00
Roman Lebedev d8db224ecb [NFC][X86][AArch64] Shift amount masking: tests that show that 'neg' doesn't last
Meaning if we were to produce 'neg' in dagcombine, we will get an
endless cycle; some inverse transform would need to be guarded somehow.

Also, the 'and (sub 0, x), 31' variant is sticky,
doesn't get optimized in any way.

https://bugs.llvm.org/show_bug.cgi?id=41952

llvm-svn: 361254
2019-05-21 13:04:56 +00:00
Florian Hahn f9b28e53c7 [ScheduleDAGInstrs] Compute topological ordering on demand.
In most cases, the topological ordering does not get changed in
ScheduleDAGInstrs. We can compute the ordering on demand, similar to
D60125.

This drastically cuts down the number of times we need to compute the
topological ordering, e.g. for SPEC2006, SPEC2k and MultiSource, we get
the following stats for -O3 -flto on X86 (showing the top reductions,
with small absolute values filtered). The smallest reduction is -50%.

Slightly positive impact on compile-time (-0.1 % geomean speedup for
test-suite + SPEC & co, with -O1 on X86)

Tests: 243
Metric: pre-RA-sched.NumTopoInits

Program                                        base       patch  diff
 test-suite...ngs-C/fixoutput/fixoutput.test   115.00      3.00   -97.4%
 test-suite...ks/Prolangs-C/cdecl/cdecl.test   957.00     26.00   -97.3%
 test-suite...math/automotive-basicmath.test   107.00      3.00   -97.2%
 test-suite...rolangs-C++/deriv2/deriv2.test   144.00      6.00   -95.8%
 test-suite...lowfish/security-blowfish.test   410.00     18.00   -95.6%
 test-suite...frame_layout/frame_layout.test   441.00     23.00   -94.8%
 test-suite...rolangs-C++/employ/employ.test   159.00     11.00   -93.1%
 test-suite...s/Ptrdist/anagram/anagram.test   157.00     11.00   -93.0%
 test-suite...s-C/unix-smail/unix-smail.test   829.00     59.00   -92.9%
 test-suite...chmarks/Olden/power/power.test   154.00     11.00   -92.9%
 test-suite...T95/147.vortex/147.vortex.test   19876.00  1434.00  -92.8%
 test-suite...000/255.vortex/255.vortex.test   19881.00  1435.00  -92.8%
 test-suite...ce/Applications/Burg/burg.test   2203.00   168.00   -92.4%
 test-suite...urce/Applications/hbd/hbd.test   1067.00    85.00   -92.0%
 test-suite...ternal/HMMER/hmmcalibrate.test   3145.00   251.00   -92.0%
 test-suite.../Applications/spiff/spiff.test   1037.00    84.00   -91.9%
 test-suite...SPEC/CINT95/130.li/130.li.test   5913.00   487.00   -91.8%
 test-suite.../CINT95/134.perl/134.perl.test   12532.00  1041.00  -91.7%
 test-suite...ce/Benchmarks/Olden/bh/bh.test   220.00     19.00   -91.4%
 test-suite :: External/Nurbs/nurbs.test       2304.00   206.00   -91.1%
 test-suite...arks/VersaBench/dbms/dbms.test   773.00     75.00   -90.3%
 test-suite...ce/Applications/siod/siod.test   9043.00   878.00   -90.3%
 test-suite...pplications/treecc/treecc.test   4510.00   438.00   -90.3%
 test-suite...T2006/456.hmmer/456.hmmer.test   7093.00   697.00   -90.2%
 test-suite...s-C/Pathfinder/PathFinder.test   882.00     87.00   -90.1%
 test-suite.../CINT2000/176.gcc/176.gcc.test   64978.00  6721.00  -89.7%
 test-suite...cations/hexxagon/hexxagon.test   657.00     69.00   -89.5%
 test-suite...fice-ispell/office-ispell.test   2712.00   285.00   -89.5%
 test-suite.../CINT2006/403.gcc/403.gcc.test   139613.00 14992.00 -89.3%
 test-suite...lications/ClamAV/clamscan.test   25880.00  2785.00  -89.2%

Reviewers: MatzeB, atrick, efriedma, niravd

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D60839

llvm-svn: 361253
2019-05-21 13:04:53 +00:00
Paul Robinson 0a16ba856b [DebugInfo] Fix tests missed by r362148
llvm-svn: 361251
2019-05-21 12:48:46 +00:00
Paul Robinson 9d5351cab6 De-Window-ize a test
llvm-svn: 361250
2019-05-21 12:08:42 +00:00
Paul Robinson 9c56326934 [DebugInfo] Handle '# line "file"' correctly for asm source.
This provides the correct file path for the original source, rather
than the preprocessed source.

Part of the fix for PR41839.

Differential Revision: https://reviews.llvm.org/D62074

llvm-svn: 361248
2019-05-21 11:59:03 +00:00
Bob Haarman 032f87bbb3 Revert r360902 "Resubmit: [Salvage] Change salvage debug info ..."
This reverts commit rr360902. It caused an assertion failure in
lib/IR/DebugInfoMetadata.cpp: Assertion `(OffsetInBits + SizeInBits <=
FragmentSizeInBits) && "new fragment outside of original fragment"'
failed.

PR41931.

llvm-svn: 361246
2019-05-21 11:53:41 +00:00
Paul Robinson 116e8d4876 [DebugInfo] Handle -main-file-name correctly for asm source.
This option provides only the base filename, not a full relative path.

Part of the fix for PR41839.

Differential Revision: https://reviews.llvm.org/D62071

llvm-svn: 361245
2019-05-21 11:52:27 +00:00
Simon Pilgrim bc03bee66b [X86][SSE] Add shuffle tests for 'splat3' patterns.
Test codegen from shuffles for { dst[0] = dst[1] = dst[2] = *src++; dst += 3 } 'splatting' memcpy patterns generated by loop-vectorizer.

llvm-svn: 361243
2019-05-21 11:42:28 +00:00
Roman Lebedev 2aee73f591 [NFC][X86][AArch64] Add some more tests for shift amount masking
The negation creation should be more eager:
https://bugs.llvm.org/show_bug.cgi?id=41952

llvm-svn: 361241
2019-05-21 11:14:01 +00:00
George Rimar f44eb922c0 [llvm-objdump] Make --disassemble-functions imply -d
Fixes https://bugs.llvm.org/show_bug.cgi?id=41903

Patch by Mike Pozulp!

Differential revision: https://reviews.llvm.org/D62054

llvm-svn: 361240
2019-05-21 11:05:46 +00:00
Clement Courbet a95d95d392 [MergeICmps] Preserve the dominator tree.
Summary: In preparation for D60318 .

Reviewers: gchatelet, efriedma

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62068

llvm-svn: 361239
2019-05-21 11:02:23 +00:00
Fangrui Song cd36a2857e [PPC64] Update LocalEntry from assigned symbols
On PowerPC64 ELFv2 ABI, functions may have 2 entry points: global and local.
The local entry point location of a function is stored in the st_other field of the symbol, as an offset relative to the global entry point.

In order to make symbol assignments (e.g. .equ/.set) work properly with this, PPCTargetELFStreamer already copies the local entry bits from the source symbol to the destination one, on emitAssignment(). The problem is that this copy is performed only at the assignment location, where the source symbol may not yet have processed the .localentry directive, that sets the local entry. This may cause the destination symbol to end up with wrong local entry information. Other symbol info is not affected by this because, in this case, the destination symbol value is actually a symbol reference.

This change keeps track of these assignments, and update all needed st_other fields when finish() is called.

Patch by Leandro Lupori!

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D56586

llvm-svn: 361237
2019-05-21 10:41:25 +00:00
Florian Hahn 4a8835c655 [AArch64] Skip mask checks for masks with an odd number of elements.
Some checks in isShuffleMaskLegal expect an even number of elements,
e.g. isTRN_v_undef_Mask or isUZP_v_undef_Mask, otherwise they access
invalid elements and crash. This patch adds checks to the impacted
functions.

Fixes PR41951

Reviewers: t.p.northover, dmgreen, samparker

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D60690

llvm-svn: 361235
2019-05-21 10:05:26 +00:00
Eugene Leviant ec767b0b4a [llvm-objcopy] Strip file symbols with --strip-unneeded
Differential revision: https://reviews.llvm.org/D61641

llvm-svn: 361231
2019-05-21 09:09:33 +00:00
Cullen Rhodes 7f47b75d18 [AArch64][SVE2] Asm: add integer unary instructions (predicated)
Summary:
Patch adds support for the following instructions:

    * URECPE, URSQRTE, SQABS, SQNEG

The specification can be found here:
https://developer.arm.com/docs/ddi0602/latest

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D62129

llvm-svn: 361230
2019-05-21 09:06:51 +00:00
Cullen Rhodes e798e8d9d2 [AArch64][SVE2] Asm: add integer pairwise arithmetic instructions
Summary:
Patch adds support for the following instructions:

    ADDP, SMAXP, UMAXP, SMINP, UMINP

The specification can be found here:
https://developer.arm.com/docs/ddi0602/latest

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D62128

llvm-svn: 361229
2019-05-21 08:59:00 +00:00
Sam Parker 3141bbd52d [ARM][CGP] Skip nuw in PrepareConstants
PrepareConstants step converts add/sub with 'negative' immediates to
sub/add with a 'positive' imm to make promotion more simple. nuw
already states that the add shouldn't cause an unsigned wrap, so
it shouldn't need any tweaking. Plus, we also don't allow a sub with
a 'negative' immediate to be safe wrap, so this functionality has
been removed. The PrepareConstants step now just handles the add
instructions that we've determined would be safe if they wrap around
zero.

Differential Revision: https://reviews.llvm.org/D62057

llvm-svn: 361227
2019-05-21 07:56:47 +00:00
Petr Hosek 3e272b853f [CMake] Specify component for all target types
This addresses an issue introduced in r360230 which broke existing
use cases of LLVM_DISTRIBUTION_COMPONENTS since ARCHIVE and LIBRARY
target types are no longer handled as components.

Differential Revision: https://reviews.llvm.org/D62176

llvm-svn: 361223
2019-05-21 07:13:58 +00:00
Dylan McKay e967308da4 Add TargetLoweringInfo hook for explicitly setting the ABI calling convention endianess
Summary:
The endianess used in the calling convention does not always match the
endianess of the target on all architectures, namely AVR.

When an argument is too large to be legalised by the architecture and is
split for the ABI, a new hook TargetLoweringInfo::shouldSplitFunctionArgumentsAsLittleEndian
is queried to find the endianess that function arguments must be laid
out in.

This approach was recommended by Eli Friedman.

Originally reported in https://github.com/avr-rust/rust/issues/129.

Patch by Carl Peto.

Reviewers: bogner, t.p.northover, RKSimon, niravd, efriedma

Reviewed By: efriedma

Subscribers: JDevlieghere, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62003

llvm-svn: 361222
2019-05-21 06:38:02 +00:00
QingShan Zhang 690fa1b51b [NFC][PowerPC] Add a test to verify if the scheduler schedule the addi before the load.
llvm-svn: 361221
2019-05-21 06:32:31 +00:00
Nikita Popov e44691bf9f Move thumbv7k test from AArch64 to ARM
As pointed out by charukcs on rL361166, this test uses an ARM triple.

llvm-svn: 361220
2019-05-21 06:24:36 +00:00
Chen Zheng e64bcada5f [PowerPC] test cases for selecting x-form instruction for unaligned offset - NFC
llvm-svn: 361219
2019-05-21 05:06:09 +00:00
Chen Zheng c4c407a0eb [PowerPC] use more meaningful name - NFC
llvm-svn: 361218
2019-05-21 03:54:42 +00:00
Lang Hames f088e195cc [ORC] Assert that JITDylibs have unique names.
Patch by Praveen Velliengiri. Thanks Praveen!

Differential Revision: https://reviews.llvm.org/D62139

llvm-svn: 361215
2019-05-21 03:23:08 +00:00
Nico Weber c6f363f578 Tweaks for setting CMAKE_LINKER to lld-link
- Just look for "lld-link", not "lld-link.exe".
  llvm/cmake/platforms/WinMsvc.cmake for example sets CMAKE_LINKER to
  lld-link without .exe

- Stop passing -gwarf to the compiler in sanitizer options when lld is
  enabled -- there's no reason to use different debug information keyed
  off the linker. (If this was for MinGW, we should check for that
  instead.)

Differential Revision: https://reviews.llvm.org/D62111

llvm-svn: 361214
2019-05-21 03:01:01 +00:00
Nico Weber 4522e26696 Try to fix build with older gccs after r361152
Also merge the cmake change there to the gn build.

llvm-svn: 361209
2019-05-21 00:27:26 +00:00
Nick Desaulniers 28e351af2a [ORC] fix use-after-move. NFC
Summary:
scan-build flagged a potential use-after-move in debug builds.  It's not
safe that a moved from value contains anything but garbage.  Manually
DRY up these repeated expressions.

Reviewers: lhames

Reviewed By: lhames

Subscribers: hiraditya, llvm-commits, srhines

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62112

llvm-svn: 361203
2019-05-20 22:17:43 +00:00
Matt Arsenault 6dd08e335f AMDGPU: Force skip branches over calls
Unfortunately the way SIInsertSkips works is backwards, and is
required for correctness. r338235 added handling of some special cases
where skipping is mandatory to avoid side effects if no lanes are
active. It conservatively handled asm correctly, but the same logic
needs to apply to calls.

Usually the call sequence code is larger than the skip threshold,
although the way the count is computed is really broken, so I'm not
sure if anything was likely to really hit this.

llvm-svn: 361202
2019-05-20 22:04:42 +00:00
Lang Hames 54dc01cbfc [docs] Fix an RST typo: "code-blocks" should be "code-block".
llvm-svn: 361200
2019-05-20 21:33:25 +00:00
Lang Hames 0dcf69eb82 [ORC] Remove some unreachable code.
Fixes http://llvm.org/PR41662.

llvm-svn: 361199
2019-05-20 21:30:33 +00:00
Lang Hames 4dfa665ebf [docs] Add more details/examples for LLJIT/LLLazyJIT, tweak lookup discussion.
llvm-svn: 361198
2019-05-20 21:07:16 +00:00
Cameron McInally 8bec58d5f7 [NFC][InstCombine] Add FIXME for one-use check on constant negation transforms.
llvm-svn: 361197
2019-05-20 21:00:42 +00:00
Lang Hames 93d2bdda6b [Support] Renamed member 'Size' to 'AllocatedSize' in MemoryBlock and OwningMemoryBlock.
Rename member 'Size' to 'AllocatedSize' in order to provide a hint that the
allocated size may be different than the requested size. Comments are added to
clarify this point.  Updated the InMemoryBuffer in FileOutputBuffer.cpp to track
the requested buffer size.

Patch by Machiel van Hooren. Thanks Machiel!

https://reviews.llvm.org/D61599

llvm-svn: 361195
2019-05-20 20:53:05 +00:00
Martin Storsjo 4ed18e5ef5 [AArch64] Handle lowering lround on windows, where long is 32 bit
Differential Revision: https://reviews.llvm.org/D62108

llvm-svn: 361192
2019-05-20 19:53:28 +00:00
Nico Weber 80efcdcdf8 gn build: Merge r361148
llvm-svn: 361191
2019-05-20 19:33:32 +00:00
Nikita Popov e1d38ec811 [LFTR] Add additional PR31181 test cases
One case where overflow happens in the first loop iteration, and
two cases where we switch to a dynamically dead IV with post/pre
increment, respectively.

llvm-svn: 361189
2019-05-20 19:13:04 +00:00
Cameron McInally 2557ca296a [InstCombine] Add visitFNeg(...) visitor for unary Fneg
Also, break out a helper function, namely foldFNegIntoConstant(...), which performs transforms common between visitFNeg(...) and visitFSub(...).

Differential Revision: https://reviews.llvm.org/D61693

llvm-svn: 361188
2019-05-20 19:10:30 +00:00
Pete Couperus 380eaa0cfa [TableGen] - Type comparison LE should be LT or equal.
Differential Revision: https://reviews.llvm.org/D61705

llvm-svn: 361183
2019-05-20 18:09:37 +00:00
Sanjay Patel d91f1dd470 [InstCombine] auto-generate test checks; NFC
llvm-svn: 361181
2019-05-20 17:52:22 +00:00
Sanjay Patel 63fa690617 [InstSimplify] update stale comment; NFC
Missed this diff with rL361118.

llvm-svn: 361180
2019-05-20 17:52:18 +00:00
Craig Topper e97e52757c [X86] Add test case for r361177.
That commit makes sure we flush PendingExports in SelectDAGBuilder
before we create INLINEASM_BR. Unfortunatley, I haven't yet found
a CodeGen failure without that change.

This commit uses the debug output from SelectionDAG to at least
ensure we build the DAG correctly.

llvm-svn: 361179
2019-05-20 17:37:52 +00:00
Craig Topper 97d4f7c194 [SelectionDAGBuilder] Flush PendingExports before creating INLINEASM_BR node for asm goto.
Since INLINEASM_BR is a terminator we need to flush the pending exports before
emitting it. If we don't do this, a TokenFactor can be inserted between it and
the BR instruction emitted to finish the callbr lowering.

It looks like nodes are glued to the INLINEASM_BR so I had to make sure we emit
the TokenFactor before that.

Differential Revision: https://reviews.llvm.org/D59981

llvm-svn: 361177
2019-05-20 17:08:02 +00:00
Nick Desaulniers bf940622c8 [DWARF] hoist nullptr checks. NFC
Summary:
This was flagged in https://www.viva64.com/en/b/0629/ under "Snippet No.
15" (see under #13). It looks like PVS studio flags nullptr checks where
the ptr is used inbetween creation and checking against nullptr.

Reviewers: JDevlieghere, probinson

Reviewed By: JDevlieghere

Subscribers: RKSimon, hiraditya, llvm-commits, srhines

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62118

llvm-svn: 361176
2019-05-20 16:58:59 +00:00
Craig Topper cac6b76a76 [X86] Add icelake-client and tremont model numbers to getHostCPUName.
llvm-svn: 361174
2019-05-20 16:58:23 +00:00
Nick Desaulniers 639b29b1b5 [INLINER] allow inlining of blockaddresses if sole uses are callbrs
Summary:
It was supposed that Ref LazyCallGraph::Edge's were being inserted by
inlining, but that doesn't seem to be the case.  Instead, it seems that
there was no test for a blockaddress Constant in an instruction that
referenced the function that contained the instruction. Ex:

```
define void @f() {
  %1 = alloca i8*, align 8
2:
  store i8* blockaddress(@f, %2), i8** %1, align 8
  ret void
}
```

When iterating blockaddresses, do not add the function they refer to
back to the worklist if the blockaddress is referring to the contained
function (as opposed to an external function).

Because blockaddress has sligtly different semantics than GNU C's
address of labels, there are 3 cases that can occur with blockaddress,
where only 1 can happen in GNU C due to C's scoping rules:
* blockaddress is within the function it refers to (possible in GNU C).
* blockaddress is within a different function than the one it refers to
(not possible in GNU C).
* blockaddress is used in to declare a global (not possible in GNU C).

The second case is tested in:

```
$ ./llvm/build/unittests/Analysis/AnalysisTests \
  --gtest_filter=LazyCallGraphTest.HandleBlockAddress
```

This patch adjusts the iteration of blockaddresses in
LazyCallGraph::visitReferences to not revisit the blockaddresses
function in the first case.

The Linux kernel contains code that's not semantically valid at -O0;
specifically code passed to asm goto. It requires that asm goto be
inline-able. This patch conservatively does not attempt to handle the
more general case of inlining blockaddresses that have non-callbr users
(pr/39560).

https://bugs.llvm.org/show_bug.cgi?id=39560
https://bugs.llvm.org/show_bug.cgi?id=40722
https://github.com/ClangBuiltLinux/linux/issues/6
https://reviews.llvm.org/rL212077

Reviewers: jyknight, eli.friedman, chandlerc

Reviewed By: chandlerc

Subscribers: george.burgess.iv, nathanchance, mgorny, craig.topper, mengxu.gatech, void, mehdi_amini, E5ten, chandlerc, efriedma, eraman, hiraditya, haicheng, pirama, llvm-commits, srhines

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58260

llvm-svn: 361173
2019-05-20 16:48:09 +00:00
Bjorn Pettersson eee0f2330d [AMDGPU] Fix std::array initializers to avoid warnings with older tool chains. NFC
A std::array is implemented as a template with an array
inside a struct. Older versions of clang, like 3.6,
require an extra set of curly braces around std::array
initializations to avoid warnings.

The C++ language was changed regarding this by CWG 1270.
So more modern tool chains does not complaing even if
leaving out one level of braces.

llvm-svn: 361171
2019-05-20 16:41:08 +00:00
Craig Topper af7a188453 [Intrinsics] Merge lround.i32 and lround.i64 into a single intrinsic with overloaded result type. Make result type for llvm.llround overloaded instead of fixing to i64
We shouldn't really make assumptions about possible sizes for long and long long. And longer term we should probably support vectorizing these intrinsics. By making the result types not fixed we can support vectors as well.

Differential Revision: https://reviews.llvm.org/D62026

llvm-svn: 361169
2019-05-20 16:27:09 +00:00