Commit Graph

284973 Commits

Author SHA1 Message Date
Rafael Espindola 74acdfa691 Reduce code duplication a bit.
The code for computing the offset of an entry in the plt is simple,
but it was duplicated in quite a few places.

llvm-svn: 327536
2018-03-14 17:41:34 +00:00
Roman Lebedev 978aae7614 [InstSimplify] [NFC] Add tests for peeking through unsigned FP casts for sign compares (PR36682)
Summary:
This pattern came up in PR36682 / D44390
https://bugs.llvm.org/show_bug.cgi?id=36682
https://reviews.llvm.org/D44390
https://godbolt.org/g/oKvT5H

Looking at the IR pattern in question, as per [[ https://github.com/rutgers-apl/alive-nj | alive-nj ]], for all the type combinations i checked
(input: `i16`, `i32`, `i64`; intermediate: `half`/`i16`, `float`/`i32`, `double`/`i64`)
for the following `icmp` comparisons the `uitofp`+`bitcast`+`icmp` can be evaluated to a boolean:
* `slt 0`
* `sgt -1`
I did not check vectors, but i'm guessing it's the same there.
{F5889242}

Thus all these cases are in the testcase (along with the vector variant with additional `undef` element in the middle).
There are no negative patterns here (unless alive-nj lied/is broken), all of these should be optimized.

Reviewers: spatel, majnemer, efriedma, arsenm

Reviewed By: spatel

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D44421

llvm-svn: 327535
2018-03-14 17:31:08 +00:00
Roman Lebedev 6ab60358ca [InstCombine] [NFC] Add tests for peeking through unsigned FP casts for zero-equality compares (PR36682)
Summary:
This pattern came up in PR36682 / D44390
https://bugs.llvm.org/show_bug.cgi?id=36682
https://reviews.llvm.org/D44390
https://godbolt.org/g/oKvT5H

Looking at the IR pattern in question, as per [[ https://github.com/rutgers-apl/alive-nj | alive-nj ]], for all the type combinations i checked
(input: `i16`, `i32`, `i64`; intermediate: `half`/`i16`, `float`/`i32`, `double`/`i64`)
for the following `icmp` comparisons the `uitofp`+`bitcast` can be dropped:
* `eq 0`
* `ne 0`
I did not check vectors, but i'm guessing it's the same there.
{F5889189}

Thus all these cases are in the testcase (along with the vector variant with additional `undef` element in the middle).
There are no negative patterns here (unless alive-nj lied/is broken), all of these should be optimized.

Generated with
{F5889196}

Reviewers: spatel, majnemer, efriedma, arsenm

Reviewed By: spatel

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D44416

llvm-svn: 327534
2018-03-14 17:31:03 +00:00
Francis Visoiu Mistrih 084e7d8770 [AArch64] Keep track of MIFlags in the LoadStoreOptimizer
Merging:

* $x26, $x25 = frame-setup LDPXi $sp, 0
* $sp = frame-destroy ADDXri $sp, 64, 0

into an LDPXpost should preserve the flags from both instructions as
following:

* frame-setup frame-destroy LDPXpost

Differential Revision: https://reviews.llvm.org/D44446

llvm-svn: 327533
2018-03-14 17:10:58 +00:00
Ilya Biryukov bec5df2d05 [clangd] Remove forceReparse, add a flag to addDocument instead
Summary: To make the removal of DraftMgr from ClangdServer easier (D44408).

Reviewers: sammccall, simark

Reviewed By: sammccall, simark

Subscribers: simark, klimek, jkorous-apple, ioeric, cfe-commits

Differential Revision: https://reviews.llvm.org/D44462

llvm-svn: 327532
2018-03-14 17:08:41 +00:00
Frederich Munch f11cc49f7c [CMake] Properly quote string arguments to quiet errors from r327528 when built
with LLVM_ENABLE_EH and LLVM_ENABLE_RTTI.

llvm-svn: 327531
2018-03-14 16:56:02 +00:00
Craig Topper b36cb20ef9 [X86] Teach X86TargetLowering::targetShrinkDemandedConstant to set non-demanded bits if it helps created an and mask that can be matched as a zero extend.
I had to modify the bswap recognition to allow unshrunk masks to make this work.

Fixes PR36689.

Differential Revision: https://reviews.llvm.org/D44442

llvm-svn: 327530
2018-03-14 16:55:15 +00:00
Yaxun Liu e392ce4315 Attempt to fix failure of deep-ast-tree.cpp on ppc64 and atom
llvm-svn: 327529
2018-03-14 16:47:49 +00:00
Frederich Munch 529ce72efc Expand clang-interpreter with example of throwing in and from the JIT for Windows64.
Summary:
Getting this to work is not particularly obvious, and having it as an example should be helpful.
Portions of this could be placed into LLVM, but as a whole it seems necessary to do this a higher level.

Reviewers: lhames, mehdi_amini

Reviewed By: lhames

Subscribers: mgrang, martell, cfe-commits, mgorny

Differential Revision: https://reviews.llvm.org/D35103

llvm-svn: 327528
2018-03-14 16:04:45 +00:00
Nicholas Wilson 3e3f5fb3a3 [WebAssembly] Use DenseMapInfo traits from LLVM repo. NFC
Differential Revision: https://reviews.llvm.org/D44150

llvm-svn: 327527
2018-03-14 15:58:16 +00:00
Nicholas Wilson 48d6dbe3cb [WebAssembly] Add DenseMap traits and operator== for Wasm type structs
Differential Revision: https://reviews.llvm.org/D44303

llvm-svn: 327526
2018-03-14 15:58:03 +00:00
Kostya Kortchinsky a51139046e [scudo] Add Chunk::getSize, rework Chunk::getUsableSize
Summary:
Using `getActuallyAllocatedSize` from the Combined resulting in mediocre
compiled code, as the `ClassId != 0` predicament was not propagated there,
resulting in additional branches and dead code. Move the logic in the frontend,
which results in better compiled code. Also I think it makes it slightly easier
to distinguish between the size the user requested, and the size that was
actually allocated by the allocator.

`const` a couple of things as well.

This has no functional impact.

Reviewers: alekseyshl

Reviewed By: alekseyshl

Subscribers: delcypher, #sanitizers, llvm-commits

Differential Revision: https://reviews.llvm.org/D44444

llvm-svn: 327525
2018-03-14 15:50:32 +00:00
Simon Pilgrim d1c3c995c0 [X86][AVX] Use WriteFShuffleLd for broadcast reg-mem instructions
They shouldn't be treated as pure loads.

Found while investigating D44428

llvm-svn: 327524
2018-03-14 15:47:08 +00:00
Nicholas Wilson c4d9aa1b5f [WebAssembly] Avoid COMDAT hashmap lookup for each symbol. NFC
This reduces the number of lookups to one per COMDAT group, rather than
one per symbol in a COMDAT group.

Differential Revision: https://reviews.llvm.org/D44344

llvm-svn: 327523
2018-03-14 15:45:11 +00:00
Nicholas Wilson 027b9357a8 [WebAssembly] Identify COMDATs by index rather than string. NFC
This will enable an optimisation in LLD.

Differential Revision: https://reviews.llvm.org/D44343

llvm-svn: 327522
2018-03-14 15:44:45 +00:00
Arnold Schwaighofer bf1638daa8 SjLjEHPrepare: Don't reg-to-mem swifterror values
swifterror llvm values model the swifterror register as memory at the
LLVM IR level. ISel will perform adhoc mem-to-reg on them. swifterror
values are constraint in how they can be used. Spilling them to memory
is not allowed.

SjLjEHPrepare tried to lower swifterror values to memory which is
unecessary since the back-end will spill and reload the register as
neccessary (as long as clobbering calls are marked as such which is the
case here) and further leads to invalid IR because swifterror values
can't be stored to memory.

rdar://38164004

llvm-svn: 327521
2018-03-14 15:44:07 +00:00
Alexander Ivchenko 86ef9ab28f [GlobalIsel][X86] Support for G_SDIV instruction
Reviewed By: igorb

Differential Revision: https://reviews.llvm.org/D44430

llvm-svn: 327520
2018-03-14 15:41:11 +00:00
Jonas Devlieghere 22af9c63f3 [dotest] Rename llvm-dotest -> lldb-dotest and make it a custom target
This renames llvm-dotest to lldb-dotest and makes it a custom target so
you can run `ninja lldb-dotest` to rebuild whatever is necessary before
rerunning the tests.

Differential revision: https://reviews.llvm.org/D44473

llvm-svn: 327519
2018-03-14 15:36:32 +00:00
Sanjay Patel 5773ac3ee8 [CodeGen] allow printing of zero latency in sched comments
I don't know how to expose this in a test. There are ARM / AArch64 
sched classes that include zero latency instructions, but I'm not 
seeing sched info printed for those targets. X86 will almost 
certainly have these soon (see PR36671), but no model has
'let Latency = 0' currently.

llvm-svn: 327518
2018-03-14 15:28:48 +00:00
Andrea Di Biagio 36e34a99c7 [llvm-mca] Remove unused variable from InstrBuilder.cpp. NFC
This was causing a buildbot failure.

llvm-svn: 327517
2018-03-14 15:19:47 +00:00
Yaxun Liu 23137a1e45 Add deep AST tree test for r327515
llvm-svn: 327516
2018-03-14 15:03:31 +00:00
Yaxun Liu d9389827d2 CodeGen: Reduce LValue and CallArgList memory footprint before recommitting r326946
Recent change r326946 (https://reviews.llvm.org/D34367) causes regression in Eigen due to increased
memory footprint of CallArg.

This patch reduces LValue size from 112 to 96 bytes and reduces inline argument count of CallArgList
from 16 to 8.

It has been verified that this will let the added deep AST tree test pass with r326946.

In the long run, CallArg or LValue memory footprint should be further optimized.

Differential Revision: https://reviews.llvm.org/D44445

llvm-svn: 327515
2018-03-14 15:02:28 +00:00
Andrea Di Biagio 4732d43cae [llvm-mca] Move the logic that updates the register files from InstrBuilder to DispatchUnit. NFCI
Before this patch, the register file was always updated at instruction creation
time. That means, new read-after-write dependencies, and new temporary registers
were allocated at instruction creation time.

This patch refactors the code in InstrBuilder, and move all the logic that
updates the register file into the dispatch unit. We only want to update the
register file when instructions are effectively dispatched (not before).

This refactoring also helps removing a bad dependency between the InstrBuilder
and the DispatchUnit.

No functional change intended.

llvm-svn: 327514
2018-03-14 14:57:23 +00:00
Gheorghe-Teodor Bercea d3dcf2f05d [OpenMP] Add OpenMP data sharing infrastructure using global memory
Summary:
This patch handles the Clang code generation phase for the OpenMP data sharing infrastructure.

TODO: add a more detailed description.

Reviewers: ABataev, carlo.bertolli, caomhin, hfinkel, Hahnfeld

Reviewed By: ABataev

Subscribers: jholewinski, guansong, cfe-commits

Differential Revision: https://reviews.llvm.org/D43660

llvm-svn: 327513
2018-03-14 14:17:45 +00:00
Jonas Devlieghere 81ccb97024 [test] Disable TestMachCore everywhere except on Darwin
Apparently the parser is wrapped inside ifdef's so the logic isn't
available on non-Darwin platforms.

Should fix build bot failure:
  http://lab.llvm.org:8011/builders/lldb-x86_64-ubuntu-14.04-cmake/builds/20463

llvm-svn: 327512
2018-03-14 14:16:23 +00:00
Petar Jovanovic 3408caf686 [mips] Add support for CRC ASE
This includes

  Instructions: crc32b, crc32h, crc32w, crc32d,
                crc32cb, crc32ch, crc32cw, crc32cd

  Assembler directives: .set crc, .set nocrc, .module crc, .module nocrc

  Attribute: crc

  .MIPS.abiflags: CRC (0x8000)

Patch by Vladimir Stefanovic.

Differential Revision: https://reviews.llvm.org/D44176

llvm-svn: 327511
2018-03-14 14:13:31 +00:00
Simon Pilgrim d594942928 [X86][Btver2] Fix YMM shuffle, permute and permutevar scheduler costs
Account for ymm double pumping and add proper pshufb/permutevar support

llvm-svn: 327510
2018-03-14 14:05:19 +00:00
Teresa Johnson 2f5c331138 [LTO/gold] Fix workaround for old plugin-api.h in --wrap support
The workaround for older plugin-api.h in r327506 unfortunately
used another union member that is also fairly new and not available
in the plugin-api.h on some of the bots, leading to:
http://lab.llvm.org:8011/builders/clang-with-thin-lto-ubuntu/builds/9121/steps/build-stage2-LLVMgold.so/logs/stdio

Change to use a different member that we will definitely have (as it
is used elsewhere in gold-plugin.cpp already).

llvm-svn: 327509
2018-03-14 14:00:57 +00:00
Nicholas Wilson 2eb39c137f [WebAssembly] Add missing implementation for --initial/max-memory args
Previously, Config->InitialMemory/MaxMemory were hooked up to some
commandline args but had no effect at all.

Differential Revision: https://reviews.llvm.org/D44393

llvm-svn: 327508
2018-03-14 13:53:58 +00:00
Nicholas Wilson a06a355095 [WebAssembly] Replace varargs debugPrint with standard log call
Differential Revision: https://reviews.llvm.org/D44441

llvm-svn: 327507
2018-03-14 13:50:20 +00:00
Teresa Johnson 8883af6892 [LTO/gold] Support --wrap
Summary:
(Restores r327459 with handling for old plugin-api.h)
Utilize new gold plugin api interface for obtaining --wrap option
arguments, and LTO API handling (added for --wrap support in lld LTO),
to mark symbols so that LTO does not optimize them inappropriately.

Note the test cases will be in a new gold test subdirectory that
is dependent on the next release of gold which will contain the new
interfaces.

Reviewers: pcc, tmsriram

Subscribers: mehdi_amini, llvm-commits, inglorion

Differential Revision: https://reviews.llvm.org/D44235

llvm-svn: 327506
2018-03-14 13:26:18 +00:00
Simon Pilgrim de995e6e37 [X86][SSE] Use WriteFShuffleLd for MOVDDUP/MOVSHDUP/MOVSLDUP reg-mem instructions
They shouldn't be treated as pure loads.

Found while investigating D44428

llvm-svn: 327505
2018-03-14 13:22:56 +00:00
Ilya Biryukov 0ee4a08c00 [Sema] Pop function scope when instantiating a func with skipped body
Summary:
By calling ActOnFinishFunctionBody(). Previously we were only calling
ActOnSkippedFunctionBody, which didn't pop the function scope.
This causes a crash when running on our internal code. No test-case,
though, since I couldn't come up with a small example in reasonable
time.

The bug was introduced in r321174.

Reviewers: bkramer, sammccall, sepavloff, aaron.ballman

Reviewed By: sammccall, aaron.ballman

Subscribers: aaron.ballman, cfe-commits

Differential Revision: https://reviews.llvm.org/D44439

llvm-svn: 327504
2018-03-14 13:18:30 +00:00
Martin Storsjo bde677289a [AArch64] Don't produce R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC
Support for this relocation is missing in both LLD and GNU binutils
at the moment.

This reverts the ELF parts of SVN r327316.

llvm-svn: 327503
2018-03-14 13:09:10 +00:00
Simon Pilgrim f0ccaae5bc Fix 'not all control paths return a value' MSVC warning. NFCI.
llvm-svn: 327502
2018-03-14 12:04:51 +00:00
Jonas Devlieghere 25486b7512 Update selected thread after loading mach core
The OS plugins might have updated the thread list after a core file has
been loaded. The physical thread in the core file may no longer be the
one that should be selected. Hence we should run the thread selection
logic after loading the core.

Differential revision: https://reviews.llvm.org/D44139

llvm-svn: 327501
2018-03-14 11:50:10 +00:00
Pavel Labath 8ed6582bb0 Fix msvc compiler error in r327498
msvc reports an "illegal indirection" error here. Attempt to appease it
with a different initialization syntax.

llvm-svn: 327500
2018-03-14 11:31:17 +00:00
Alexander Ivchenko 0bd4d8c901 [GlobalISel][X86] Support G_LSHR/G_ASHR/G_SHL
Support G_LSHR/G_ASHR/G_SHL. We have 3 variance for
shift instructions : shift gpr, shift imm, shift 1.
Currently GlobalIsel TableGen generate patterns for
shift imm and shift 1, but with shiftCount i8.
In G_LSHR/G_ASHR/G_SHL like LLVM-IR both arguments
has the same type, so for now only shift i8 can use
auto generated TableGen patterns.

The support of G_SHL/G_ASHR enables tryCombineSExt
from LegalizationArtifactCombiner.h to hit, which
results in different legalization for the following tests:
    LLVM :: CodeGen/X86/GlobalISel/ext-x86-64.ll
    LLVM :: CodeGen/X86/GlobalISel/gep.ll
    LLVM :: CodeGen/X86/GlobalISel/legalize-ext-x86-64.mir

-; X64-NEXT:    movsbl %dil, %eax
+; X64-NEXT:    movl $24, %ecx
+; X64-NEXT:    # kill: def $cl killed $ecx
+; X64-NEXT:    shll %cl, %edi
+; X64-NEXT:    movl $24, %ecx
+; X64-NEXT:    # kill: def $cl killed $ecx
+; X64-NEXT:    sarl %cl, %edi
+; X64-NEXT:    movl %edi, %eax

..which is not optimal and should be addressed later.

Rework of the patch by igorb

Reviewed By: igorb

Differential Revision: https://reviews.llvm.org/D44395

llvm-svn: 327499
2018-03-14 11:23:57 +00:00
Pavel Labath 0dd81bab92 Explicitly initialize dwarf::FormParams in DIEInteger::SizeOf
This could end up inititialized if someone called the function with a
null AsmPrinter. Right now this only happens in DIEHash unit tests,
presumably because it was hard to create an AsmPrinter in the context of
unit tests. This only worked before r327486 because those tests did not
use any dwarf forms whose size actually depended on the dwarf version
(otherwise, they would have crashed due to null dereference).

I fix the uninitialized error, by explicitly initializing FormParams to
an invalid value, which will cause getFixedFormByteSize to return None
if called with a form with version-dependent size. A more principled
solution might be to fix the DIEHash tests to always pass in a valid
AsmPrinter.

llvm-svn: 327498
2018-03-14 11:14:43 +00:00
Nicolai Haehnle a511dddced TableGen: Explicitly forbid some nestings of class, multiclass, and foreach
These previously all failed one way or another, but now we produce a more
helpful error message.

Change-Id: I8ffd2e87c8e35a5134c3be289e0a1fecaa2bb8ca

Differential revision: https://reviews.llvm.org/D44115

llvm-svn: 327497
2018-03-14 11:01:01 +00:00
Nicolai Haehnle aa9ca691cd TableGen: Add !ne, !le, !lt, !ge, and !gt comparisons
Change-Id: I8e2ece677268972d578a787467f7ef52a1f33a71

Differential revision: https://reviews.llvm.org/D44114

llvm-svn: 327496
2018-03-14 11:00:57 +00:00
Nicolai Haehnle b61c26e614 TableGen: Allow dag operators to be resolved late
Change-Id: I51bb80fd5c48c8ac441ab11e43d43c1b91b4b590

Differential revision: https://reviews.llvm.org/D44113

llvm-svn: 327495
2018-03-14 11:00:48 +00:00
Nicolai Haehnle 77841b159a TableGen: Type-check BinOps
Additionally, allow more than two operands to !con, !add, !and, !or
in the same way as is already allowed for !listconcat and !strconcat.

Change-Id: I9659411f554201b90cd8ed7c7e004d381a66fa93

Differential revision: https://reviews.llvm.org/D44112

llvm-svn: 327494
2018-03-14 11:00:43 +00:00
Nicolai Haehnle ef60a26817 TableGen: Allow ? in lists
This makes using !dag more convenient in some cases.

Change-Id: I0a8c35e15ccd1ecec778fd1c8d64eee38d74517c

Differential revision: https://reviews.llvm.org/D44111

llvm-svn: 327493
2018-03-14 11:00:33 +00:00
Nicolai Haehnle 6c11865638 TableGen: Add !dag function for construction
This allows constructing DAG nodes with programmatically determined
names, and can simplify constructing DAG nodes in other cases as
well.

Also, add documentation and some very simple tests for the already
existing !con.

Change-Id: Ida61cd82e99752548d7109ce8da34d29da56a5f7

Differential revision: https://reviews.llvm.org/D44110

llvm-svn: 327492
2018-03-14 11:00:26 +00:00
Pavel Labath 3a17e75be9 StaticAnalyzer: fix compiler warning. NFC
My compiler (clang-3.8) complains that the RCC variable is unused.
That's not really true, as it's checked by the if-declaration, but it's
also kinda true, because we don't need to declaration if we only check
it in the if statement.

In reality, all this means that the dyn_cast<> can be replaced by isa<>,
so that's what I do here.

llvm-svn: 327491
2018-03-14 10:16:40 +00:00
Pavel Labath 10ef313678 [cmake] Fix standalone+LLVM_LINK_LLVM_DYLIB builds (pr36687)
Summary:
To make this build work, I needed to add detection code for the pthread
library. This is necessary, because we have direct calls to these
libraries (instead of going through llvm) and in the standalone build we
cannot rely on llvm to detect these for us. In a standalone non-dylib
build this was accidentaly working because these libraries were pulled
in as an interface dependency of the .a files, but in a dylib build
these are no longer part of the link interface, and so we need to add
them explicitly.

Reviewers: krytarowski, zturner

Subscribers: lldb-commits, mgorny

Differential Revision: https://reviews.llvm.org/D44379

llvm-svn: 327490
2018-03-14 10:08:21 +00:00
Pavel Labath fe9922f8af Fix build broken by llvm r327486
llvm::DWARFFormParams moved to llvm::dwarf::FormParams.

llvm-svn: 327489
2018-03-14 09:57:52 +00:00
Alexander Timofeev c683966cdd [AMDGPU] Fix for DAGCombiner infinite loop in OCLtst
Differential revision: https://reviews.llvm.org/D44417

llvm-svn: 327488
2018-03-14 09:48:51 +00:00
Eric Liu 9ec459ff6b [clangd] Add an interface that finds symbol by SymbolID in SymbolIndex.
Summary:
Potential use case: argument go-to-definition result with symbol
information (e.g. function definition in cc file) that might not be in the AST.

Reviewers: sammccall

Reviewed By: sammccall

Subscribers: klimek, ilya-biryukov, jkorous-apple, cfe-commits

Differential Revision: https://reviews.llvm.org/D44305

llvm-svn: 327487
2018-03-14 09:48:05 +00:00