293b3a68e0
Fix a bug where we were useing HA to get the high part, which seems like it
...
could cause a miscompile. Fixing this didn't fix the two programs that fail
though. :(
This also changes the implementation to follow the pattern selector more
closely, causing us to select 0 to li instead of lis.
llvm-svn: 23189
2005-09-01 19:38:28 +00:00
34182aff7f
Do not select the operands being passed into SelectCC. IT does this itself
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and selecting early prevents folding immediates into the cmpw* instructions
llvm-svn: 23188
2005-09-01 19:20:44 +00:00
975f5c9f46
It is NDEBUG not _NDEBUG
...
llvm-svn: 23186
2005-09-01 18:44:10 +00:00
e8f78d1aab
Add the rest of the currently implemented visit routines to the switch
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statement in visit().
llvm-svn: 23185
2005-09-01 00:33:32 +00:00
21158fc485
First pass at the DAG Combiner. It isn't used anywhere yet, but it should
...
be mostly functional. It currently has all folds from SelectionDAG.cpp
that do not involve a condition code.
llvm-svn: 23184
2005-09-01 00:19:25 +00:00
13990fc286
Add regression test for efficient codegen of i32 x i32 -> hi32(i64) as
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mulhs.
llvm-svn: 23183
2005-09-01 00:04:03 +00:00
b3d2e7905f
remove an inappropriate comment
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llvm-svn: 23182
2005-08-31 22:49:51 +00:00
d4d10fff99
If a function has live ins/outs, print them
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llvm-svn: 23181
2005-08-31 22:34:59 +00:00
da2e04c69d
Move FCTIWZ handling out of the instruction selectors and into legalization,
...
getting them out of the business of making stack slots.
llvm-svn: 23180
2005-08-31 21:09:52 +00:00
6bad1fb19e
Remove dead code
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llvm-svn: 23179
2005-08-31 20:25:15 +00:00
e675a08e10
Move SHL,SHR i64 -> legalizer
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llvm-svn: 23178
2005-08-31 20:23:54 +00:00
3a04a4b767
Remove code that is now dead from the pattern isel.
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llvm-svn: 23177
2005-08-31 19:11:36 +00:00
2f03896a0f
lower sra_parts on the dag, implementing it for the dag isel, and exposing
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the ops to dag optimization.
llvm-svn: 23176
2005-08-31 19:09:57 +00:00
8a1a5f2818
Allow targets to custom expand shifts that are too large for their registers
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llvm-svn: 23173
2005-08-31 19:01:53 +00:00
0e6b11da03
Add a testcase for nate's patch
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llvm-svn: 23172
2005-08-31 18:19:50 +00:00
2bd2af8ecd
add assert zext/sext to the dag isel
...
llvm-svn: 23171
2005-08-31 18:08:46 +00:00
46ff6aa993
Handle AssertSext/AssertZext nodes, fixing the regressions last night.
...
llvm-svn: 23170
2005-08-31 17:48:04 +00:00
d8c84e3c7e
Fix VC++ precedence warnings
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llvm-svn: 23169
2005-08-31 02:47:06 +00:00
e3287b85b7
Enable generation of AssertSext and AssertZext in the PPC backend.
...
llvm-svn: 23168
2005-08-31 01:58:39 +00:00
f4d594370b
Fix 'ret long' to return the high and lo parts in the right registers. This
...
fixes crafty and probably others.
llvm-svn: 23167
2005-08-31 01:34:29 +00:00
539e7c892c
Sigh, not my day. Fix typo.
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llvm-svn: 23166
2005-08-31 00:43:49 +00:00
d513d8a662
Fix a mistake in my previous patch pointed out by sabre; the AssertZext
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case in MaskedValueIsZero was wrong.
llvm-svn: 23165
2005-08-31 00:43:08 +00:00
e07bc28cca
Remove some unnecessary casts, and add the AssertZext case to
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MaskedValueIsZero.
llvm-svn: 23164
2005-08-31 00:27:53 +00:00
ad688ddb20
Add support for count trailing zeroes, and population count. These are
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needed for folding constants in the upcoming dag combiner.
llvm-svn: 23163
2005-08-31 00:25:01 +00:00
69e9a9a94c
now that physregs can exist in the same dag with multiple types, remove some
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ugly hacks
llvm-svn: 23162
2005-08-30 22:59:48 +00:00
5764da422a
Allow physregs to occur in the dag with multiple types. Though I don't likethis, it is a requirement on PPC, which can have an f32 value in r3 at onepoint in a function and a f64 value in r3 at another point. :(
...
This fixes compilation of mesa
llvm-svn: 23161
2005-08-30 22:38:38 +00:00
1864662d5c
Allow physregs to occur in the dag with multiple types. Though I don't like
...
this, it is a requirement on PPC, which can have an f32 value in r3 at one
point in a function and a f64 value in r3 at another point. :(
llvm-svn: 23160
2005-08-30 22:38:05 +00:00
8f8d539746
Fix type mismatches when passing f32 values to calls
...
llvm-svn: 23159
2005-08-30 21:28:19 +00:00
4d602bed10
When checking the fixed intervals, don't forget to check for register aliases.
...
This fixes PR621 and Regression/CodeGen/X86/2005-08-30-RegAllocAliasProblem.ll
llvm-svn: 23158
2005-08-30 21:03:36 +00:00
38b3704d28
new testcase corresponding to PR621
...
llvm-svn: 23157
2005-08-30 21:02:51 +00:00
2188b4363f
The dag isel misses both of these, the pattern isel just misses the second
...
one. TODO :)
llvm-svn: 23156
2005-08-30 18:44:09 +00:00
9f23ae226f
Fix some indentation (first hunks).
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Remove code (last hunk) that miscompiled immediate and's, such as
and uint %tmp.30, 4294958079
into
andi. r8, r8, 56319
andis. r8, r8, 65535
instead of:
li r9, -9217
and r8, r8, r9
The first always generates zero.
This fixes espresso.
llvm-svn: 23155
2005-08-30 18:37:48 +00:00
6a41fd75cd
Fix a problem Nate found where we swapped the operands of SHL/SHR_PARTS. This
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fixes fourinarow
llvm-svn: 23153
2005-08-30 17:42:59 +00:00
bdf3d3defb
codegen ADD_PARTS correctly: put the results in the right registers! This
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fixes fhourstones
llvm-svn: 23152
2005-08-30 17:40:13 +00:00
61d21b1f3c
Fix FreeBench/fourinarow with the dag isel, by not adding a bogus result
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to SHIFT_PARTS nodes
llvm-svn: 23151
2005-08-30 17:21:17 +00:00
45706e9fb8
add operands in the right order, fixing McCat/18-imp with the dag isel
...
llvm-svn: 23150
2005-08-30 17:13:58 +00:00
9a4ad487f0
Fix a miscompile of PtrDist/bc. Sign extending bools is not the right thing,
...
at least tends to expose problems elsewhere.
llvm-svn: 23149
2005-08-30 16:56:19 +00:00
a3da8c4819
Remove a bogus piece of my AssertSext/AssertZext patch. oops.
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llvm-svn: 23148
2005-08-30 02:54:28 +00:00
43144a2fe0
Add support for AssertSext and AssertZext, folding other extensions with
...
them. This allows for elminination of redundant extends in the entry
blocks of functions on PowerPC.
Add support for i32 x i32 -> i64 multiplies, by recognizing when the inputs
to ISD::MUL in ExpandOp are actually just extended i32 values and not real
i64 values. this allows us to codegen
int mulhs(int a, int b) { return ((long long)a * b) >> 32; }
as:
_mulhs:
mulhw r3, r4, r3
blr
instead of:
_mulhs:
mulhwu r2, r4, r3
srawi r5, r3, 31
mullw r5, r4, r5
add r2, r2, r5
srawi r4, r4, 31
mullw r3, r4, r3
add r3, r2, r3
blr
with a similar improvement on x86.
llvm-svn: 23147
2005-08-30 02:44:00 +00:00
c9d1e370a5
Add AssertSext, AssertZext nodes for targets that pass arguments in
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registers, and the incoming values have already been zero or sign extended
from the appopriate type to the register width.
llvm-svn: 23146
2005-08-30 02:39:32 +00:00
08a1e38730
Name this variable to be what it really is!
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llvm-svn: 23145
2005-08-30 01:58:51 +00:00
04cb82278a
Handle CopyToReg nodes with flag operands correctly
...
llvm-svn: 23144
2005-08-30 01:57:23 +00:00
7a59b1cf90
Make sure the selector emits register register copies with flag operands
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linking them to calls when appropriate, this prevents the scheduler from
pulling these copies away from the call.
This fixes Ptrdist/yacr2
llvm-svn: 23143
2005-08-30 01:57:02 +00:00
709190d540
add some method variants
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llvm-svn: 23142
2005-08-30 01:56:13 +00:00
e413b60632
The first operand to AND does not always have more than two operands. This
...
fixes MediaBench/toast with the dag selector
llvm-svn: 23141
2005-08-30 00:59:16 +00:00
e75b5e63a7
Fix a bug in my patch for legalizing to fsel. It cannot handle seteq/setne,
...
which I failed to include when I moved the code over. This fixes
MallocBench/gs.
llvm-svn: 23140
2005-08-30 00:45:18 +00:00
61f7c3e843
emit FMR instructions to convert f64<->f32 instructions, so things like
...
STOREs, know the right type to store.
llvm-svn: 23139
2005-08-30 00:30:43 +00:00
62b9a5d1f8
Fix some really strange indentation that xcode likes to use.
...
no xcode, this is not right:
if (!foo) break;
X;
llvm-svn: 23138
2005-08-30 00:19:00 +00:00
12357281b8
fix a crash in cfrac
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llvm-svn: 23137
2005-08-29 23:49:25 +00:00
1cbbe1015a
Implement DYNAMIC_STACKALLOC, wrap some long lines
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llvm-svn: 23136
2005-08-29 23:30:11 +00:00
Chris Lattner