Commit Graph

236099 Commits

Author SHA1 Message Date
Lang Hames aabc4b13e8 [ORC] Don't try to copy from an empty segment in SimpleExecutorMemoryManager.
Since 67220c2ad7 empty SPSSequence<char>s deserialize to default-constructed
ArrayRef<char>s, which have a null data field. We need to check for this to
avoid memcpy'ing from a nullptr.

This should fix the bot failure in
https://lab.llvm.org/buildbot/#/builders/85/builds/9323
2022-07-20 16:47:00 -07:00
Johannes Doerfert ad98ef8be4 [Attributor] Deal with complex PHI nodes better during AAPointerInfo
We were quite conservative when it came to PHI node handling to avoid
recursive reasoning. Now we check more direct if we have seen a PHI
already or not. This allows non-recursive PHI chains to be handled.

This also exposed a bug as we did only model the effect of one loop
traversal. `phi_no_store_3` has been adapted to show how we would have
used `undef` instead of `1` before. With this patch we don't replace
it at all, which is expected as we do not argue about loop iterations
(or alignments).
2022-07-20 17:34:50 -05:00
Johannes Doerfert 142897dd7d [Attributor] Only non-exact accesses require a uniform bit-pattern (=0)
If we only have exact accesses we should never require the bit-pattern
to be uniform (in this case 0). Only a non-exact access should force us
to require only 0 values.
2022-07-20 17:34:50 -05:00
Alexander Shaposhnikov 67f1fe8597 [GlobalOpt] Enable evaluation of atomic stores
Relax the check to allow evaluation of atomic stores
(but still skip volatile stores).

Test plan:
1/ ninja check-llvm check-clang
2/ Bootstrapped LLVM/Clang pass tests

Differential revision: https://reviews.llvm.org/D129841
2022-07-20 22:33:58 +00:00
Teresa Johnson 0174f5553e [MemProf] Basic metadata support and verification
Add basic support for the MemProf metadata (!memprof and !callsite)
which was initially described in "RFC: IR metadata format for MemProf"
(https://discourse.llvm.org/t/rfc-ir-metadata-format-for-memprof/59165).

The bulk of the patch is verification support, along with some tests.

There are a couple of changes to the format described in the original
RFC:

Initial measurements suggested that a tree format for the stack ids in
the contexts would be more efficient, but subsequent evaluation with
large applications showed that in fact the cost of the additional
metadata nodes required by this deduplication scheme overwhelmed the
benefit from sharing stack id nodes. Therefore, the implementation here
and in follow on patches utilizes a simpler scheme of lists of stack id
integers in the memprof profile contexts and callsite metadata. The
follow on matching patch employs context trimming optimizations to
reduce the cost.

Secondly, instead of verbosely listing all profiled fields in each
profiled context (memory info block or MIB), and deferring the
interpretation of the profile data, the profile data is evaluated and
converted into string tags specifying the behavior (e.g. "cold") during
profile matching. This reduces the verbosity of the profile metadata,
and allows additional context trimming optimizations. As a result, the
named metadata schema description is also no longer needed.

Differential Revision: https://reviews.llvm.org/D128141
2022-07-20 15:30:55 -07:00
Schrodinger ZHU Yifan 304027206c [ThinLTO] Support aliased GlobalIFunc
Fixes https://github.com/llvm/llvm-project/issues/56290: when an ifunc is
aliased in LTO, clang will attempt to create an alias summary; however, as ifunc
is not included in the module summary, doing so will lead to crash.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D129009
2022-07-20 15:30:38 -07:00
Matt Arsenault fe1678d1b2 llvm-reduce: Fix register mask test
This was sometimes failing with "input module no longer interesting
after counting chunks" assert.
2022-07-20 18:19:14 -04:00
Craig Topper 31b8939ded [RISCV] Recognize bexti from (srl (and X, 1<<C), C).
This is the form we get for (zext (setne (and X 1<<C))). We only
had bexti patterns for the alternative form (and (srl X, C), 1).
2022-07-20 15:03:52 -07:00
Craig Topper 6746b2349c [RISCV] Add test cases for failure to use bexti for (setne (and X, 1<<C))
This will get converted to (srl (and X, 1<<C), C) which we need
to isel to bexti.
2022-07-20 15:03:52 -07:00
Philip Reames f934b9b073 [LV] Refresh a couple of autogen tests for naming change
These appear to just be changes in temporary identifiers; bit suprising we have so many.
2022-07-20 14:47:52 -07:00
Michał Górny 2ac7b142b1 [llvm] [cmake] Skip driver-related code unless LLVM_TOOL_LLVM_DRIVER_BUILD
Disable the code responsible for preparing object libraries
for the driver and filling LLVM_DRIVER_* properties
if LLVM_TOOL_LLVM_DRIVER_BUILD is disabled.  These properties are
consumed only by tools/llvm-driver, and so they are not used at all
if LLVM_TOOL_LLVM_DRIVER_BUILD is not enabled.  At the same time,
the related code breaks standalone clang builds against LLVM built
with LLVM_LINK_LLVM_DYLIB.

Differential Revision: https://reviews.llvm.org/D130158
2022-07-20 22:17:48 +02:00
LLVM GN Syncbot 761e2a3abc [gn build] Port 23cf42e706 2022-07-20 20:02:41 +00:00
Arthur Eubanks bc9b964f8f [NFC] Suppress unused variable warning in non-assert builds 2022-07-20 12:26:16 -07:00
Philip Reames f494f89b2a [LAA] Fix latent missing check bug when mixing scalable and non-scalabe strides
Noticed via inspection; to my knowledge, impossible to hit today.  In theory, we could have a fixed stride check be analyzed, then a scalable one.  With the old code, the scalable one would be silently dropped, and the runtime guard would go ahead with only the fixed one.  This would be a miscompile.
2022-07-20 11:56:45 -07:00
Craig Topper d76c8f5127 [InstCombine] Add mul with negated power of 2 constant to canEvaluateShifted.
If we are right shifting a multiply by a negated power of 2 where
the power of 2 is the same as the shift amount, we can replace with
a negate followed by an And.

New tests have not been committed yet but the patch shows the diffs.
Let me know if you want any changes or additional tests.

Differential Revision: https://reviews.llvm.org/D130103
2022-07-20 11:00:22 -07:00
Craig Topper 3aff7870a7 [InstCombine] Pre-commit test for D130103. 2022-07-20 11:00:21 -07:00
Arthur Eubanks 19d4f5e649 [test] Add missing REQUIRES: arm-registered-target 2022-07-20 10:59:07 -07:00
Hubert Tong adc1c34bab [NFC][tests] Remove XFAIL for AIX for passing tests
https://lab.llvm.org/buildbot/#/builders/214/builds/2425 reports these
tests as XPASS.
2022-07-20 13:57:11 -04:00
Arthur Eubanks 7e77d31af7 [test] Remove unnecessary -verify-machineinstrs=0
Issue  seems to be fixed and removing these doesn't cause any issues.
2022-07-20 10:55:54 -07:00
Joe Nash dc850fbf3b [AMDGPU] NFC. Assert that mask is full with VOPC DPP
VOPC DPP should not be formed when the row_mask and bank_mask are not
0xf (full) because the resulting VOP DPP would have different semantics
than the MOV DPP followed by VOP. Existing checks in GCNDPPCombine cover
this case but for different reasons, so assert the property for
future-proofing.

Reviewed By: nhaehnle

Differential Revision: https://reviews.llvm.org/D130101
2022-07-20 13:23:03 -04:00
Alex Bradbury c30c461dde [RISCV][test] Add tests for atomic compare exchange + branch on result
Due to the late expansion of the compare exchange sequences, there's
scope for improving codegen by folding the branches into the cmpxchg
loop (avoiding a branch-to-branch).
2022-07-20 17:49:33 +01:00
LLVM GN Syncbot 7a2a640969 [gn build] Port 857a78c04d 2022-07-20 16:42:40 +00:00
Kazu Hirata 94e03abf91 [IPO] Restore a call to has_value (NFC)
This patch restores a call to has_value to make it clear that we are
checking the presence of an optional value, not the underlying value.

This patch partially reverts d08f34b592.

Differential Revision: https://reviews.llvm.org/D129453
2022-07-20 09:40:18 -07:00
Ruobing Han 2b98b8e8fb fix bug for useless malloc elimination in CodeGenPrepare
Put AllocationFn check before I->willReturn can allow CodeGenPrepare to remove useless malloc instruction

Differential Revision: https://reviews.llvm.org/D130126
2022-07-20 16:29:51 +00:00
Alex Bradbury b1578bf377 [RISCV][test] Add tests showing signext behaviour of cmpxchg 2022-07-20 17:10:16 +01:00
Kazu Hirata 360c1111e3 Use llvm::is_contained (NFC) 2022-07-20 09:09:19 -07:00
Philip Reames 1a73ef75fa [LV] Autogen a test for ease of update 2022-07-20 08:19:38 -07:00
Philip Reames be25f52fec [LV] Autogen several tests for ease of update in upcoming change 2022-07-20 07:17:51 -07:00
Roman Rusyaev 394a388d14 [TableGen] Add a location for a class definition that was forward-declared
This change improves ctags generation for tablegen files.

For the following example
```
class A;

class A {
  int a;
}
```
Previously, tags were generated only for a forward declaration of class 'A'.

This patch allows generating tags for the forward declarations
and further definition of class 'A'.

Reviewed By: barannikov88

Original patch by: rusyaev-roman (Roman Rusyaev)
Some adjustments by: nhaehnle (Nicolai Hähnle)

Differential Revision: https://reviews.llvm.org/D129935
2022-07-20 15:56:17 +02:00
Jay Foad db0a658c61 [AMDGPU] Change RUN lines to not depend on code sinking. NFC.
Change a couple of RUN lines to not depend on the presence or position
of the IR code sinking pass in the codegen pipeline, since it does not
belong in there anyway.
2022-07-20 13:42:19 +01:00
Philip Reames 523a526a02 [LV] Fix miscompile due to srem/sdiv speculation safety condition
An srem or sdiv has two cases which can cause undefined behavior, not just one. The existing code did not account for this, and as a result, we miscompiled when we encountered e.g. a srem i64 %v, -1 in a conditional block.

Instead of hand rolling the logic, just use the utility function which exists exactly for this purpose.

Differential Revision: https://reviews.llvm.org/D130106
2022-07-20 05:35:23 -07:00
Carlos Alberto Enciso f8c13754af Update the Windows packaging script.
As discussed on:
  https://discourse.llvm.org/t/build-llvm-release-bat-script-options/63146/6

Giving:
  call :function if errorlevel 1 exit /b 1

Due to a missing new line, the error code returned by the function
is taking as another argument.

Changed to use standard '||' to exit if the errorlevel greater than zero.

  call :function || exit /b 1

Reviewed By: hans

Differential Revision: https://reviews.llvm.org/D130154
2022-07-20 13:22:10 +01:00
Nicolai Hähnle 1ddc51d89d Inliner: don't mark call sites as 'nounwind' if that would be redundant
When F calls G calls H, G is nounwind, and G is inlined into F, then the
inlined call-site to H should be effectively nounwind so as not to lose
information during inlining.

If H itself is nounwind (which often happens when H is an intrinsic), we
no longer mark the callsite explicitly as nounwind. Previously, there
were cases where the inlined call-site of H differs from a pre-existing
call-site of H in F *only* in the explicitly added nounwind attribute,
thus preventing common subexpression elimination.

v2:
- just check CI->doesNotThrow

v3 (resubmit after revert at 3443788087):
- update Clang tests

Differential Revision: https://reviews.llvm.org/D129860
2022-07-20 14:17:23 +02:00
Max Kazantsev e0ccd190ae [SCEV][NFC][CT] Do not waste time proving contextual facts for unreached loops and blocks
In fact, in unreached code we can say that every fact is true. So do not waste time trying to
do something smarter.

Formally it's not an NFC because it may change query results in unreached code, but they
won't have any impact on execution.

Hypothetical CT boost expected but not measured in practice.

Differential Revision: https://reviews.llvm.org/D129878
2022-07-20 19:02:28 +07:00
esmeyi b1847ff068 [XCOFF] write the aux header when the visibility is specified in XCOFF32.
The n_type field in the symbol table entry has two interpretations in XCOFF32, and a single interpretation in XCOFF64.
The new interpretation is used in XCOFF32 if the value of the o_vstamp field in the auxiliary header is 2.
In XCOFF64 and the new XCOFF32 interpretation, the n_type field is used for the symbol type and visibility.
The patch writes the aux header with an o_vstamp field value of 2 when the visibility is specified in XCOFF32 to make the new XCOFF32 interpretation used.

Reviewed By: DiggerLin, jhenderson

Differential Revision: https://reviews.llvm.org/D128148
2022-07-20 07:09:34 -04:00
Simon Pilgrim 029e83b401 [DAG] getNode - don't bother creating ADDO(X,0) or SUBO(X,0) nodes.
Similar to what we already do in getNode for basic ADD/SUB nodes, return the X operand directly, but here we know that there will be no/zero overflow as well.

As noted on D127115 - this path is being exercised by llvm/test/CodeGen/ARM/dsp-mlal.ll, although I haven't been able to get any codegen without a topological worklist.
2022-07-20 12:04:33 +01:00
David Green 4704da1374 [ARM] Fix Thumb2 compare being emitted ExpandCMP_SWAP
Given a patch like D129506, using instructions not valid for the current
target feature set becomes an error. This fixes an issue in
ARMExpandPseudo::ExpandCMP_SWAP where Thumb2 compares were used in
Thumb1Only code, such as thumbv8m.baseline targets.

Differential Revision: https://reviews.llvm.org/D129695
2022-07-20 12:04:22 +01:00
Simon Pilgrim 2b6edc9eda [X86] shuffle-blend.ll - add avx512f-only test coverage 2022-07-20 11:36:07 +01:00
Simon Pilgrim 766cd95481 [DAG] getNode - assert that ADDO/SUBO nodes have the correct ops + types 2022-07-20 11:23:58 +01:00
Simon Pilgrim bb4ff39baf [X86] shuffle-blend.ll - add 32-bit test coverage
Noticed while reviewing D129537
2022-07-20 11:23:57 +01:00
Florian Hahn 5124b21648
[VPlan] Initial def-use verification.
This patch introduces some initial def-use verification. This catches
cases like the one fixed by D129436.

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D129717
2022-07-20 11:06:32 +01:00
Simon Pilgrim 9fc347aa4e [DAG] PromoteIntRes_BUILD_VECTOR - extend constant boolean vectors according to target BooleanContents
PromoteIntRes_BUILD_VECTOR currently always ANY_EXTENDs build vector operands, but if this is a constant boolean vector we're losing the useful ability to keep the vector matching the BooleanContents mode used by the target.

This patch extends constant boolean vectors according to target BooleanContents, allowing a number of additional all-bits folds (notable XOR -> NOT conversions) to occur.

Differential Revision: https://reviews.llvm.org/D129641
2022-07-20 10:49:31 +01:00
Nicolai Hähnle 5a4033c367 update-test-checks: safely handle tests with #if's
There is at least one Clang test (clang/test/CodeGen/arm_acle.c) which
has functions guarded by #if's that cause those functions to be compiled
only for a subset of RUN lines.

This results in a case where one RUN line has a body for the function
and another doesn't. Treat this case as a conflict for any prefixes that
the two RUN lines have in common.

This change exposed a bug where functions with '$' in the name weren't
properly recognized in ARM assembly (despite there being a test case
that was supposed to catch the problem!). This bug is fixed as well.

Differential Revision: https://reviews.llvm.org/D130089
2022-07-20 11:23:49 +02:00
Chenbing Zheng 8ba794be31 [InstCombine] add more tests for xor_of_icmps. nfc 2022-07-20 17:19:00 +08:00
Chuanqi Xu 645d2dd3a9 Revert "Don't treat readnone call in presplit coroutine as not access memory"
This reverts commit 57224ff4a6. This
commit may trigger crashes on some workloads. Revert it for clearness.
2022-07-20 17:00:58 +08:00
Alexandros Lamprineas 051738b08c Reland "[AArch64] Add a tablegen pattern for UZP2."
Converts concat_vectors((trunc (lshr)), (trunc (lshr))) to UZP2
when the shift amount is half the width of the vector element.

Prioritize the ADDHN(2), SUBHN(2) patterns over UZP2.
Fixes https://github.com/llvm/llvm-project/issues/52919

Differential Revision: https://reviews.llvm.org/D130061
2022-07-20 09:47:32 +01:00
David Sherwood 79660d339e [LoopVectorize][AArch64] Add TTI hook preferPredicatedReductionSelect
By default if SVE is enabled we want the select instruction used for
reductions to be inside the loop, rather than outside. This makes it
possible for the backend to fold the select into the operation to
produce a single predicated add, fadd, etc.

Differential Revision: https://reviews.llvm.org/D129763
2022-07-20 09:33:29 +01:00
Lorenzo Albano 07d69d9fc9 [VP] Legalize the stride operand for EXPERIMENTAL_VP_STRIDED SDNodes
Add promotion and expansion of integer operands for
experimental_vp_strided SelectionDAG nodes; the expansion is actually
just a truncation of the stride operand.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D123112
2022-07-20 10:22:43 +02:00
Chenbing Zheng 07c90d9e3e [InstCombine] add tests for icmp-shr. nfc 2022-07-20 16:04:00 +08:00
Luo, Yuanke f72e0a8786 [X86] Add test case for shuffle.
The test case focus on shuffle which can be transformed to select or
blend.
2022-07-20 15:51:32 +08:00