Commit Graph

92296 Commits

Author SHA1 Message Date
Adam Nemet e1af3c635c [LV] Improve accuracy and formatting of function comment
llvm-svn: 274182
2016-06-29 22:04:10 +00:00
Zachary Turner 07670b3e98 Resubmit "Update llvm command line parser to support subcommands."
This fixes an issue where occurrence counts would be unexpectedly
reset when parsing different parts of a command line multiple
times.

**ORIGINAL COMMIT MESSAGE**

This allows command line tools to use syntaxes like the following:

      llvm-foo.exe command1 -o1 -o2
      llvm-foo.exe command2 -p1 -p2

Where command1 and command2 contain completely different sets of
valid options.  This is backwards compatible with previous uses
of llvm cl which did not support subcommands, as any option
which specifies no optional subcommand (e.g. all existing
code) goes into a special "top level" subcommand that expects
dashed options to appear immediately after the program name.
For example, code which is subcommand unaware would generate
a command line such as the following, where no subcommand
is specified:

      llvm-foo.exe -q1 -q2

The top level subcommand can co-exist with actual subcommands,
as it is implemented as an actual subcommand which is searched
if no explicit subcommand is specified.  So llvm-foo.exe as
specified above could be written so as to support all three
aforementioned command lines simultaneously.

There is one additional "special" subcommand called AllSubCommands,
which can be used to inject an option into every subcommand.
This is useful to support things like help, so that commands
such as:

      llvm-foo.exe --help
      llvm-foo.exe command1 --help
      llvm-foo.exe command2 --help

All work and display the help for the selected subcommand
without having to explicitly go and write code to handle each
one separately.

This patch is submitted without an example of anything actually
using subcommands, but a followup patch will convert the
llvm-pdbdump tool to use subcommands.

Reviewed By: beanz

llvm-svn: 274171
2016-06-29 21:48:26 +00:00
Artem Belevich 4d5d7be8cc Revert r273313 "[NVPTX] Improve lowering of byval args of device functions."
The change causes llvm crash in some unoptimized builds.

llvm-svn: 274163
2016-06-29 20:51:15 +00:00
Evgeniy Stepanov a5da256f92 StackColoring for SafeStack.
This is a fix for PR27842.

An IR-level implementation of stack coloring tailored to work with
SafeStack. It is a bit weaker than the MI implementation in that it
does not the "lifetime start at first access" logic. This can be
improved in the future.

This patch also replaces the naive implementation of stack frame
layout with a greedy algorithm that can split existing stack slots
and even fit small objects inside the alignment padding of other
objects.

llvm-svn: 274162
2016-06-29 20:37:43 +00:00
Kevin Enderby c60a321c6b Change Archive::create() from ErrorOr<...> to Expected<...> and update
its clients.

This commit will break the next lld builds.  I’ll be committing the matching
change for lld next.

llvm-svn: 274160
2016-06-29 20:35:44 +00:00
Tim Shen aec68b263d [InstCombine] Simplify and correct folding fcmps with the same children
Summary: Take advantage of FCmpInst::Predicate's bit pattern and handle (fcmp *, x, y) | (fcmp *, x, y) and (fcmp *, x, y) & (fcmp *, x, y) more consistently. Also fold more FCmpInst::FCMP_FALSE and FCmpInst::FCMP_TRUE to constants.

Currently InstCombine wrongly folds (fcmp ogt, x, y) | (fcmp ord, x, y) to (fcmp ogt, x, y); this patch also fixes that.

Reviewers: spatel

Subscribers: llvm-commits, iteratee, echristo

Differential Revision: http://reviews.llvm.org/D21775

llvm-svn: 274156
2016-06-29 20:10:17 +00:00
Tim Shen 860a67eb4c [InstCombine, NFC] Change the generated variable names by creating new instructions
This removes some noise for D21775's test changes.

llvm-svn: 274155
2016-06-29 20:10:13 +00:00
Davide Italiano 901269c8c9 [Triple] Reimplement isLittleEndian(). Now it works for arm too.
Differential Revision:   http://reviews.llvm.org/D21846

llvm-svn: 274154
2016-06-29 20:01:39 +00:00
Nirav Dave 8e10380b73 Permit memory operands in ins/outs instructions
[x86] (PR15455) While (ins|outs)[bwld] instructions do not take %dx as a
memory operand, various unofficial references do and objdump
disassembles to this format. Extend special treatment of
similar (in|out)[bwld] operations.

Reviewers: craig.topper, rnk, ab

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D18837

llvm-svn: 274152
2016-06-29 19:54:27 +00:00
Nico Weber 12fdf60b75 Revert r272251, it caused PR28348.
llvm-svn: 274141
2016-06-29 17:33:41 +00:00
Ahmed Bougacha 15a2f6d58c [X86] Lower blended PACKUSes using appropriate types.
When lowering two blended PACKUS, we used to disregard the types
of the PACKUS inputs, indiscriminately generating a v16i8 PACKUS.

This leads to non-selectable things like:
    (v16i8 (PACKUS (v4i32 v0), (v4i32 v1)))

Instead, check that the PACKUSes have the same type, and use that
as the final result type.

llvm-svn: 274138
2016-06-29 16:56:09 +00:00
Benjamin Kramer 832d042078 [ManagedStatic] Reimplement double-checked locking with std::atomic.
This gets rid of the memory fence in the hot path (dereferencing the
ManagedStatic), trading for an extra mutex lock in the cold path (when
the ManagedStatic was uninitialized). Since this only happens on the
first accesses it shouldn't matter much. On strict architectures like
x86 this removes any atomic instructions from the hot path.

Also remove the tsan annotations, tsan knows how standard atomics work
so they should be unnecessary now.

llvm-svn: 274131
2016-06-29 15:04:07 +00:00
Rafael Espindola a99ccfce1a Drop support for creating $stubs.
They are created by ld64 since OS X 10.5.

llvm-svn: 274130
2016-06-29 14:59:50 +00:00
Elena Demikhovsky 5e21c94f25 Reverted patch 273864
llvm-svn: 274115
2016-06-29 10:01:06 +00:00
Marcin Koscielnicki 518cbc7cc3 [SystemZ] Add floating-point test data class instructions.
These are not used by CodeGen yet - ISD combiners creating the new node
will come in subsequent patches.

llvm-svn: 274108
2016-06-29 07:29:07 +00:00
Vedant Kumar 34e4e477c8 Revert "[Coverage] Move logic to encode filenames and mappings into llvm (NFC)"
This reverts commit 520a8298d8ef676b5da617ba3d2c7fa37381e939 (r273055).

This is breaking stage2 instrumented builds with "malformed coverage
data" errors.

llvm-svn: 274106
2016-06-29 05:33:26 +00:00
Vedant Kumar a30139d50c Revert "[Coverage] Clarify ownership of a MemoryBuffer in the reader (NFC)"
This reverts commit 1037ef2574adde2103ad221d63834c3e1df4a776.

llvm-svn: 274105
2016-06-29 05:33:24 +00:00
Craig Topper df7454f94b Revert "[ValueTracking] Teach computeKnownBits for PHI nodes to compute sign bit for a recurrence with a NSW addition."
This is breaking an optimizaton remark test in clang. I've identified a couple fixes for that, but want to understand it better before I commit to anything.

llvm-svn: 274102
2016-06-29 04:57:00 +00:00
Adam Nemet ad437fff53 [Diag] Add getter shouldAlwaysPrint. NFC
For the new hotness attribute, the API will take the pass rather than
the pass name so we can no longer play the trick of AlwaysPrint being a
special pass name. This adds a getter to help the transition.

There is also a corresponding clang patch.

llvm-svn: 274100
2016-06-29 04:55:19 +00:00
Craig Topper 2cc199baff [ValueTracking] Teach computeKnownBits for PHI nodes to compute sign bit for a recurrence with a NSW addition.
If a operation for a recurrence is an addition with no signed wrap and both input sign bits are 0, then the result sign bit must also be 0. Similar for the negative case.

I found this deficiency while playing around with a loop in the x86 backend that contained a signed division that could be optimized into an unsigned division if we could prove both inputs were positive. One of them being the loop induction variable. With this patch we can perform the conversion for this case. One of the test cases here is a contrived variation of the loop I was looking at.

Differential revision: http://reviews.llvm.org/D21493

llvm-svn: 274098
2016-06-29 03:46:47 +00:00
Craig Topper 3a011de10c [DAGCombine] Teach DAG combine to handle ORs of shuffles involving zero vectors where the zero vector is the first operand to the shuffle instead of the second.
llvm-svn: 274097
2016-06-29 03:29:12 +00:00
Craig Topper f067a043fb [CodeGen] Make ShuffleVectorSDNode::commuteMask take a MutableArrayRef instead of SmallVectorImpl. NFC.
llvm-svn: 274095
2016-06-29 03:29:06 +00:00
Eric Christopher 0c58837b1f Revert "[InstCombine] Avoid combining the bitcast of a var that is used as both address and result of load instructions"
Revert "[InstCombine] Combine A->B->A BitCast"

as this appears to cause PR27996 and as discussed in http://reviews.llvm.org/D20847

This reverts commits r270135 and r263734.

llvm-svn: 274094
2016-06-29 03:05:58 +00:00
Davide Italiano 941685e9f4 [Triple] Add isLittleEndian().
This allows us to query about the endianness without having to
look at DataLayout. The API will be used (and tested) in lld,
in order to find out the endianness of BitcodeFiles.

Briefly discussed with Rafael.

llvm-svn: 274090
2016-06-29 01:56:27 +00:00
Vedant Kumar 1ead14b147 [Object] Fix a -Wpessimizing-move error; clang-format; NFC
llvm-svn: 274085
2016-06-29 00:37:13 +00:00
Kevin Enderby 42398051d8 Finish cleaning up most of the error handling in libObject’s MachOUniversalBinary
and its clients to use the new llvm::Error model for error handling.

Changed getAsArchive() from ErrorOr<...> to Expected<...> so now all
interfaces there use the new llvm::Error model for return values.

In the two places it had if (!Parent) this is actually a program error so changed
from returning errorCodeToError(object_error::parse_failed) to calling
report_fatal_error() with a message.

In getObjectForArch() added error messages to its two llvm::Error return values
instead of returning errorCodeToError(object_error::arch_not_found) with no
error message.

For the llvm-obdump, llvm-nm and llvm-size clients since the only binary files in
Mach-O Universal Binaries that are supported are Mach-O files or archives with
Mach-O objects, updated their logic to generate an error when a slice contains
something like an ELF binary instead of ignoring it. And added a test case for
that.

The last error stuff to be cleaned up for libObject’s MachOUniversalBinary is
the use of errorOrToExpected(Archive::create(ObjBuffer)) which needs
Archive::create() to be changed from ErrorOr<...> to Expected<...> first,
which I’ll work on next. 

llvm-svn: 274079
2016-06-28 23:16:13 +00:00
Kyle Butt 82c2290e0f Codegen: [MBP] Add messages to asserts. NFC
llvm-svn: 274075
2016-06-28 22:50:54 +00:00
Weiming Zhao 5410edddb1 [ARM] Fix 28282: cost computation for constant hoisting
Summary:
This fixes bug: https://llvm.org/bugs/show_bug.cgi?id=28282

Currently the cost model of constant hoisting checks the bit width of the data type of the constants.
However, the actual immediate value is small enough and not need to be hoisted.
This patch checks for the actual bit width needed for the constant.

Reviewers: t.p.northover, rengolin

Subscribers: aemerson, rengolin, llvm-commits

Differential Revision: http://reviews.llvm.org/D21668

llvm-svn: 274073
2016-06-28 22:30:45 +00:00
Manman Ren d16490dfd1 Revert r274054 to try to appease the bot
llvm-svn: 274072
2016-06-28 22:20:17 +00:00
Dehao Chen 8cd84aaa6f Relax the clearance calculating for breaking partial register dependency.
Summary: LLVM assumes that large clearance will hide the partial register spill penalty. But in our experiment, 16 clearance is too small. As the inserted XOR is normally fairly cheap, we should have a higher clearance threshold to aggressively insert XORs that is necessary to break partial register dependency.

Reviewers: wmi, davidxl, stoklund, zansari, myatsina, RKSimon, DavidKreitzer, mkuper, joerg, spatel

Subscribers: davidxl, llvm-commits

Differential Revision: http://reviews.llvm.org/D21560

llvm-svn: 274068
2016-06-28 21:19:34 +00:00
Chris Bieneman 92b2e8a295 [YAML] Fix YAML tags appearing before the start of sequence elements
Our existing yaml::Output code writes tags immediately when mapTag is called, without any state handling. This results in tags on sequence elements being written before the element itself. For example, we see this:

SomeArray:     !elem_type
  - key1:         1
    key2:         2 !elem_type2
  - key3:         3
    key4:         4

We should instead see:

SomeArray:
  - !elem_type
    key1:         1
    key2:         2
  - !elem_type2
    key3:         3
    key4:         4

Our reader handles reading properly, so this bug only impacts writing yaml sequences with tagged elements.

As a test for this I've modified the Mach-O yaml encoding to allways apply the !mach-o tag when encoding MachOYAML::Object entries. This results in the !mach-o tag appearing as expected in dumped fat files.

llvm-svn: 274067
2016-06-28 21:10:26 +00:00
Zhan Jun Liau 347db3e18e [SystemZ] Use NILL instruction instead of NILF where possible
Summary: SystemZ shift instructions only use the last 6 bits of the shift
amount. When the result of an AND operation is used as a shift amount, this
means that we can use the NILL instruction (which operates on the last 16 bits)
rather than NILF (which operates on the last 32 bits) for a 16-bit savings in
instruction size.

Reviewers: uweigand

Subscribers: llvm-commits

Author: colpell
Committing on behalf of Elliot.

Differential Revision: http://reviews.llvm.org/D21686

llvm-svn: 274066
2016-06-28 21:03:19 +00:00
Matthias Braun 0b9a07883d X86FrameLowering: Check subregs when deciding prolog kill flags
llvm-svn: 274057
2016-06-28 20:31:56 +00:00
Rafael Espindola b1556c42ce Use isPositionIndependent in a few more places.
I think this converts all the simple cases that really just care about
the generated code being position independent or not. The remaining
uses are a bit more complicated and are checking things like "is this
a library or executable" or "can this symbol be preempted".

llvm-svn: 274055
2016-06-28 20:13:36 +00:00
Zachary Turner 2012d744f4 Update llvm command line parser to support subcommands.
This allows command line tools to use syntaxes like the following:

  llvm-foo.exe command1 -o1 -o2
  llvm-foo.exe command2 -p1 -p2

Where command1 and command2 contain completely different sets of
valid options.  This is backwards compatible with previous uses
of llvm cl which did not support subcommands, as any option
which specifies no optional subcommand (e.g. all existing
code) goes into a special "top level" subcommand that expects
dashed options to appear immediately after the program name.
For example, code which is subcommand unaware would generate
a command line such as the following, where no subcommand
is specified:

  llvm-foo.exe -q1 -q2

The top level subcommand can co-exist with actual subcommands,
as it is implemented as an actual subcommand which is searched
if no explicit subcommand is specified.  So llvm-foo.exe as
specified above could be written so as to support all three
aforementioned command lines simultaneously.

There is one additional "special" subcommand called AllSubCommands,
which can be used to inject an option into every subcommand.
This is useful to support things like help, so that commands
such as:

  llvm-foo.exe --help
  llvm-foo.exe command1 --help
  llvm-foo.exe command2 --help

All work and display the help for the selected subcommand
without having to explicitly go and write code to handle each
one separately.

This patch is submitted without an example of anything actually
using subcommands, but a followup patch will convert the
llvm-pdbdump tool to use subcommands.

Reviewed By: beanz
Differential Revision: http://reviews.llvm.org/D21485

llvm-svn: 274054
2016-06-28 20:09:47 +00:00
Krzysztof Parzyszek 5db97acfa2 Fix typo
llvm-svn: 274051
2016-06-28 19:12:28 +00:00
Artur Pilipenko 7ad95ec22d Support arbitrary addrspace pointers in masked load/store intrinsics
This is a resubmittion of 263158 change after fixing the existing problem with intrinsics mangling (see LTO and intrinsics mangling llvm-dev thread for details).

This patch fixes the problem which occurs when loop-vectorize tries to use @llvm.masked.load/store intrinsic for a non-default addrspace pointer. It fails with "Calling a function with a bad signature!" assertion in CallInst constructor because it tries to pass a non-default addrspace pointer to the pointer argument which has default addrspace.

The fix is to add pointer type as another overloaded type to @llvm.masked.load/store intrinsics.

Reviewed By: reames

Differential Revision: http://reviews.llvm.org/D17270

llvm-svn: 274043
2016-06-28 18:27:25 +00:00
Matt Arsenault eb9025d698 AMDGPU: Fix global isel crashes
llvm-svn: 274039
2016-06-28 17:42:09 +00:00
Chad Rosier 02e831cf2f Typos. NFC.
llvm-svn: 274038
2016-06-28 17:19:10 +00:00
Michael Kuperstein 85de98fd24 [X86] Reorder source list alphabetically. NFC.
llvm-svn: 274036
2016-06-28 17:11:15 +00:00
Matt Arsenault 254a6450dd AMDGPU: Fix typo
llvm-svn: 274034
2016-06-28 16:59:53 +00:00
Matt Arsenault 3d846501fb AMDGPU: Remove unused function
llvm-svn: 274033
2016-06-28 16:59:49 +00:00
David Majnemer 1c7d532cde [X86] Make WRPKRU/RDPKRU pass -verify-machineinstrs
The original implementation attempted to zero registers using
XOR %foo, %foo.  This is problematic because it constitutes a
read-modify-write of a register which might not be defined.

Instead, use MOV32r0 to avoid these problems; expandPostRAPseudo does
the right thing here.

llvm-svn: 274024
2016-06-28 16:04:46 +00:00
Rafael Espindola 5ac8f5c379 Don't pass a Reloc::Model to GVIsIndirectSymbol.
It already has access to it.

While at it, rename it to isGVIndirectSymbol.

llvm-svn: 274023
2016-06-28 15:38:13 +00:00
Rafael Espindola 82f4631c88 Don't pass Reloc::Model to places that already have it. NFC.
llvm-svn: 274022
2016-06-28 15:18:26 +00:00
Rafael Espindola b30e66b82c Convert more cases to isPositionIndependent(). NFC.
llvm-svn: 274021
2016-06-28 14:33:28 +00:00
Rafael Espindola 6f7c280a3d Delete dead code. NFC.
llvm-svn: 274020
2016-06-28 14:26:39 +00:00
Marcin Koscielnicki 234e5a809b [SystemZ] Save/restore r6 and r7 if function contains landing pad.
This fixes PR27102.

Differential Revision: http://reviews.llvm.org/D18541

llvm-svn: 274017
2016-06-28 14:13:11 +00:00
Simon Pilgrim 5f71c909f0 [X86][AVX] Peek through bitcasts to find the source of broadcasts (reapplied)
AVX1 can only broadcast vectors as floats/doubles, so for 256-bit vectors we insert bitcasts if we are shuffling v8i32/v4i64 types. Unfortunately the presence of these bitcasts prevents the current broadcast lowering code from peeking through cases where we have concatenated / extracted vectors to create the 256-bit vectors.

This patch allows us to peek through bitcasts as long as the number of elements doesn't change (i.e. element bitwidth is the same) so the broadcast index is not affected.

Note this bitcast peek is different from the stage later on which doesn't care about the type and is just trying to find a load node.

As we're being more aggressive with bitcasts, we also need to ensure that the broadcast type is correctly bitcasted

Differential Revision: http://reviews.llvm.org/D21660

llvm-svn: 274013
2016-06-28 13:24:05 +00:00
Rafael Espindola 248cfb9752 Convert 2 more uses to shouldAssumeDSOLocal(). NFC.
llvm-svn: 274009
2016-06-28 12:49:12 +00:00
Simon Pilgrim 2d53158012 Fixed MSVC unresolved symbol error due to an incorrectly declared extern
llvm-svn: 274007
2016-06-28 12:34:44 +00:00
Rafael Espindola 444746b483 Use isPositionIndependent(). NFC.
llvm-svn: 274005
2016-06-28 12:25:00 +00:00
Simon Pilgrim c15d217831 [X86][SSE] Added support for combining target shuffles to (V)PSHUFD/VPERMILPD/VPERMILPS immediate permutes
This patch allows target shuffles to be combined to single input immediate permute instructions - (V)PSHUFD/VPERMILPD/VPERMILPS - allowing more general pattern matching than what we current do and improves the likelihood of memory folding compared to existing patterns which tend to reuse the input in multiple arguments.

Further permute instructions (V)PSHUFLW/(V)PSHUFHW/(V)PERMQ/(V)PERMPD may be added in the future but its proven tricky to create tests cases for them so far. (V)PSHUFLW/(V)PSHUFHW is already handled quite well in combineTargetShuffle so it may be that removing some of that code may allow us to perform more of the combining in one place without duplication.

Differential Revision: http://reviews.llvm.org/D21148

llvm-svn: 273999
2016-06-28 08:08:15 +00:00
Xinliang David Li 3e176c77ab [BFI/MBFI]: cfg graph view with color scheme
This patch enhances dot graph viewer to show hot regions
with hot bbs/edges displayed in red. The ratio of the bb
freq to the max freq of the function needs to be no less
than the value specified by view-hot-freq-percent option.
The default value is 10 (i.e. 10%).

llvm-svn: 273996
2016-06-28 06:58:21 +00:00
Xinliang David Li 8dd5ce97f9 [BFI]: enhance BFI graph dump
MBFI supports profile count dumping and function
name based filtering. Add these two feature to
BFI as well. The filtering option is shared between
BFI and MBFI: -view-bfi-func-name=..

llvm-svn: 273992
2016-06-28 04:07:03 +00:00
Adam Nemet bd861acf29 [LLE] Don't hoist conditionally executed loads
If the load is conditional we can't hoist its 0-iteration instance to
the preheader because that would make it unconditional.  Thus we would
access a memory location that the original loop did not access.

llvm-svn: 273991
2016-06-28 04:02:47 +00:00
Xinliang David Li 55415f2565 [BFI]: graph viewer code refactoring
BFI and MBFI's dot traits class share most of the
code and all future enhancement. This patch extracts
common implementation into base class BFIDOTGraphTraitsBase.

This patch also enables BFI graph to show branch probability
on edges as MBFI does before.

llvm-svn: 273990
2016-06-28 03:41:29 +00:00
Nick Lewycky 9980075133 NFC. Fix popular typo in comment 'deferencing' --> 'dereferencing'.
Bonus changes, * placement in X86ISelLowering and 'exerce' -> 'exercise' in test.

llvm-svn: 273984
2016-06-28 01:45:05 +00:00
Matt Arsenault b4d9503171 AMDGPU: Fix out of bounds indirect indexing errors
This was producing acceses to registers beyond the super
register's limits, resulting in verifier failures.

llvm-svn: 273977
2016-06-28 01:09:00 +00:00
Matthias Braun ec3330328a AArch64: Remove unnecessary namespace llvm; NFC
llvm-svn: 273975
2016-06-28 00:54:33 +00:00
Michael Kuperstein 835facd863 [PM] Normalize FIXMEs for missing PreserveCFG to have the same wording.
llvm-svn: 273974
2016-06-28 00:54:12 +00:00
Xinliang David Li 3264fdd3ca [BFI]: code cleanup
Expose getBPI interface from BFI impl and use
it in graph viewer. This eliminates the dependency
on old PM interface.

llvm-svn: 273967
2016-06-28 00:15:45 +00:00
Matt Arsenault 55dff27122 AMDGPU: Fix global isel build
llvm-svn: 273964
2016-06-28 00:11:26 +00:00
Chandler Carruth dca834089a [PM] Improve the debugging and logging facilities of the CGSCC bits of
the new pass manager.

This adds operator<< overloads for the various bits of the
LazyCallGraph, dump methods for use from the debugger, and debug logging
using them to the CGSCC pass manager.

Having this was essential for debugging the call graph update patch, and
I've extracted what I could from that patch here to minimize the delta.

llvm-svn: 273961
2016-06-27 23:26:08 +00:00
Rafael Espindola 97ca82776d Fix typo.
Thanks to Benjamin Kramer for noticing.

llvm-svn: 273959
2016-06-27 23:21:07 +00:00
Rafael Espindola 3beef8d6db Move shouldAssumeDSOLocal to Target.
Should fix the shared library build.

llvm-svn: 273958
2016-06-27 23:15:57 +00:00
George Burgess IV f10c7fc286 [CFLAA] Make MSVC happy. NFC.
Apparently, MSVC complains if there's an implicit conversion from
`unsigned` to `unsigned long long`, if the `unsigned` is the result of
a bit shift.

llvm-svn: 273955
2016-06-27 22:50:01 +00:00
Easwaran Raman 22eb80a114 Fix size computation of array allocation in inline cost analysis
Differential revision: http://reviews.llvm.org/D21690

llvm-svn: 273952
2016-06-27 22:31:53 +00:00
Sanjay Patel 59ed2ffca3 [InstCombine] shrink type of sdiv if dividend is sexted and constant divisor is small enough (PR28153)
This should fix PR28153:
https://llvm.org/bugs/show_bug.cgi?id=28153

Differential Revision: http://reviews.llvm.org/D21769

llvm-svn: 273951
2016-06-27 22:27:11 +00:00
Chris Dewhurst d534d3aae8 [Sparc] Atomics pass changes to make work with SparcV8 back-ends.
This change reverts a "false" test that was placed to avoid regressions while the atomics pass was completed for the Sparc back-ends.

llvm-svn: 273949
2016-06-27 22:11:09 +00:00
Matt Arsenault ed1fd7e056 AMDGPU: Set MinInstAlignment
Not sure this actually changes anything

llvm-svn: 273947
2016-06-27 21:42:49 +00:00
Kevin Enderby 1051909df1 Change all but the last ErrorOr<...> use for MachOUniversalBinary to Expected<...> to
allow a good error message to be produced.

I added the one test case that the object file tools could produce an error
message.  The other two errors can’t be triggered if the input file is passed
through sys::fs::identify_magic().  But the malformedError("bad magic number")
does get triggered by the logic in llvm-dsymutil when dealing with a normal
Mach-O file.  The other "File too small ..." error would take a logic error
currently to produce and is not tested for.

llvm-svn: 273946
2016-06-27 21:39:39 +00:00
Rafael Espindola f9e348bd59 Convert a few more comparisons to isPositionIndependent(). NFC.
llvm-svn: 273945
2016-06-27 21:33:08 +00:00
Rafael Espindola 68760387df Delete the IsStatic predicate.
In all its uses it was equivalent to IsNotPIC.

llvm-svn: 273943
2016-06-27 21:09:14 +00:00
Matt Arsenault 59c0ffa22a AMDGPU: Implement per-function subtargets
llvm-svn: 273940
2016-06-27 20:48:03 +00:00
Matt Arsenault 03d8584590 AMDGPU: Move subtarget feature checks into passes
llvm-svn: 273937
2016-06-27 20:32:13 +00:00
Justin Holewinski cb29fb4a98 Only emit extension for zeroext/signext arguments if type is < 32 bits
Reviewers: jingyue, jlebar

Subscribers: jholewinski

Differential Revision: http://reviews.llvm.org/D21756

llvm-svn: 273922
2016-06-27 20:22:22 +00:00
Rafael Espindola 8121becac3 Teach shouldAssumeDSOLocal about tls.
Fixes a fixme about handling other visibilities.

llvm-svn: 273921
2016-06-27 20:19:14 +00:00
Elena Demikhovsky 6f2ec8104a Fixed crash of SLP Vectorizer on KNL
The bug is connected to vector GEPs.
https://llvm.org/bugs/show_bug.cgi?id=28313

llvm-svn: 273919
2016-06-27 20:07:00 +00:00
Matt Arsenault 21a4625a16 AMDGPU: Fix verifier errors with undef vector indices
Also fix pointlessly adding exec to liveins.

llvm-svn: 273916
2016-06-27 19:57:44 +00:00
Chris Bieneman 8ff0c11357 [yaml2obj] Remove --format option in favor of YAML tags
Summary:
Our YAML library's handling of tags isn't perfect, but it is good enough to get rid of the need for the --format argument to yaml2obj. This patch does exactly that.

Instead of requiring --format, it infers the format based on the tags found in the object file. The supported tags are:

!ELF
!COFF
!mach-o
!fat-mach-o

I have a corresponding patch that is quite large that fixes up all the in-tree test cases.

Reviewers: rafael, Bigcheese, compnerd, silvas

Subscribers: compnerd, llvm-commits

Differential Revision: http://reviews.llvm.org/D21711

llvm-svn: 273915
2016-06-27 19:53:53 +00:00
Matt Arsenault 82f41518ed Verifier: Reject non-float !fpmath
Code already assumes this is float. getFPAccuracy()
crashes on any other type.

llvm-svn: 273912
2016-06-27 19:43:15 +00:00
Matt Arsenault f0f721a682 DAGCombiner: Don't narrow volatile vector loads + extract
llvm-svn: 273909
2016-06-27 19:31:04 +00:00
Rafael Espindola 428b3e6edf Use isPositionIndependent(). NFC.
llvm-svn: 273907
2016-06-27 19:15:08 +00:00
Sanjay Patel bedd1f9d3d [InstCombine] refactor sdiv by APInt transforms (NFC)
There's at least one more fold to do here:
https://llvm.org/bugs/show_bug.cgi?id=28153

llvm-svn: 273904
2016-06-27 18:38:40 +00:00
Rafael Espindola cbfeb9f7cd Use isPositionIndependent(). NFC.
llvm-svn: 273903
2016-06-27 18:37:44 +00:00
George Burgess IV 11ff52bffc [CFLAA] Use unsigned numbers for bit-shifts.
This uses `1U` instead of `1ULL` because StratifiedAttrs is a 32-bit
bitset.

Thanks to Hans-Bernhard Broker for bringing this up.

llvm-svn: 273902
2016-06-27 18:35:00 +00:00
Daniel Berlin 16ed57c86b Factor out buildMemorySSA from getWalker.
NFC.

llvm-svn: 273901
2016-06-27 18:22:27 +00:00
Rafael Espindola 8bba560064 Refactor duplicated condition.
llvm-svn: 273900
2016-06-27 18:09:22 +00:00
Elena Demikhovsky ad3929cc64 X86 Lowering - Fixed a crash in ICMP scalar instruction
Fixed a bug in EmitTest() function in combining shl + icmp.

https://llvm.org/bugs/show_bug.cgi?id=28119

llvm-svn: 273899
2016-06-27 18:07:16 +00:00
Sanjay Patel c6ada53be5 [InstCombine] use m_APInt for div --> ashr fold
The APInt matcher works with splat vectors, so we get this fold for vectors too.

llvm-svn: 273897
2016-06-27 17:25:57 +00:00
Rafael Espindola b0f59cb5a8 Use isPositionIndependent(). NFC.
llvm-svn: 273896
2016-06-27 17:21:46 +00:00
Artur Pilipenko 72f76b8805 Revert -r273892 "Support arbitrary addrspace pointers in masked load/store intrinsics" since some of the clang tests don't expect to see the updated signatures.
llvm-svn: 273895
2016-06-27 16:54:33 +00:00
Easwaran Raman 1832bf6aee [PM] Port PartialInlining to the new PM
Differential revision: http://reviews.llvm.org/D21699

llvm-svn: 273894
2016-06-27 16:50:18 +00:00
Artur Pilipenko a36aa41519 Support arbitrary addrspace pointers in masked load/store intrinsics
This is a resubmittion of 263158 change after fixing the existing problem with intrinsics mangling (see LTO and intrinsics mangling llvm-dev thread for details).

This patch fixes the problem which occurs when loop-vectorize tries to use @llvm.masked.load/store intrinsic for a non-default addrspace pointer. It fails with "Calling a function with a bad signature!" assertion in CallInst constructor because it tries to pass a non-default addrspace pointer to the pointer argument which has default addrspace.

The fix is to add pointer type as another overloaded type to @llvm.masked.load/store intrinsics.

Reviewed By: reames

Differential Revision: http://reviews.llvm.org/D17270

llvm-svn: 273892
2016-06-27 16:29:26 +00:00
Kuba Brecka 7d03ce480a [asan] fix false dynamic-stack-buffer-overflow report with constantly-sized dynamic allocas, LLVM part
See the bug report at https://github.com/google/sanitizers/issues/691. When a dynamic alloca has a constant size, ASan instrumentation will treat it as a regular dynamic alloca (insert calls to poison and unpoison), but the backend will turn it into a regular stack variable. The poisoning/unpoisoning is then broken. This patch will treat such allocas as static.

Differential Revision: http://reviews.llvm.org/D21509

llvm-svn: 273888
2016-06-27 15:57:08 +00:00
Zhan Jun Liau 4f130b4410 [SystemZ] Avoid generating 2 XOR instructions for (and (xor x, -1), y)
Summary:
Created a pattern to match 64-bit mode (and (xor x, -1), y)
to a shorter sequence of instructions.

Before the change, the canonical form is translated to:
        xihf    %r3, 4294967295
        xilf    %r3, 4294967295
        ngr     %r2, %r3

After the change, the canonical form is translated to:
        ngr     %r3, %r2
        xgr     %r2, %r3

Reviewers: zhanjunl, uweigand

Subscribers: llvm-commits

Author: assem

Committing on behalf of Assem.

Differential Revision: http://reviews.llvm.org/D21693

llvm-svn: 273887
2016-06-27 15:55:30 +00:00
Krzysztof Parzyszek 5da24e5495 [Hexagon] Equally-sized vectors are equivalent in ISel (except vNi1)
llvm-svn: 273885
2016-06-27 15:08:22 +00:00
Simon Dardis b8dc8485c3 [mips] Add instruction itineraries for LSA, DLSA
Reviewers: vkalintiris, dsanders

Differential Review: http://reviews.llvm.org/D21679

llvm-svn: 273883
2016-06-27 14:55:07 +00:00
Renato Golin ef3eb066a9 [ARM] Fix Thumb text sections' flags under COFF/Windows
The main issue here is that the "thumb" flag wasn't set for some of these
sections, making MSVC's link.exe fails to correctly relocate code
against the symbols inside these sections. link.exe could fail for
instance with the "fixup is not aligned for target 'XX'" error. If
linking doesn't fail, the relocation process goes wrong in the end and
invalid code is generated by the linker.

This patch adds Thumb/ARM information so that the right flags are set
on COFF/Windows.

Patch by Adrien Guinet.

llvm-svn: 273880
2016-06-27 14:42:20 +00:00
Nico Weber 1e058160dd Revert 273848, it caused PR28329
llvm-svn: 273879
2016-06-27 14:36:46 +00:00
Chris Dewhurst 5047f24818 Last line of file missing on previous check-in.
llvm-svn: 273878
2016-06-27 14:35:07 +00:00
Rafael Espindola 0db11db560 Move isPositionIndependent up to AsmPrinter.
Use it in ppc too.

llvm-svn: 273877
2016-06-27 14:19:45 +00:00
Chris Dewhurst 2bad85c14b [Sparc] Formatting and commenting changes per review.
Differential Review: http://reviews.llvm.org/rL273108

llvm-svn: 273876
2016-06-27 14:19:19 +00:00
Rafael Espindola 21d22a01ea Use the isPositionIndependent predicate. NFC.
llvm-svn: 273875
2016-06-27 14:05:43 +00:00
Diana Picus eb1068a5fe [ARM] Use member initializers in ARMSubtarget. NFCI
Same as r273556, but with C++11 member initializers.

Change suggested by Matthias Braun (see http://reviews.llvm.org/D21432).

llvm-svn: 273873
2016-06-27 13:06:10 +00:00
Simon Pilgrim 634dde36b4 Fix "not all control paths return a value" warning on MSVC
llvm-svn: 273872
2016-06-27 12:58:10 +00:00
Rafael Espindola e1d255f05c Simplify getLabelAccessInfo.
It now takes a IsPIC flag instead of computing and returning it.

llvm-svn: 273871
2016-06-27 12:56:02 +00:00
Rafael Espindola 9f1c1fe428 Use the isPositionIndependent predicate. NFC.
llvm-svn: 273870
2016-06-27 12:48:21 +00:00
Rafael Espindola b2b6a8580c Add an explanation on how mips is special in here.
llvm-svn: 273868
2016-06-27 12:33:33 +00:00
Benjamin Kramer 4c137dbe25 [msan] Tighten up type in StoreList. NFC.
llvm-svn: 273866
2016-06-27 12:25:23 +00:00
Elena Demikhovsky 4c58b2761a Fixed consecutive memory access detection in Loop Vectorizer.
It did not handle correctly cases without GEP.

The following loop wasn't vectorized:

for (int i=0; i<len; i++)

  *to++ = *from++;

I use getPtrStride() to find Stride for memory access and return 0 is the Stride is not 1 or -1.

Re-commit rL273257 - revision: http://reviews.llvm.org/D20789

llvm-svn: 273864
2016-06-27 11:19:23 +00:00
NAKAMURA Takumi 5cbd41e0a8 SIMachineFunctionInfo.cpp: Appease msc18 to use std::array.
llvm-svn: 273860
2016-06-27 10:26:43 +00:00
NAKAMURA Takumi f619b50fab Reformat.
llvm-svn: 273859
2016-06-27 10:26:36 +00:00
NAKAMURA Takumi d377ad806e Reformat blank lines.
llvm-svn: 273858
2016-06-27 10:26:25 +00:00
Benjamin Kramer 020a740b5b [sparc] Simplify slow and verbose string matching code to startswith_lower.
No functionality change intended, found by cppcheck. PR28274.

llvm-svn: 273857
2016-06-27 09:38:56 +00:00
Diana Picus 92423ce194 [ARM] Do not test for CPUs, use SubtargetFeatures (Part 2). NFCI
This is a follow-up for r273544.

The end goal is to get rid of the isSwift / isCortexXY / isWhatever methods.

Since the ARM backend seems to have quite a lot of calls to these methods, I
intend to submit 5-6 subtarget features at a time, instead of one big lump.

Differential Revision: http://reviews.llvm.org/D21685

llvm-svn: 273853
2016-06-27 09:08:23 +00:00
Pawel Bylica 4cc795501f CachePruning: correct comment about file order. NFC
Summary: Actually the list of cached files is sorted by file size, not by last accessed time. Also remove unused file access time param for a helper function.

Reviewers: joker-eph, chandlerc, davide

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D21639

llvm-svn: 273852
2016-06-27 08:46:23 +00:00
Pawel Bylica 6830401863 APInt: remove unsued param in private method. NFC
Reviewers: davide

Subscribers: davide, llvm-commits

Differential Revision: http://reviews.llvm.org/D21638

llvm-svn: 273851
2016-06-27 08:31:48 +00:00
Hrvoje Varga 24b975dc66 [mips][micromips] Implement LD, LLD, LWU, SD, DSRL, DSRL32 and DSRLV instructions
Differential Revision: http://reviews.llvm.org/D16625

llvm-svn: 273850
2016-06-27 08:23:28 +00:00
Simon Pilgrim a45da385f8 [X86][AVX] Peek through bitcasts to find the source of broadcasts
AVX1 can only broadcast vectors as floats/doubles, so for 256-bit vectors we insert bitcasts if we are shuffling v8i32/v4i64 types. Unfortunately the presence of these bitcasts prevents the current broadcast lowering code from peeking through cases where we have concatenated / extracted vectors to create the 256-bit vectors.

This patch allows us to peek through bitcasts as long as the number of elements doesn't change (i.e. element bitwidth is the same) so the broadcast index is not affected.

Note this bitcast peek is different from the stage later on which doesn't care about the type and is just trying to find a load node.

Differential Revision: http://reviews.llvm.org/D21660

llvm-svn: 273848
2016-06-27 07:44:32 +00:00
Igor Breger 7357849dca [ConstantFolding] Fix bitcast vector of i1.
Differential Revision: http://reviews.llvm.org/D21735

llvm-svn: 273845
2016-06-27 06:42:54 +00:00
Rafael Espindola 1ac1fa818e Mips: Fix access to private functions.
llvm-svn: 273843
2016-06-27 03:19:40 +00:00
Rafael Espindola 0a68bf9627 Use isPositionIndependent predicate. NFC.
llvm-svn: 273830
2016-06-26 22:38:44 +00:00
Rafael Espindola e715172791 Use isPositionIndependent. NFC.
llvm-svn: 273829
2016-06-26 22:32:53 +00:00
Rafael Espindola 12bb38d367 Use isPositionIndependent predicate.
llvm-svn: 273828
2016-06-26 22:30:06 +00:00
Rafael Espindola 405e25a970 Use isPositionIndependent predicate. NFC.
llvm-svn: 273827
2016-06-26 22:24:01 +00:00
Rafael Espindola ae0d866f56 Refactor a duplicated predicate. NFC.
llvm-svn: 273826
2016-06-26 22:13:55 +00:00
Benjamin Kramer aa2091505f Apply clang-tidy's modernize-loop-convert to lib/Analysis.
Only minor manual fixes. No functionality change intended.

llvm-svn: 273816
2016-06-26 17:27:42 +00:00
Nico Weber d8db1e172c Revert r273807 (and r273809, r273810), it caused PR28311
llvm-svn: 273815
2016-06-26 15:10:34 +00:00
Benjamin Kramer 7b4658ff87 Apply clang-tidy's modernize-loop-convert to lib/MC.
Only minor manual fixes. No functionality change intended.

llvm-svn: 273814
2016-06-26 14:49:00 +00:00
Benjamin Kramer af28e7d6fa Apply clang-tidy's modernize-loop-convert to most of lib/IR.
Only minor manual fixes. No functionality change intended.

llvm-svn: 273813
2016-06-26 14:10:56 +00:00
Benjamin Kramer 706e48839d [CodeExtractor] Merge DEBUG statements in an attempt to fix the msvc
build.

There's a known bug in msvc 2013 that fails to compile do-while loops
inside of ranged for loops.

llvm-svn: 273811
2016-06-26 13:39:33 +00:00
Amjad Aboud 9fc3d0dfdc Fixed build failure (due to unused variable error) in r273807.
llvm-svn: 273810
2016-06-26 13:36:23 +00:00
Amjad Aboud ac97be64f0 Fixed build failure (due to unused variable error) in r273807.
llvm-svn: 273809
2016-06-26 12:43:33 +00:00
Benjamin Kramer 135f735af1 Apply clang-tidy's modernize-loop-convert to most of lib/Transforms.
Only minor manual fixes. No functionality change intended.

llvm-svn: 273808
2016-06-26 12:28:59 +00:00
Amjad Aboud ff976c99c7 [codeview] Improved array type support.
Added support for:
1. Multi dimension array.
2. Array of structure type, which previously was declared incompletely.
3. Dynamic size array.

Differential Revision: http://reviews.llvm.org/D21526

llvm-svn: 273807
2016-06-26 11:44:45 +00:00
Sanjoy Das 9d08642c64 [RSForGC] Appease MSVC
llvm-svn: 273805
2016-06-26 05:42:52 +00:00
Craig Topper 8f577fd5b5 [X86] Rewrite lowerVectorShuffleWithPSHUFB to not require a ZeroableMask to be created. We can do everything with the starting mask and zeroable bit vector. This removes the last usage of isSingleInputShuffleMask. NFC
llvm-svn: 273804
2016-06-26 05:10:56 +00:00
Craig Topper 8bba749a48 [X86] Replace calls to isSingleInputShuffleMask with just checking if V2 is UNDEF. Canonicalization and creation of shuffle vector ensures this is equivalent.
llvm-svn: 273803
2016-06-26 05:10:53 +00:00
Craig Topper 9c809bee1c [SelectionDAG] Use DAG.getCommutedVectorShuffle instead of reimplementing it.
llvm-svn: 273802
2016-06-26 05:10:49 +00:00
Sanjoy Das a37bb4a65d [LoopUnswitch] Unswitch on conditions feeding into guards
Summary:
This is a straightforward extension of what LoopUnswitch does to
branches to guards.  That is, we unswitch

```
for (;;) {
  ...
  guard(loop_invariant_cond);
  ...
}
```

into

```
if (loop_invariant_cond) {
  for (;;) {
    ...
    // There is no need to emit guard(true)
    ...
  }
} else {
  for (;;) {
    ...
    guard(false);
    // SimplifyCFG will clean this up by adding an
    // unreachable after the guard(false)
    ...
  }
}
```

Reviewers: majnemer

Subscribers: mcrosier, llvm-commits, mzolotukhin

Differential Revision: http://reviews.llvm.org/D21725

llvm-svn: 273801
2016-06-26 05:10:45 +00:00
Sanjoy Das 7dda0edb5f [RSForGC] Bring the BDVState struct up to code; NFC
llvm-svn: 273800
2016-06-26 04:55:35 +00:00
Sanjoy Das 61c76e3b89 [RSForGC] Bring computeLiveInValues up to code; NFC
llvm-svn: 273799
2016-06-26 04:55:32 +00:00
Sanjoy Das 83186b067d [RSForGC] Bring computeLiveOutSeed up to code; NFC
llvm-svn: 273798
2016-06-26 04:55:30 +00:00
Sanjoy Das b2df57af65 [RSForGC] Bring computeLiveInValues up to code; NFC
llvm-svn: 273797
2016-06-26 04:55:26 +00:00
Sanjoy Das 255532f629 [RSForGC] Bring recomputeLiveInValues up to code; NFC
llvm-svn: 273796
2016-06-26 04:55:23 +00:00
Sanjoy Das 73c7f26035 [RSForGC] Bring containsGCPtrType, isGCPointerType up to code; NFC
llvm-svn: 273795
2016-06-26 04:55:19 +00:00
Sanjoy Das 1e7eeb4bf0 [RSForGC] Bring analyzeParsePointLiveness up to code; NFC
llvm-svn: 273794
2016-06-26 04:55:17 +00:00
Sanjoy Das 6cf88091b3 [RSForGC] Bring meetBDVStateImpl up to code; NFC
llvm-svn: 273793
2016-06-26 04:55:13 +00:00
Sanjoy Das bd43d0e2d0 [RSForGC] Get rid of the unnecessary MeetBDVStates struct; NFC
All of its implementation is in just one function.

llvm-svn: 273792
2016-06-26 04:55:10 +00:00
Sanjoy Das 90547f1d20 [RSForGC] Bring findBasePointer up to code; NFC
Name-casing and minor style changes to bring the function up to the LLVM
coding style.

llvm-svn: 273791
2016-06-26 04:55:05 +00:00
David Majnemer ad7b7e73a5 [Object, COFF] An import data directory might not consist soley of imports
The last import is the penultimate entry, the last entry is nulled out.
Data beyond the null entry should not be considered to hold import
entries.

This fixes PR28302.

N.B.  I am working on a reduced testcase, the one in PR28302 is too
large.

llvm-svn: 273790
2016-06-26 04:36:32 +00:00
Craig Topper 9a2e979b3d [X86] Convert ==/!= comparisons with -1 for checking undef in shuffle lowering to comparisons of <0 or >=0. While there do the same for other kinds of index checks that can just check for greater than 0. No functional change intended.
llvm-svn: 273788
2016-06-25 19:05:29 +00:00
Craig Topper 53a39d1a63 [X86] Pull similar bitcasts on different paths to earlier shared point. NFC
llvm-svn: 273787
2016-06-25 19:05:23 +00:00
Jan Vesely 3bc1af2be4 AMDGPU/R600: Fix GlobalValue regressions.
Don't cast GV expression to MCSymbolRefExpr. r272705 changed GV to binary
expressions by including offset even if the offset it 0
(we haven't hit this sooner since tested workloads don't include static offsets)
We don't really care about the type of expression, so set it directly.
Fixes: r272705

Consider section relative relocations. Since all const as data is in one boffer section relative is equivalent to abs32.
Fixes: r273166

Differential Revision: http://reviews.llvm.org/D21633

llvm-svn: 273785
2016-06-25 18:24:16 +00:00
David Majnemer 9f506259c8 Just a small cleanup
No functional change is intended

llvm-svn: 273780
2016-06-25 08:34:38 +00:00
David Majnemer e14e7bc4b8 Revert "[SimplifyCFG] Stop inserting calls to llvm.trap for UB"
This reverts commit r273778, it seems to break UBSan :/

llvm-svn: 273779
2016-06-25 08:19:55 +00:00
David Majnemer d346a37737 [SimplifyCFG] Stop inserting calls to llvm.trap for UB
SimplifyCFG had logic to insert calls to llvm.trap for two very
particular IR patterns: stores and invokes of undef/null.

While InstCombine canonicalizes certain undefined behavior IR patterns
to stores of undef, phase ordering means that this cannot be relied upon
in general.

There are much better tools than llvm.trap: UBSan and ASan.

N.B. I could be argued into reverting this change if a clear argument as
to why it is important that we synthesize llvm.trap for stores, I'd be
hard pressed to see why it'd be useful for invokes...

llvm-svn: 273778
2016-06-25 08:04:19 +00:00
David Majnemer bb53d23ef8 [InstSimplify] Replace calls to null with undef
Calling null is undefined behavior, we can simplify the resulting value
to undef.

llvm-svn: 273777
2016-06-25 07:37:30 +00:00
David Majnemer 1fea77c6fc [SimplifyCFG] Replace calls to null/undef with unreachable
Calling null is undefined behavior, a call to undef can be trivially
treated as a call to null.

llvm-svn: 273776
2016-06-25 07:37:27 +00:00
Konstantin Zhuravlyov f2f3d14774 [AMDGPU] Emit debugger prologue and emit the rest of the debugger fields in the kernel code header
Debugger prologue is emitted if -mattr=+amdgpu-debugger-emit-prologue.

Debugger prologue writes work group IDs and work item IDs to scratch memory at fixed location in the following format:
  - offset 0: work group ID x
  - offset 4: work group ID y
  - offset 8: work group ID z
  - offset 16: work item ID x
  - offset 20: work item ID y
  - offset 24: work item ID z

Set
  - amd_kernel_code_t::debug_wavefront_private_segment_offset_sgpr to scratch wave offset reg
  - amd_kernel_code_t::debug_private_segment_buffer_sgpr to scratch rsrc reg
  - amd_kernel_code_t::is_debug_supported to true if all debugger features are enabled

Differential Revision: http://reviews.llvm.org/D20335

llvm-svn: 273769
2016-06-25 03:11:28 +00:00
Matthias Braun cc676c47a3 MachineScheduler: Remember top/bottom choice in bidirectional scheduling
Remember the last choice for the top/bottom scheduling boundary in
bidirectional scheduling mode. The top choice should not change if we
schedule at the bottom and vice versa.

This allows us to improve compiletime: We only recalculate the best pick
for one border and re-use the cached top-pick from the other border.

Differential Revision: http://reviews.llvm.org/D19350

llvm-svn: 273766
2016-06-25 02:03:36 +00:00
Tom Stellard b164a9843b AMDGPU/SI: Make sure not to fold offsets into local address space globals
Summary:
Offset folding only works if you are emitting relocations, and we don't
emit relocations for local address space globals.

Reviewers: arsenm, nhaustov

Subscribers: arsenm, llvm-commits, kzhuravl

Differential Revision: http://reviews.llvm.org/D21647

llvm-svn: 273765
2016-06-25 01:59:16 +00:00
Sanjoy Das d850068282 [LoopUnswitch] Avoid exponential behavior
Summary: (No semantic change intended).

Reviewers: majnemer, bogner, mzolotukhin

Subscribers: mcrosier, llvm-commits, mzolotukhin

Differential Revision: http://reviews.llvm.org/D21707

llvm-svn: 273763
2016-06-25 01:14:19 +00:00
David Majnemer 0f45572761 The absence of noreturn doesn't ensure mayReturn
There are two separate issues:
- LLVM doesn't consider infinite loops to be side effects: we happily
  hoist/sink above/below loops whose bounds are unknown.
- The absence of the noreturn attribute is insufficient for us to know
  if a function will definitely return.  Relying on noreturn in the
  middle-end for any property is an accident waiting to happen.

llvm-svn: 273762
2016-06-25 00:55:12 +00:00
Michael Kuperstein f4c56e97df It isn't meaningful for a transform to preserve another transform. NFC.
llvm-svn: 273761
2016-06-25 00:47:21 +00:00
Peter Collingbourne 0312f614b1 IR: Introduce llvm.type.checked.load intrinsic.
This intrinsic safely loads a function pointer from a virtual table pointer
using type metadata. This intrinsic is used to implement control flow integrity
in conjunction with virtual call optimization. The virtual call optimization
pass will optimize away llvm.type.checked.load intrinsics associated with
devirtualized calls, thereby removing the type check in cases where it is
not needed to enforce the control flow integrity constraint.

This patch also introduces the capability to copy type metadata between
global variables, and teaches the virtual call optimization pass to do so.

Differential Revision: http://reviews.llvm.org/D21121

llvm-svn: 273756
2016-06-25 00:23:04 +00:00
Matthias Braun 6ad3d05b68 MachineScheduler: Fully compare top/bottom candidates
In bidirectional scheduling this gives more stable results than just
comparing the "reason" fields of the top/bottom node because the reason
field may be higher depending on what other nodes are in the queue.

Differential Revision: http://reviews.llvm.org/D19401

llvm-svn: 273755
2016-06-25 00:23:00 +00:00
David Majnemer b8da3a2bb2 Reinstate r273711
r273711 was reverted by r273743.  The inliner needs to know about any
call sites in the inlined function.  These were obscured if we replaced
a call to undef with an undef but kept the call around.

This fixes PR28298.

llvm-svn: 273753
2016-06-25 00:04:10 +00:00
David Majnemer 580e754348 Silence a -Wsign-compare warning
llvm-svn: 273752
2016-06-25 00:04:06 +00:00
Matthias Braun 1e374a7aa6 AMDGPU: Define a schedule class for COPY.
COPY was lacking a scheduling class, define it to avoid regressions in
the upcoming change to the bidirectional MachineScheduler. Approved by
tstellar on IRC.

Differential Revision: http://reviews.llvm.org/D21540

llvm-svn: 273751
2016-06-24 23:52:11 +00:00
Michael Kuperstein 83b753d430 [PM] Port float2int to the new pass manager
Differential Revision: http://reviews.llvm.org/D21704

llvm-svn: 273747
2016-06-24 23:32:02 +00:00
Dehao Chen c66a06ad0e Hookup ProfileSummary with SampleProfilerLoader
Summary: Set ProfileSummary in SampleProfilerLoader.

Reviewers: davidxl, eraman

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D21702

llvm-svn: 273745
2016-06-24 22:57:06 +00:00
Xinliang David Li 449cdfd00a [MBP] show function name in debug dump
llvm-svn: 273744
2016-06-24 22:54:21 +00:00
Nico Weber ae2ef4ccd4 Revert r273711, it caused PR28298.
llvm-svn: 273743
2016-06-24 22:52:39 +00:00
Kevin Enderby 082cc0e5dd Fix lib/ExecutionEngine/IntelJITEvents/IntelJITEventListener.cpp for r273701
and the change to libObject’s getSymbolAddress() to Expected<...> .

llvm-svn: 273740
2016-06-24 22:38:30 +00:00
Rafael Espindola a686f12705 Simplify. NFC.
Also delete out of date comment. This code was always returning .data
since r253436.

llvm-svn: 273739
2016-06-24 22:19:54 +00:00
Peter Collingbourne 995d6cc8f9 Fix unused variable warning in -asserts builds.
llvm-svn: 273737
2016-06-24 21:37:11 +00:00
Adrian Prantl 29ce701a06 Fix the type signature of DwarfExpression::Add.*Constant to support values >32 bits.
This fixes an embarrassing bug when emitting .debug_loc entries for 64-bit+ constants,
which were previously silently truncated to 32 bits.

<rdar://problem/26843232>

llvm-svn: 273736
2016-06-24 21:35:09 +00:00
Eli Friedman 5a52856cc8 Fix documentation for FindAvailableLoadedValue.
llvm-svn: 273734
2016-06-24 21:32:15 +00:00
Krzysztof Parzyszek 709a626015 [Hexagon] Simplify (+fix) instruction selection for indexed loads/stores
llvm-svn: 273733
2016-06-24 21:27:17 +00:00
Sanjoy Das 91e6ba6399 [IndVarSimplify] Run clang-format over some oddly formatted bits
NFC (whitespace only change)

llvm-svn: 273732
2016-06-24 21:23:32 +00:00
Peter Collingbourne 7efd750607 IR: New representation for CFI and virtual call optimization pass metadata.
The bitset metadata currently used in LLVM has a few problems:

1. It has the wrong name. The name "bitset" refers to an implementation
   detail of one use of the metadata (i.e. its original use case, CFI).
   This makes it harder to understand, as the name makes no sense in the
   context of virtual call optimization.

2. It is represented using a global named metadata node, rather than
   being directly associated with a global. This makes it harder to
   manipulate the metadata when rebuilding global variables, summarise it
   as part of ThinLTO and drop unused metadata when associated globals are
   dropped. For this reason, CFI does not currently work correctly when
   both CFI and vcall opt are enabled, as vcall opt needs to rebuild vtable
   globals, and fails to associate metadata with the rebuilt globals. As I
   understand it, the same problem could also affect ASan, which rebuilds
   globals with a red zone.

This patch solves both of those problems in the following way:

1. Rename the metadata to "type metadata". This new name reflects how
   the metadata is currently being used (i.e. to represent type information
   for CFI and vtable opt). The new name is reflected in the name for the
   associated intrinsic (llvm.type.test) and pass (LowerTypeTests).

2. Attach metadata directly to the globals that it pertains to, rather
   than using the "llvm.bitsets" global metadata node as we are doing now.
   This is done using the newly introduced capability to attach
   metadata to global variables (r271348 and r271358).

See also: http://lists.llvm.org/pipermail/llvm-dev/2016-June/100462.html

Differential Revision: http://reviews.llvm.org/D21053

llvm-svn: 273729
2016-06-24 21:21:32 +00:00
David Majnemer 0399226cf9 [APInt] Don't shift into the sign bit
llvm-svn: 273727
2016-06-24 21:15:36 +00:00
Rafael Espindola a895a0cd01 Add support for musl-libc on ARM Linux.
Patch by Lei Zhang!

llvm-svn: 273726
2016-06-24 21:14:33 +00:00
Michael Kuperstein 5134020ea6 Add missing dependency to LLVMPasses
Passes should depend on CodeGen, as that contains some IR-to-IR passes.

llvm-svn: 273724
2016-06-24 21:05:41 +00:00
George Burgess IV fd1f2f8561 [MemorySSA] Move code around a bit. NFC.
This patch moves MSSA's caching walker into MemorySSA, and moves the
actual definition of MSSA's caching walker out of MemorySSA.h. This is
done in preparation for the new walker, which should be out for review
soonish.

Also, this patch removes a field from UpwardsMemoryQuery and has a few
lines of diff from clang-format'ing MemorySSA.cpp.

llvm-svn: 273723
2016-06-24 21:02:12 +00:00
David Majnemer 5f1c01788e [APInt] Don't shift into the sign bit
This fixes PR28294.

llvm-svn: 273722
2016-06-24 20:51:47 +00:00
Chris Bieneman 93e7119380 [obj2yaml] [yaml2obj] Support for MachO Universal binaries
This patch adds round-trip support for MachO Universal binaries to obj2yaml and yaml2obj. Universal binaries have a header and list of architecture structures, followed by a the individual object files at specified offsets.

llvm-svn: 273719
2016-06-24 20:42:28 +00:00
Ahmed Bougacha 241e74cbc2 [ARM] Remove dead SDNodes. NFC.
The opcodes are used, but only by DAG->DAG.

llvm-svn: 273717
2016-06-24 20:38:00 +00:00
Ahmed Bougacha 0851ecd1b0 [X86] Remove dead ISD opcodes. NFC.
llvm-svn: 273716
2016-06-24 20:37:55 +00:00
Sanjay Patel 2cbe679774 [InstCombine] use m_APInt; NFCI
llvm-svn: 273715
2016-06-24 20:36:34 +00:00
Michael Kuperstein 82d5da5aac [PM] Port PreISelIntrinsicLowering to the new PM
llvm-svn: 273713
2016-06-24 20:13:42 +00:00
David Majnemer 3b3e954ea2 SimplifyInstruction does not imply DCE
We cannot remove an instruction with no uses just because
SimplifyInstruction succeeds.  It may have side effects.

llvm-svn: 273711
2016-06-24 19:34:46 +00:00
David Majnemer f15064871a [CodeView] Healthy paranoia around strings
Make sure strings don't get too big for a record, truncate them if
need-be.

llvm-svn: 273710
2016-06-24 19:34:41 +00:00
Evandro Menezes 3830479f41 [AArch64] Adjust the model for the vector by element FP multiplies on Exynos M1. (NFC)
llvm-svn: 273708
2016-06-24 18:58:54 +00:00
Peter Collingbourne af567592f8 Revert r273545, "[IfConversion] Bugfix: Don't use undef flag while adding use operands."
as it caused PR28295.

llvm-svn: 273707
2016-06-24 18:57:29 +00:00
Sanjay Patel 4e8ebce196 [InstCombine] refactor optional bitcasting in matchSelectFromAndOr() into one code path (NFCI)
Tests to verify that the commuted variants are all exercised were added with:
http://reviews.llvm.org/rL273702

llvm-svn: 273706
2016-06-24 18:55:27 +00:00
Rafael Espindola 88ae09e9be Use shouldAssumeDSOLocal in isOffsetFoldingLegal.
This makes it slightly more powerful for dynamic-no-pic.

llvm-svn: 273704
2016-06-24 18:48:36 +00:00
Reid Kleckner fbd5eef691 Revert "InstCombine rule to fold trunc when value available"
This reverts commit r273608.

Broke building code with sanitizers, where apparently these kinds of
loads, casts, and truncations are common:

http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux/builds/24502
http://crbug.com/623099

llvm-svn: 273703
2016-06-24 18:42:58 +00:00
Sanjay Patel f8b08f7179 [InstCombine] consolidate commutation variants of matchSelectFromAndOr() in one place; NFCI
By putting all the possible commutations together, we simplify the code.
Note that this is NFCI, but I'm adding tests that actually exercise each
commutation pattern because we don't have this anywhere else.

llvm-svn: 273702
2016-06-24 18:26:02 +00:00
Kevin Enderby 931cb65df2 Thread Expected<...> up from libObject’s getSymbolAddress() for symbols to allow
a good error message to be produced.

This is nearly the last libObject interface that used ErrorOr and the last one
that appears in llvm/include/llvm/Object/MachO.h .  For Mach-O objects this is
just a clean up because it’s version of getSymbolAddress() can’t return an
error.

I will leave it to the experts on COFF and ELF to actually add meaning full
error messages in their tests if they wish.  And also leave it to these experts
to change the last two ErrorOr interfaces in llvm/include/llvm/Object/ObjectFile.h
for createCOFFObjectFile() and createELFObjectFile() if they wish.

Since there are no test cases for COFF and ELF error cases with respect to
getSymbolAddress() in the test suite this is no functional change (NFC).

llvm-svn: 273701
2016-06-24 18:24:42 +00:00
Kyle Butt 267164df0a Codegen: Fix broken assumption in Tail Merge.
Tail merge was making the assumption that a layout successor or
predecessor was always a cfg successor/predecessor. Remove that
assumption. Changes to tests are necessary because the errant cfg edges
were preventing optimizations.

llvm-svn: 273700
2016-06-24 18:16:36 +00:00
Reid Kleckner 10dd55c548 [codeview] Emit parameter variables in the right order
Clang emits them in reverse order to conform to the ABI, which requires
left-to-right destruction. As a result, the order doesn't fall out
naturally, and we have to sort things out in the backend.

Fixes PR28213

llvm-svn: 273696
2016-06-24 17:55:40 +00:00
Peter Collingbourne 4f7c16dd53 Linker: Copy metadata when linking declarations.
Differential Revision: http://reviews.llvm.org/D21624

llvm-svn: 273692
2016-06-24 17:42:21 +00:00
Reid Kleckner 33848faa5e [codeview] Use one byte for S_FRAMECOOKIE CookieKind and add flags byte
We bailed out while printing codeview for an MSVC compiled
SemaExprCXX.cpp that used this record. The MS reference headers look
incorrect here, which is probably why we had this bug. They use a 32-bit
enum as the field type, but the actual record appears to use one byte
for the cookie kind followed by a flags byte.

llvm-svn: 273691
2016-06-24 17:23:49 +00:00
Chad Rosier e2185fda8f [MDT] Always verify machine dominfo if expensive checking is enabled.
llvm-svn: 273690
2016-06-24 17:15:04 +00:00
Reid Kleckner 9f7f3e1e64 [codeview] Emit base class information from DW_TAG_inheritance nodes
There are two remaining issues here:
1. No vbptr information
2. Need to mention indirect virtual bases

Getting indirect virtual bases is just a matter of adding an "indirect"
flag, emitting them in the frontend, and ignoring them when appropriate
for DWARF.

All virtual bases use the same artificial vbptr field, so I think the
vbptr offset will be best represented by an implicit __vbptr$ClassName
member similar to our existing __vptr$ member.

llvm-svn: 273688
2016-06-24 16:24:24 +00:00
Matthew Simpson e794678404 [LV] Preserve order of dependences in interleaved accesses analysis
The interleaved access analysis currently assumes that the inserted run-time
pointer aliasing checks ensure the absence of dependences that would prevent
its instruction reordering. However, this is not the case.

Issues can arise from how code generation is performed for interleaved groups.
For a load group, all loads in the group are essentially moved to the location
of the first load in program order, and for a store group, all stores in the
group are moved to the location of the last store. For groups having members
involved in a dependence relation with any other instruction in the loop, this
reordering can violate the dependence.

This patch teaches the interleaved access analysis how to avoid breaking such
dependences, and should fix PR27626.

An assumption of the original analysis was that the accesses had been collected
in "program order". The analysis was then simplified by visiting the accesses
bottom-up. However, this ordering was never guaranteed for anything other than
single basic block loops. Thus, this patch also enforces the desired ordering.

Reference: https://llvm.org/bugs/show_bug.cgi?id=27626
Differential Revision: http://reviews.llvm.org/D19984

llvm-svn: 273687
2016-06-24 15:33:25 +00:00
Artur Pilipenko 6c7a8abf5c Remangle intrinsics names when types are renamed
This is a resubmittion of previously reverted rL273568.

This is a fix for the problem mentioned in "LTO and intrinsics mangling" llvm-dev mail thread:
http://lists.llvm.org/pipermail/llvm-dev/2016-April/098387.html

Reviewers: mehdi_amini, reames

Differential Revision: http://reviews.llvm.org/D19373

llvm-svn: 273686
2016-06-24 15:10:29 +00:00
Artur Pilipenko b68b82117a NFC. Move verifyIntrinsicIsVarArg from verifier to Intrinsic::matchIntrinsicVarArg since it will be reused for intrinsic remangling code
llvm-svn: 273685
2016-06-24 14:47:27 +00:00
Saleem Abdulrasool e705074c39 ExecutionEngine: silence unused value warning
The Value is only used in debug or asserts builds.  Just cast to void to silence
an unused variable warning.

llvm-svn: 273684
2016-06-24 14:31:09 +00:00
Saleem Abdulrasool f6b5f0fffd ExecutionEngine: add preliminary support for COFF ARM
This adds rudimentary support for COFF ARM to the dynamic loader for the
exeuction engine.  This can be used by lldb to JIT code into a COFF ARM
environment.  This lays the foundation for the loader, though a few of the
relocation types are yet unhandled.

llvm-svn: 273682
2016-06-24 14:11:44 +00:00
Rafael Espindola cc371201c3 Make sure Format is always initialized.
Should fix the msan bots.

llvm-svn: 273679
2016-06-24 13:47:29 +00:00
Chad Rosier fd342808e0 [MachineDominatorTree] Add a MDT verifier.
Differential Revision: http://reviews.llvm.org/D21657

llvm-svn: 273678
2016-06-24 13:32:22 +00:00
Rafael Espindola f092cc8a14 Use existing predicate. NFC.
This doesn't handle ELF, but neither did the previous code.

llvm-svn: 273677
2016-06-24 13:28:26 +00:00
Rafael Espindola 01cdf31cab Merge two identical if branches. NFC.
llvm-svn: 273674
2016-06-24 13:08:06 +00:00
Rafael Espindola 41d308689c Merge two identical if branches. NFC.
llvm-svn: 273673
2016-06-24 13:05:20 +00:00
Rafael Espindola ce37f03273 clang-format a region. NFC.
llvm-svn: 273672
2016-06-24 12:58:25 +00:00
Anna Thomas 671513553c [LICM] Avoid repeating expensive call while promoting loads. NFC
Summary:
We can avoid repeating the check `isGuaranteedToExecute` when it's already called once while checking if the alignment can be widened for the load/store being hoisted.

The function is invariant for the same instruction `UI` in `isGuaranteedToExecute(*UI, DT, CurLoop, SafetyInfo);`

Reviewers: hfinkel, eli.friedman

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D21672

llvm-svn: 273671
2016-06-24 12:38:45 +00:00
Matt Arsenault 86de486d31 AMDGPU: Add stub custom CodeGenPrepare pass
This will do various things including ones
CodeGenPrepare does, but with knowledge of uniform
values.

llvm-svn: 273657
2016-06-24 07:07:55 +00:00
Matt Arsenault c581611e11 AMDGPU: Remove disable-irstructurizer subtarget feature
The only real reason to use it is for testing, so replace
it with a command line option instead of a potentially function
dependent feature.

llvm-svn: 273653
2016-06-24 06:30:22 +00:00
Matt Arsenault 43e92fe306 AMDGPU: Cleanup subtarget handling.
Split AMDGPUSubtarget into amdgcn/r600 specific subclasses.
This removes most of the static_casting of the basic codegen
classes everywhere, and tries to restrict the features
visible on the wrong target.

llvm-svn: 273652
2016-06-24 06:30:11 +00:00
David Majnemer d770877328 Switch more loops to be range-based
This makes the code a little more concise, no functional change is
intended.

llvm-svn: 273644
2016-06-24 04:05:21 +00:00
Craig Topper 024402dcdf [X86] Combine two nearby calls to isSingleInputShuffleVector. NFC
llvm-svn: 273643
2016-06-24 03:06:11 +00:00
Chuang-Yu Cheng 68f7f1cf00 Teaching SimplifyCFG to recognize the Or-Mask trick that InstCombine uses to
reduce the number of comparisons.

Specifically, InstCombine can turn:
  (i == 5334 || i == 5335)
into:
  ((i | 1) == 5335)

SimplifyCFG was already able to detect the pattern:
  (i == 5334 || i == 5335)
to:
  ((i & -2) == 5334)

This patch supersedes D21315 and resolves PR27555
(https://llvm.org/bugs/show_bug.cgi?id=27555).

Thanks to David and Chandler for the suggestions!

Author: Thomas Jablin (tjablin)
Reviewers: majnemer chandlerc halfdan cycheng

http://reviews.llvm.org/D21397

llvm-svn: 273639
2016-06-24 01:59:00 +00:00
Peter Collingbourne b19924a425 BitcodeWriter: Remove redundant (and incorrect) check for whether to emit module summary.
The function name Module::empty() is slightly misleading in that it
only tests for the presence of functions in the module. However we
still want to emit the module summary if the module contains only
global variables or aliases. The presence of such entities can be
determined simply by checking the summary directly, as we are doing
below.

Differential Revision: http://reviews.llvm.org/D21669

llvm-svn: 273638
2016-06-24 01:58:02 +00:00
George Burgess IV d9c39fcbca Attempt to fix MSVC breakage caused by r273636.
Apparently earlier versions of MSVC don't have constexpr bitset ctors.

llvm-svn: 273637
2016-06-24 01:41:29 +00:00
George Burgess IV a3d62be733 [CFLAA] Propagate StratifiedAttrs in interproc. analysis.
This patch also has a refactor that kills StratifiedAttr, and leaves us
with StratifiedAttrs, because having both was mildly redundant.

This patch makes us correctly handle stratified attributes when doing
interprocedural analysis. It also adds another attribute, AttrCaller,
which acts like AttrUnknown. We can filter out AttrCaller values when
during interprocedural analysis, since the caller should have
information about what arguments it's passing to its callee.

Patch by Jia Chen.

Differential Revision: http://reviews.llvm.org/D21645

llvm-svn: 273636
2016-06-24 01:00:03 +00:00
Ahmed Bougacha f0b46ee0aa [ARM] Use aapcs_vfp for ___truncdfhf2 on v7k.
r215348 overrode the f16 libcalls to be soft-float, but
v7k uses the default (hard-float) calling convention.

llvm-svn: 273631
2016-06-24 00:08:01 +00:00
Evandro Menezes 62c70101c3 [AArch64] Model the cost of vector by element FP multiplies on Exynos M1. (NFC)
llvm-svn: 273630
2016-06-23 23:43:23 +00:00
Tom Stellard 14416ae6cd Support/ELF: Add R_AMDGPU_GOTPCREL relocation
Summary:
We will start generating this in a future patch.

Reviewers: arsenm, kzhuravl, rafael, ruiu, tony-tye

Subscribers: arsenm, llvm-commits, kzhuravl

Differential Revision: http://reviews.llvm.org/D21482

llvm-svn: 273628
2016-06-23 23:11:29 +00:00
Chris Bieneman 606f178aeb [MachOYAML] Use a temporary to avoid gcc strict-aliasing warning
GCC complains about this with -Wstrict-aliasing. Using a temporary here should prevent the warning.

llvm-svn: 273627
2016-06-23 23:01:47 +00:00
Hans Wennborg 4b63a98de3 [codeview] Add classes and unions to the Local/Global UDTs lists
Differential Revision: http://reviews.llvm.org/D21655

llvm-svn: 273626
2016-06-23 22:57:25 +00:00
Chris Bieneman 10dcd3bd3b [yaml2macho] Removing asserts in favor of explicit yaml parse error
32-bit Mach headers don't have reserved fields. When generating the
mapping for 32-bit headers leaving off the reserved field will result in
parse errors if the field is present in the yaml.

Added a CHECK-NOT line to ensure that mach_header.yaml isn't adding a
reserved field, and a test to ensure that the parser error gets hit with
32-bit headers.

llvm-svn: 273623
2016-06-23 22:36:31 +00:00
Matthias Braun 4d624ae0cb MachineScheduler: Followup to debug message changes
Do not dump intermediate state of the pending queue anymore now that we
always dump the final state before picking.

llvm-svn: 273618
2016-06-23 21:43:28 +00:00
Kyle Butt 991df7889b Codegen: [X86] preservere memory refs for folded umul_lohi
Memory references were not being propagated for this folded load. This
prevented optimizations like LICM from hoisting the load.

Added test to verify that this allows LICM to proceed.

llvm-svn: 273617
2016-06-23 21:40:35 +00:00
Kyle Butt 178314ab52 Codegen: LICM Remove check for exactly 1 register def.
When considering whether to split an instruction with a memory operand
into an explicit load and a register-based instruction, we currently
check that the resulting instruction has exactly 1 def. This prevents 2
important LICM optimizations: compares with memory operands, and double
indirect calls. All the tests and the test-suite pass without the check.
My guess as to original intent is to limit the additional register pressure
created by the new instruction, but given that we only split out a single
register, it is already limited.

The licm-dominance test now checks actual memory loads for hoisting instead of
undef, and it tests compares.
hoist-invariant-load.ll now checks for 2 hoists, the intended hoist, and a bonus
from calling a got-relative function in a loop.

llvm-svn: 273616
2016-06-23 21:38:49 +00:00
Matthias Braun d29d31e30e MachineScheduler: Improve debug messages
Consistenly display available and pending queues immediately before the
scheduling choice is done.

llvm-svn: 273615
2016-06-23 21:27:38 +00:00
Rafael Espindola 2d3cce71ee Uses shouldAssumeDSOLocal.
With that SystemZ knows to avoid a GOT for PIE.

llvm-svn: 273614
2016-06-23 21:18:59 +00:00
George Burgess IV d14d05affe Attempt #2 to unbreak bots broken by r273596.
Some of the bots running GCC 4.7 seem to be having trouble with lambdas
that explicitly capture `this`. Relevant-looking bug:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53137

llvm-svn: 273613
2016-06-23 20:59:13 +00:00
Rafael Espindola 65787a9e01 Refactor to use shouldAssumeDSOLocal. NFC.
llvm-svn: 273612
2016-06-23 20:50:42 +00:00
Mike Aizatsky f0b3e85f4e [libfuzzer] moving is_ascii handler inside mutation dispatcher.
Summary: It also fixes a bug, when first random might not be ascii.

Differential Revision: http://reviews.llvm.org/D21573

llvm-svn: 273611
2016-06-23 20:44:48 +00:00
Anna Thomas 31a0b2088f InstCombine rule to fold trunc when value available
Summary:
This instcombine rule folds away trunc operations that have value available from a prior load or store.
This kind of code can be generated as a result of GVN widening the load or from source code as well.

Reviewers: reames, majnemer, sanjoy

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D21246

llvm-svn: 273608
2016-06-23 20:22:22 +00:00
Matt Arsenault 8d4b0eddd6 AMDGPU: Add option to disable spilling SGPRs to VGPRs.
This can help debug spilling problems.

llvm-svn: 273605
2016-06-23 20:00:34 +00:00
George Burgess IV fe1397b977 Attempt to fix breakage caused by r273596.
llvm-svn: 273601
2016-06-23 19:16:04 +00:00
George Burgess IV 1f99da54c2 [CFLAA] Use better interprocedural function summaries.
Previously, we just unified any arguments that seemed to be related to
each other. With this patch, we now respect dereference levels, etc.
which should make us substantially more accurate. Proper handling of
StratifiedAttrs will be done in a later patch.

Patch by Jia Chen.

Differential Revision: http://reviews.llvm.org/D21536

llvm-svn: 273596
2016-06-23 18:55:23 +00:00
Rafael Espindola 53fd425e06 Refactor duplicated code. NFC.
llvm-svn: 273595
2016-06-23 18:43:06 +00:00
Michael Kuperstein 0194d30e09 [X86] Extract HiPE prologue constants into metadata
X86FrameLowering::adjustForHiPEPrologue() contains a hard-coded offset
into an Erlang Runtime System-internal data structure (the PCB). As the
layout of this data structure is prone to change, this poses problems
for maintaining compatibility.

To address this problem, the compiler can produce this information as
module-level named metadata. For example (where P_NSP_LIMIT is the
offending offset):

!hipe.literals = !{ !2, !3, !4 }
!2 = !{ !"P_NSP_LIMIT", i32 152 }
!3 = !{ !"X86_LEAF_WORDS", i32 24 }
!4 = !{ !"AMD64_LEAF_WORDS", i32 24 }

Patch by Magnus Lang

Differential Revision: http://reviews.llvm.org/D20363

llvm-svn: 273593
2016-06-23 18:17:25 +00:00