Commit Graph

230669 Commits

Author SHA1 Message Date
Jonas Paulsson 8e5b0c65cc [foldMemoryOperand()] Pass LiveIntervals to enable liveness check.
SystemZ (and probably other targets as well) can fold a memory operand
by changing the opcode into a new instruction that as a side-effect
also clobbers the CC-reg.

In order to do this, liveness of that reg must first be checked. When
LIS is passed, getRegUnit() can be called on it and the right
LiveRange is computed on demand.

Reviewed by Matthias Braun.
http://reviews.llvm.org/D19861

llvm-svn: 269026
2016-05-10 08:09:37 +00:00
Pavel Labath ebc7135f8e Fix race in TestExitDuringStep and unify pseudo_barrier handling
Summary:
TestExitDuringStep was very rarely hanging on the buildbots. I can't be sure, but I believe this
was because of the fact that it declared its pseudo_barrier variable as "volatile int", which is
not sufficient to guarantee corectness (also, all other tests used atomic variables for this, and
they were passing reliably AFAIK). Besides switching to an atomic variable in this test as well,
I have also took this opportunity to unify all the copies of the pseudo_barrier code to a single
place to reduce the chance of this happening again.

Reviewers: clayborg

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D20065

llvm-svn: 269025
2016-05-10 07:54:25 +00:00
Haojian Wu bdb54eb457 Fixed cppcoreguidelines-pro-type-member-init when checking records with indirect fields
Summary:
Fixed a crash in cppcoreguidelines-pro-type-member-init when checking record types with indirect fields pre-C++11.
Fixed handling of indirect fields so they are properly checked and suggested fixes are proposed.

Patch by Michael Miller!

Reviewers: aaron.ballman, alexfh, hokein

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D19993

llvm-svn: 269024
2016-05-10 07:42:19 +00:00
Elena Demikhovsky c434d091c5 [LoopVectorize] Handling induction variable with non-constant step.
Allow vectorization when the step is a loop-invariant variable.
This is the loop example that is getting vectorized after the patch:

 int int_inc;
 int bar(int init, int *restrict A, int N) {

  int x = init;
  for (int i=0;i<N;i++){
    A[i] = x;
    x += int_inc;
  }
  return x;
 }

"x" is an induction variable with *loop-invariant* step.
But it is not a primary induction. Primary induction variable with non-constant step is not handled yet.

Differential Revision: http://reviews.llvm.org/D19258

llvm-svn: 269023
2016-05-10 07:33:35 +00:00
Michael Zuckerman 7360d8a9cc [Clang][AVX512] completing missing intrinsics [roundscale, ceil, floor]
Differential Revision: http://reviews.llvm.org/D20070

llvm-svn: 269022
2016-05-10 07:30:58 +00:00
Denis Zobnin 15d1e64b2b [LAA] Rename "isStridedPtr" with "getPtrStride". NFC.
Changing misleading function name was approved in http://reviews.llvm.org/D17268.
Patch by Roman Shirokiy.

llvm-svn: 269021
2016-05-10 05:55:16 +00:00
Matthias Braun 11e87cc945 liveness.mir requires asserts to use -debug-only
llvm-svn: 269020
2016-05-10 05:38:47 +00:00
Craig Topper 3e0c038a84 [X86][AVX512] Strengthen the assertions from r269001. We need VLX to use the 128/256-bit move opcodes for extended registers.
llvm-svn: 269019
2016-05-10 05:28:04 +00:00
Craig Topper 9f8e50cdb4 [X86] Add ZMM registers to the X86_INTR calling convention preserved mask when AVX512 is enabled.
llvm-svn: 269018
2016-05-10 05:28:02 +00:00
Craig Topper 3fef1de785 [X86] Update X86_INTR calling convention to save ZMM registers instead of YMM registers when AVX512 is enabled.
llvm-svn: 269017
2016-05-10 05:27:56 +00:00
Matthias Braun 8d6e57b216 LiveIntervalAnalysis: Rework constructMainRangeFromSubranges()
We now use LiveRangeCalc::extendToUses() instead of a specially designed
algorithm in constructMainRangeFromSubranges():
- The original motivation for constructMainRangeFromSubranges() were
  differences between the main liverange and subranges because of hidden
  dead definitions. This case however cannot happen anymore with the
  DetectDeadLaneMasks pass in place.
- It simplifies the code.
- This fixes a longstanding bug where we did not properly create new SSA
  values on merging control flow (the MachineVerifier missed most of
  these cases).
- Move constructMainRangeFromSubranges() to LiveIntervalAnalysis and
  LiveRangeCalc to better match the implementation/available helper
  functions.

llvm-svn: 269016
2016-05-10 04:51:14 +00:00
Matthias Braun 9c7e4dea1f LiveInterval: Avoid unnecessary auto, add const; NFC
llvm-svn: 269015
2016-05-10 04:51:09 +00:00
Matthias Braun 94d6b57130 llc: Print+Verify machine function after loading it
In -run-pass mode verify/print machine function immediately after
loading the .mir file if -verify-machineinstr/-print-machineinstrs
option is specified.

llvm-svn: 269014
2016-05-10 04:51:07 +00:00
Matthias Braun 0663b61e1a TargetPassConfig: Set PrintMachineCode even if addMachinePasses() does not run.
llvm-svn: 269013
2016-05-10 04:51:04 +00:00
Dan Gohman 0cfb5f852d [WebAssembly] Move register stackification and coloring to a late phase.
Move the register stackification and coloring passes to run very late, after
PEI, tail duplication, and most other passes. This means that all code emitted
and expanded by those passes is now exposed to these passes. This also
eliminates the need for prologue/epilogue code to be manually stackified,
which significantly simplifies the code.

This does require running LiveIntervals a second time. It's useful to think
of these late passes not as late optimization passes, but as a domain-specific
compression algorithm based on knowledge of liveness information. It's used to
compress the code after all conventional optimizations are complete, which is
why it uses LiveIntervals at a phase when actual optimization passes don't
typically need it.

Differential Revision: http://reviews.llvm.org/D20075

llvm-svn: 269012
2016-05-10 04:24:02 +00:00
Matthias Braun 31d19d43c7 CodeGen: Move TargetPassConfig from Passes.h to an own header; NFC
Many files include Passes.h but only a fraction needs to know about the
TargetPassConfig class. Move it into an own header. Also rename
Passes.cpp to TargetPassConfig.cpp while we are at it.

llvm-svn: 269011
2016-05-10 03:21:59 +00:00
Matthias Braun d06896138c PrologEpilogInserter: Remove unnecessary dependency
llvm-svn: 269010
2016-05-10 03:21:47 +00:00
Matthias Braun 7938eee5d4 Appease MSVC
Apply a similar fix to the one in r269006 to LiveIntervalTest.cpp.

llvm-svn: 269009
2016-05-10 03:03:55 +00:00
Sanjoy Das 12c91dc4c8 [ValueTracking] Use guards to prove non-nullness of a value
Reviewers: apilipenko, majnemer, reames

Subscribers: mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D20044

llvm-svn: 269008
2016-05-10 02:35:44 +00:00
Sanjoy Das d47f42435a [BasicAA] Guard intrinsics don't write to memory
Summary:
The idea is very close to what we do for assume intrinsics: we mark the
guard intrinsics as writing to arbitrary memory to maintain control
dependence, but under the covers we teach AA that they do not mod any
particular memory location.

Reviewers: chandlerc, hfinkel, gbiv, reames

Subscribers: george.burgess.iv, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D19575

llvm-svn: 269007
2016-05-10 02:35:41 +00:00
Matthias Braun a00b97f780 Try to appease clang-x64-ninja-win7 bot.
Looks like you need the complete definition of "X" when calling a "X
&func()" declared function even when not using the result further.

llvm-svn: 269006
2016-05-10 02:09:32 +00:00
George Burgess IV 3dc1669133 [Sema] Fix an overload resolution bug with enable_if.
Currently, if clang::isBetterOverloadCandidate encounters an enable_if
attribute on either candidate that it's inspecting, it will ignore all
lower priority attributes (e.g. pass_object_size). This is problematic
in cases like:

```
void foo(char *c) __attribute__((enable_if(1, "")));
void foo(char *c __attribute__((pass_object_size(0))))
    __attribute__((enable_if(1, "")));
```

...Because we would ignore the pass_object_size attribute in the second
`foo`, and consider any call to `foo` to be ambiguous.

This patch makes overload resolution consult further tiebreakers (e.g.
pass_object_size) if two candidates have equally good enable_if
attributes.

llvm-svn: 269005
2016-05-10 01:59:34 +00:00
Jim Ingham 958faec74f Add a testcase for "BreakpointSetBySourceRegex"
This tests both that we set the breakpoint on the right line, and that restricting by file
and/or the function, we get the right breakpoints.

llvm-svn: 269004
2016-05-10 01:52:44 +00:00
Matthias Braun fb94d8d56a llc: Rework -run-pass option
We now construct a custom pass pipeline instead of injecting
start-before/stop-after into the default pipeline construction. This
allows to specify any pass known to the pass registry. Previously
specifying indirectly added analysis passes or passes not added to the
pipeline add all would not be added and we would silently do nothing.

This also restricts the -run-pass option to cases with .mir input.

llvm-svn: 269003
2016-05-10 01:32:44 +00:00
Matthias Braun 47cf918e20 LLVMTargetMachine: Add functions to create MIModuleInfo/MIFunction; NFC
Add convenience function to create MachineModuleInfo and
MachineFunctionAnalysis passes and add them to a pass manager.

Despite factoring out some shared code in
LiveIntervalTest/LLVMTargetMachine this will be used by my upcoming llc
change.

llvm-svn: 269002
2016-05-10 01:32:40 +00:00
Quentin Colombet ee5f36bd54 [X86][AVX512] Use the proper load/store for AVX512 registers.
When loading or storing AVX512 registers we were not using the AVX512
variant of the load and store for VR128 and VR256 like registers.
Thus, we ended up with the wrong encoding and actually were dropping the
high bits of the instruction. The result was that we load or store the
wrong register. The effect is visible only when we emit the object file
directly and disassemble it. Then, the output of the disassembler does
not match the assembly input.

This is related to llvm.org/PR27481.

llvm-svn: 269001
2016-05-10 01:09:14 +00:00
Justin Lebar 3b30b7eef6 [CUDA] Fix flush-denormals.cu test so that it checks what it intends to CHECK.
FileCheck does not evaluate plain CHECKs if you pass -check-prefix; you
have to ask for it explicitly.

llvm-svn: 269000
2016-05-10 00:34:50 +00:00
Evgeniy Stepanov 6694ec7406 Don't inline functions with different SafeStack attributes.
llvm-svn: 268999
2016-05-10 00:33:07 +00:00
Sanjoy Das 0b6518d24e [SCEVExpander] Clang format expressions; NFC
The boolean expressions are somewhat hard to read otherwise.

llvm-svn: 268998
2016-05-10 00:32:31 +00:00
Sanjoy Das 2512d0c837 [SCEV] Use guards to prove predicates
We can use calls to @llvm.experimental.guard to prove predicates,
relying on the fact that in all locations domianted by a call to
@llvm.experimental.guard the predicate it is guarding is known to be
true.

llvm-svn: 268997
2016-05-10 00:31:49 +00:00
Justin Lebar ca3802bc01 [nvvm] Mark ldu and ldg intrinsics as IntrArgMemOnly.
Summary:
Previously these intrinsics were marked as can-read any memory address.
Now they're marked as reading only the pointer they're passed.

Reviewers: rnk

Subscribers: jholewinski, llvm-commits, tra

Differential Revision: http://reviews.llvm.org/D20080

llvm-svn: 268996
2016-05-10 00:31:25 +00:00
Justin Lebar 50deb6d028 Minor formatting fixes in LoopUnroll.cpp.
llvm-svn: 268995
2016-05-10 00:31:23 +00:00
Justin Lebar 87a174c9f9 [NVPTX] Change begin/end inline asm comments to "begin/end inline asm".
Previously it was just "// inline asm", which made it tricky to read
code with lots of inline assembly.

llvm-svn: 268994
2016-05-10 00:31:22 +00:00
Justin Lebar 043d05a862 [NVVM] Add comments to NVVM intrinsics listing.
llvm-svn: 268993
2016-05-10 00:31:20 +00:00
Xinliang David Li e9a8574da1 Reapply r268840: [profile] Simplify value profile writing
Revert r268864 that reverted 268840 after underlying problem
is fixed for arm bot.

llvm-svn: 268992
2016-05-10 00:17:31 +00:00
Derek Schuff 138943fe25 [WebAssembly] Disable 128-bit shift libcalls
Currently the signature of the functions
i128(i128, i32) aka void(i32, i64, i64, i32) doesn't match the signature
of the call emitted by the default lowering, void(i32, i64, i64).

llvm-svn: 268991
2016-05-10 00:14:07 +00:00
Justin Bogner ffb273d21a SDAG: Stop relying on Select's return value in SystemZ's splitLargeImmediate. NFC
The call to Select on Upper here happens in an unusual order in order
to defeat the constant folding that getNode() does. Add a comment
explaining why we can't just move the Select to later to avoid a
Handle, and wrap the call to SelectCode in a handle so we don't need
its return value.

This is part of the work to have Select return void instead of an
SDNode *, which is in turn part of llvm.org/pr26808.

llvm-svn: 268990
2016-05-09 23:54:23 +00:00
Eugene Zelenko 417d4c508b Fix some Clang-tidy modernize-deprecated-headers and Include What You Use warnings; other minor fixes.
Differential revision: http://reviews.llvm.org/D20042

llvm-svn: 268989
2016-05-09 23:11:38 +00:00
Richard Smith 57443fce3f When forming a fully-qualified type name, put any qualifiers outside/before the
nested-name-specifier. Patch by Sterling Augustine!

llvm-svn: 268988
2016-05-09 23:06:14 +00:00
Adam Nemet 0a77dfad95 [LV] Hint at the new loop distribution pragma in optimization remark
When we encounter unsafe memory dependencies, loop distribution could
help.

Even though, the diagnostics is in LAA, it's only currently emitted in
the vectorizer.

llvm-svn: 268987
2016-05-09 23:03:44 +00:00
Adam Nemet c6bbd80d59 [IndirectCallPromotion] Remove duplicate comment. NFC
llvm-svn: 268986
2016-05-09 23:03:06 +00:00
Adrian Prantl 134430dc52 Disable this unit test on MSVC, which crashes while compiling it.
llvm-svn: 268985
2016-05-09 22:59:55 +00:00
Rong Xu 2c9bdd0d3d Fix buildbot failure from r268968.
llvm-svn: 268984
2016-05-09 22:45:47 +00:00
Quentin Colombet 739614839f [X86] Fix the AllRegs AVX calling convention.
We used to list registers that were not in the AVX space. In other
words, we were pushing registers that the ISA cannot encode
(YMM16-YMM31).

This is part of llvm.org/PR27481.

llvm-svn: 268983
2016-05-09 22:37:05 +00:00
Artem Belevich 4d430badeb [CUDA] Restrict init of local __shared__ variables to empty constructors only.
Allow only empty constructors for local __shared__ variables in a way
identical to restrictions imposed on dynamic initializers for global
variables on device.

Differential Revision: http://reviews.llvm.org/D20039

llvm-svn: 268982
2016-05-09 22:09:56 +00:00
Marcin Koscielnicki a407f543c0 [MSan] Add a test for vararg with lots of non-vararg arguments.
This is a testcase for http://llvm.org/PR27646, hitting the bug on x86_64,
aarch64, mips.

Differential Revision: http://reviews.llvm.org/D19944

llvm-svn: 268981
2016-05-09 21:53:47 +00:00
Sanjay Patel 0f153424a9 [Inliner] don't assume that a Constant alloca size is a ConstantInt (PR27277)
Differential Revision: http://reviews.llvm.org/D20077

llvm-svn: 268980
2016-05-09 21:51:53 +00:00
Rong Xu c5508046b8 Fix buildbot failure from r268968.
llvm-svn: 268979
2016-05-09 21:51:50 +00:00
Xinliang David Li bde99c3b0f Remove XFAIL
llvm-svn: 268978
2016-05-09 21:47:29 +00:00
Chris Bieneman c49e5e336b [CMake] Support platform building builtins without a full toolchain
Summary:
This patch adds support for building lib/builtins without a fully functioning toolchain. It allows you to bootstrap a cross-compiler, which previously couldn't be done with CMake.

This patch contains the following specific changes:

* Split builtin-specific code out of config-ix.cmake into builtin-config-ix.cmake
* Split some common CMake functionality needed by both builtins and sanitizers into base-config-ix.cmake
* Made lib/builtins/CMakeLists.txt able to be a top-level CMake configuration

I have tested this on Darwin targeting embedded Darwin, and on FreeBSD x86_64 targeting FreeBSD AArch64.

This patch depends on http://reviews.llvm.org/D19692, and is the last part of http://reviews.llvm.org/D16653.

Reviewers: samsonov, iains, jroelofs

Subscribers: compnerd, aemerson, tberghammer, danalbert, srhines, emaste, llvm-commits

Differential Revision: http://reviews.llvm.org/D19742

llvm-svn: 268977
2016-05-09 21:45:52 +00:00