Commit Graph

241 Commits

Author SHA1 Message Date
Adhemerval Zanella f2aceda854 Initial TOC support for PowerPC64 object creation
This patch adds initial PPC64 TOC MC object creation using the small mcmodel
(a single 64K TOC) adding the some TOC relocations (R_PPC64_TOC,
R_PPC64_TOC16, and R_PPC64_TOC16DS).

The addition of 'undefinedExplicitRelSym' hook on 'MCELFObjectTargetWriter'
is meant to avoid the creation of an unreferenced ".TOC." symbol (used in
the .odp creation) as well to set the R_PPC64_TOC relocation target as the
temporary ".TOC." symbol. On PPC64 ABI, the R_PPC64_TOC relocation should
not point to any symbol.

llvm-svn: 166677
2012-10-25 12:27:42 +00:00
Micah Villmow 4bb926d91d Resubmit the changes to llvm core to update the functions to support different pointer sizes on a per address space basis.
llvm-svn: 165941
2012-10-15 16:24:29 +00:00
Adhemerval Zanella ef206f19a4 PowerPC: add EmitTCEntry class for TOC creation
This patch replaces the EmitRawText by a EmitTCEntry class (specialized for
each Streamer) in PowerPC64 TOC entry creation.

llvm-svn: 165940
2012-10-15 15:43:14 +00:00
Micah Villmow 0c61134d8d Revert 165732 for further review.
llvm-svn: 165747
2012-10-11 21:27:41 +00:00
Micah Villmow 083189730e Add in the first iteration of support for llvm/clang/lldb to allow variable per address space pointer sizes to be optimized correctly.
llvm-svn: 165726
2012-10-11 17:21:41 +00:00
Micah Villmow cdfe20b97f Move TargetData to DataLayout.
llvm-svn: 165402
2012-10-08 16:38:25 +00:00
Roman Divacky 0be33598ce Avoid symbol name clash when filling TOC.
Patch by Adhemerval Zanella.

llvm-svn: 164141
2012-09-18 17:10:37 +00:00
Roman Divacky d4f6f421a9 On PPC64 emit the environment pointer. Patch by Adhemerval Zanella.
llvm-svn: 164139
2012-09-18 16:55:29 +00:00
Roman Divacky 2be394bdcd Remove always true checks. Noticed by Adhemerval Zanella.
llvm-svn: 163117
2012-09-03 16:55:42 +00:00
Hal Finkel 1859d26528 Reserve space for the mandatory traceback fields on PPC64.
We need to reserve space for the mandatory traceback fields,
though leaving them as zero is appropriate for now.

Although the ABI calls for these fields to be filled in fully, no
compiler on Linux currently does this, and GDB does not read these
fields.  GDB uses the first word of zeroes during exception handling to
find the end of the function and the size field, allowing it to compute
the beginning of the function.  DWARF information is used for everything
else.  We need the extra 8 bytes of pad so the size field is found in
the right place.

As a comparison, GCC fills in a few of the fields -- language, number
of saved registers -- but ignores the rest.  IBM's proprietary OSes do
make use of the full traceback table facility.

Patch by Bill Schmidt.

llvm-svn: 162854
2012-08-29 20:22:24 +00:00
Roman Divacky 8c4b6a307e Emit word of zeroes after the last instruction as a start of the mandatory
traceback table on PowerPC64. This helps gdb handle exceptions. The other
mandatory fields are ignored by gdb and harder to implement so just add
there a FIXME.

Patch by Bill Schmidt. PR13641.

llvm-svn: 162778
2012-08-28 19:06:55 +00:00
Hal Finkel 742b535e40 Add PPC Freescale e500mc and e5500 subtargets.
Add subtargets for Freescale e500mc (32-bit) and e5500 (64-bit) to
the PowerPC backend.

Patch by Tobias von Koch.

llvm-svn: 162764
2012-08-28 16:12:39 +00:00
Roman Divacky ace4707ea6 Lower constant pools and jump tables via TOC on PPC64/SVR4.
In collaboration with Adhemerval Zanella.

llvm-svn: 162562
2012-08-24 16:26:02 +00:00
Bill Wendling e38859dc8e Move lib/Analysis/DebugInfo.cpp to lib/VMCore/DebugInfo.cpp and
include/llvm/Analysis/DebugInfo.h to include/llvm/DebugInfo.h.

The reasoning is because the DebugInfo module is simply an interface to the
debug info MDNodes and has nothing to do with analysis.

llvm-svn: 159312
2012-06-28 00:05:13 +00:00
Jack Carter 5e69cffed5 There are a number of generic inline asm operand modifiers that
up to r158925 were handled as processor specific. Making them 
generic and putting tests for these modifiers in the CodeGen/Generic
directory caused a number of targets to fail. 

This commit addresses that problem by having the targets call 
the generic routine for generic modifiers that they don't currently
have explicit code for.

For now only generic print operands 'c' and 'n' are supported.vi


Affected files:

    test/CodeGen/Generic/asm-large-immediate.ll
    lib/Target/PowerPC/PPCAsmPrinter.cpp
    lib/Target/NVPTX/NVPTXAsmPrinter.cpp
    lib/Target/ARM/ARMAsmPrinter.cpp
    lib/Target/XCore/XCoreAsmPrinter.cpp
    lib/Target/X86/X86AsmPrinter.cpp
    lib/Target/Hexagon/HexagonAsmPrinter.cpp
    lib/Target/CellSPU/SPUAsmPrinter.cpp
    lib/Target/Sparc/SparcAsmPrinter.cpp
    lib/Target/MBlaze/MBlazeAsmPrinter.cpp
    lib/Target/Mips/MipsAsmPrinter.cpp
    
MSP430 isn't represented because it did not even run with
the long existing 'c' modifier and it was not apparent what
needs to be done to get it inline asm ready.

Contributer: Jack Carter
llvm-svn: 159203
2012-06-26 13:49:27 +00:00
Hal Finkel bfd3d08d18 Rename the PPC target feature gpul to mfocrf.
The PPC target feature gpul (IsGigaProcessor) was only used for one thing:
To enable the generation of the MFOCRF instruction. Furthermore, this
instruction is available on other PPC cores outside of the G5 line. This
feature now corresponds to the HasMFOCRF flag.

No functionality change.

llvm-svn: 158323
2012-06-11 19:57:01 +00:00
Hal Finkel f2b9c38d6f Add POWER6 and POWER7 CPU types to the PPC backend.
No functional change; these will be used by upcoming scheduler enhancements.

llvm-svn: 158313
2012-06-11 15:43:08 +00:00
Hal Finkel 9f9f8929ee Add instruction itinerary for the PPC64 A2 core.
This adds a full itinerary for IBM's PPC64 A2 embedded core. These
cores form the basis for the CPUs in the new IBM BG/Q supercomputer.

llvm-svn: 153842
2012-04-01 19:22:40 +00:00
Craig Topper b25fda95f6 Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations.
llvm-svn: 152997
2012-03-17 18:46:09 +00:00
Roman Divacky 34d4b9682b Properly MCize the section switch, removing a FIXME.
llvm-svn: 151639
2012-02-28 18:15:25 +00:00
Roman Divacky 8fe40cd659 Reapply r151278 with fixes.
MCize function entry label emission on PowerPC64 properly.

llvm-svn: 151547
2012-02-27 20:20:47 +00:00
Hal Finkel 6fd2b434bd Revert r151278, breaks static linking.
Reverting this because it breaks static linking on ppc64. Specifically, it may be linkonce_odr functions that are the problem.
With this patch, if you link statically, calls to some functions end up calling their descriptor addresses instead
of calling to their entry points. This causes the execution to fail with SIGILL (b/c the descriptor address just
has some pointers, not code).

llvm-svn: 151433
2012-02-25 03:40:11 +00:00
Roman Divacky a2d3608f78 MCize function entry label emission on PowerPC64 properly.
llvm-svn: 151278
2012-02-23 20:28:39 +00:00
Hal Finkel ad4d9f5848 Allow the use of an alternate symbol for calculating a function's size.
The standard function epilog includes a .size directive, but ppc64 uses
an alternate local symbol to tag the actual start of each function.

Until recently, binutils accepted the .size directive as:
 .size	test1, .Ltmp0-test1
however, using this directive with recent binutils will result in the error:
 .size expression for XXX does not evaluate to a constant
so we must use the label which actually tags the start of the function.

llvm-svn: 151200
2012-02-22 21:11:47 +00:00
Jia Liu b22310fda6 Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.
llvm-svn: 150878
2012-02-18 12:03:15 +00:00
Hal Finkel ac9df3d411 make CR spill and restore 64-bit clean (no functional change), and fix some other problems found with -verify-machineinstrs
llvm-svn: 146024
2011-12-07 06:34:06 +00:00
Eli Friedman c1870b2633 Small fix for assembler generation on Darwin PPC64. Patch by Michael Kostylev. PR11437.
llvm-svn: 145553
2011-12-01 01:43:47 +00:00
Devang Patel 2f70bcdb94 Remove unnecessary include.
llvm-svn: 144211
2011-11-09 21:11:02 +00:00
Hal Finkel 6fa5697af0 Add PPC 440 scheduler and some associated tests
llvm-svn: 142170
2011-10-17 04:03:49 +00:00
Evan Cheng 2bb4035707 Move TargetRegistry and TargetSelect from Target to Support where they belong.
These are strictly utilities for registering targets and components.

llvm-svn: 138450
2011-08-24 18:08:43 +00:00
Evan Cheng 1142444565 Rename TargetAsmParser to MCTargetAsmParser and TargetAsmLexer to MCTargetAsmLexer; rename createAsmLexer to createMCAsmLexer and createAsmParser to createMCAsmParser.
llvm-svn: 136027
2011-07-26 00:24:13 +00:00
Evan Cheng 61faa55b74 Separate MCInstPrinter registration from AsmPrinter registration.
llvm-svn: 135974
2011-07-25 21:20:24 +00:00
Evan Cheng ab37af9af3 createMCInstPrinter doesn't need TargetMachine anymore.
llvm-svn: 134525
2011-07-06 19:45:42 +00:00
Roman Divacky 4b5665a1f7 Fix emission of PPC64 assembler on non-darwin platforms by splitting
VK_PPC_{HA,LO}16 into darwin and gas variants.

Darwin wants {ha,lo}16(symbol) while gnu as wants symbol@{ha,l}.

llvm-svn: 132802
2011-06-09 20:25:38 +00:00
Bill Wendling 00f0cddfd4 We need to pass the TargetMachine object to the InstPrinter if we are printing
the alias of an InstAlias instead of the thing being aliased. Because we need to
know the features that are valid for an InstAlias.

This is part of a work-in-progress.

llvm-svn: 127986
2011-03-21 04:13:46 +00:00
Chris Lattner aac9fa731d Wire up primitive support in the assembler backend for writing .o files
directly on the mac.  This is very early, doesn't support relocations and
has a terrible hack to avoid .machine from being printed, but despite
that it generates an bitwise-identical-to-cctools .o file for stuff like 
this:

  define i32 @test() nounwind { ret i32 42 }

I don't plan to continue pushing this forward, but if anyone else was
interested in doing it, it should be really straight-forward.

llvm-svn: 119136
2010-11-15 08:49:58 +00:00
Chris Lattner 15e9d5ef8a fix a regression with the new instprinter: we lost the ability to
print DBG_VALUE instructions.  This should unbreak the llvm-gcc-powerpc-darwin9
buildbot.

llvm-svn: 119132
2010-11-15 07:52:06 +00:00
Chris Lattner 8bcfdab194 strength reduce TOC temp label generation, no functionality change.
llvm-svn: 119112
2010-11-15 03:42:54 +00:00
Chris Lattner 510c66f549 rip out a ton of old instruction printing junk now that the
new instprinting logic is there.

llvm-svn: 119111
2010-11-15 03:39:06 +00:00
Chris Lattner d7c2fc7a73 Turn on the new instprinter by default.
The only change in the output is:

1) we get a better comment on mfcr, we get:
	mfcr r2                         ; cr2
  instead of:
 	mfcr r2 ; 32

2) we no longer emit $stub's on powerpc/leopard.  The Leopard
   linker autosynthesizes them.

llvm-svn: 119108
2010-11-15 03:27:05 +00:00
Chris Lattner e75bb34963 remove some extraneous quotes to make the new instprinter match.
llvm-svn: 119104
2010-11-15 02:43:46 +00:00
Chris Lattner b7c67f6c17 with the picbase nonsense starting to be figured out, implement
lowering support for MovePCtoLR[8].  Down to 4 failures again.

llvm-svn: 119090
2010-11-14 22:56:43 +00:00
Chris Lattner 7077efe894 move the pic base symbol stuff up to MachineFunction
since it is trivial and will be shared between ppc and x86.
This substantially simplifies the X86 backend also.

llvm-svn: 119089
2010-11-14 22:48:15 +00:00
Chris Lattner 94f0c14cb0 reimplement ppc asmprinter "toc" handling to use a VariantKind
on the operand, required for .o file writing and fixing 
the PowerPC/mult-alt-generic-powerpc64.ll failure with the new
instprinter.

llvm-svn: 119087
2010-11-14 22:22:59 +00:00
Chris Lattner 2f9f63af0b lower PPC::MFCRpseud when transforming to MC, avoiding calling
the aborting printSpecial() method.  This gets us to 8 failures.

llvm-svn: 119084
2010-11-14 22:03:15 +00:00
Chris Lattner e2d75bf681 properly wire up the instprinter to the ppc64 backend, down to 5 failures.
llvm-svn: 119081
2010-11-14 21:42:53 +00:00
Chris Lattner 5c1b0cdec2 switch PPC to a simplified MCInstLowering model.
llvm-svn: 119074
2010-11-14 21:12:33 +00:00
Chris Lattner 7a5c57ecf4 Implement support for printing register and immediate operands,
add support for darwin vs aix syntax.  We now can print instructions
like this:

	add r3, r3, r4
	blr 

and (in aix mode):
	add 3, 3, 4
	blr 

llvm-svn: 119062
2010-11-14 20:02:39 +00:00
Chris Lattner 686a095d89 stub out PPCMCInstLowering, add a new option that uses it and the new
instprinter when -enable-ppc-inst-printer is passed to llc.

llvm-svn: 119061
2010-11-14 19:53:02 +00:00
Chris Lattner a76eab433a stub out a powerpc MCInstPrinter implementation.
llvm-svn: 119059
2010-11-14 19:40:38 +00:00