f67bf3e0ea
Remove RegisterClassInfo::isReserved() and isAllocatable().
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Clients can use the equivalent functions in MRI.
llvm-svn: 165990
2012-10-15 22:41:03 +00:00
05ff4667eb
Move RegisterClassInfo.h.
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Allow targets to access this API. It's required for RegisterPressure.
llvm-svn: 158102
2012-06-06 20:29:31 +00:00
54038d796c
Switch all register list clients to the new MC*Iterator interface.
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No functional change intended.
Sorry for the churn. The iterator classes are supposed to help avoid
giant commits like this one in the future. The TableGen-produced
register lists are getting quite large, and it may be necessary to
change the table representation.
This makes it possible to do so without changing all clients (again).
llvm-svn: 157854
2012-06-01 23:28:30 +00:00
3c52f0281f
Add an MF argument to TRI::getPointerRegClass() and TII::getRegClass().
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The getPointerRegClass() hook can return register classes that depend on
the calling convention of the current function (ptr_rc_tailcall).
So far, we have been able to infer the calling convention from the
subtarget alone, but as we add support for multiple calling conventions
per target, that no longer works.
Patch by Yiannis Tsiouris!
llvm-svn: 156328
2012-05-07 22:10:26 +00:00
4b02a29eba
Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce static data size.
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llvm-svn: 152016
2012-03-05 05:37:41 +00:00
1d32658877
Use uint16_t to store register overlaps to reduce static data.
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llvm-svn: 152001
2012-03-04 10:43:23 +00:00
420525ce3b
Use uint16_t to store registers in callee saved register tables to reduce size of static data.
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llvm-svn: 151996
2012-03-04 03:33:22 +00:00
8606e3c7e3
AggressiveAntiDepBreaker needs to skip debug values because a debug value does not have a corresponding SUnit
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llvm-svn: 148260
2012-01-16 22:53:41 +00:00
00b1a3cd7e
Added a late machine instruction copy propagation pass. This catches
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opportunities that only present themselves after late optimizations
such as tail duplication .e.g.
## BB#1:
movl %eax, %ecx
movl %ecx, %eax
ret
The register allocator also leaves some of them around (due to false
dep between copies from phi-elimination, etc.)
This required some changes in codegen passes. Post-ra scheduler and the
pseudo-instruction expansion passes have been moved after branch folding
and tail merging. They were before branch folding before because it did
not always update block livein's. That's fixed now. The pass change makes
independently since we want to properly schedule instructions after
branch folding / tail duplication.
rdar://10428165
rdar://10640363
llvm-svn: 147716
2012-01-07 03:02:36 +00:00
7f8e563a69
Add bundle aware API for querying instruction properties and switch the code
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generator to it. For non-bundle instructions, these behave exactly the same
as the MC layer API.
For properties like mayLoad / mayStore, look into the bundle and if any of the
bundled instructions has the property it would return true.
For properties like isPredicable, only return true if *all* of the bundled
instructions have the property.
For properties like canFoldAsLoad, isCompare, conservatively return false for
bundles.
llvm-svn: 146026
2011-12-07 07:15:52 +00:00
0d639a28aa
Rename TargetSubtarget to TargetSubtargetInfo for consistency.
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llvm-svn: 134259
2011-07-01 21:01:15 +00:00
8d71a75777
More refactoring. Move getRegClass from TargetOperandInfo to TargetInstrInfo.
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llvm-svn: 133944
2011-06-27 21:26:13 +00:00
4f5f84c7e7
Teach antidependency breakers to use RegisterClassInfo.
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No functional change was intended.
llvm-svn: 133202
2011-06-16 21:56:21 +00:00
f02a376fbc
Update DBG_VALUEs while breaking anti dependencies.
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llvm-svn: 132487
2011-06-02 21:26:52 +00:00
0ab5e2cded
Fix a ton of comment typos found by codespell. Patch by
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Luis Felipe Strano Moraes!
llvm-svn: 129558
2011-04-15 05:18:47 +00:00
be1c8d3a82
Simplify AggressiveAntiDepBreaker's use of register aliases.
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llvm-svn: 121805
2010-12-14 23:23:15 +00:00
944aece38a
Anti-dependency breaking needs to be careful not to use reserved regs
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llvm-svn: 112832
2010-09-02 17:12:55 +00:00
51a9c0a1b3
Use std::vector instead of TargetRegisterInfo::FirstVirtualRegister. This time
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make sure to allocate enough space in the std::vector.
llvm-svn: 108449
2010-07-15 19:58:14 +00:00
5a8d15c553
Reserve a goodly amount of room for the vectors.
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llvm-svn: 108448
2010-07-15 19:41:20 +00:00
030b0286ec
Use std::vector instead of TargetRegisterInfo::FirstVirtualRegister.
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llvm-svn: 108440
2010-07-15 18:43:09 +00:00
c48adb60ca
revert bill's patches in an attempt to fix the buildbot.
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llvm-svn: 108419
2010-07-15 06:51:46 +00:00
1f7071a3e4
Fix headers.
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llvm-svn: 108413
2010-07-15 06:05:18 +00:00
e7e6ca5c57
Use std::vector instead of a hard-coded array. The length of that array could
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get *very* large, but we only need it to be the size of the number of pregs.
llvm-svn: 108412
2010-07-15 06:04:38 +00:00
871c724773
Convert the last use of getPhysicalRegisterRegClass and remove it.
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AggressiveAntiDepBreaker should not be using getPhysicalRegisterRegClass. An
instruction might be using a register that can only be replaced with one from
a subclass of getPhysicalRegisterRegClass.
With this patch we use getMinimalPhysRegClass. This is correct, but
conservative. We should check the uses of the register and select the
largest register class that can be used in all of them.
llvm-svn: 108122
2010-07-12 02:55:34 +00:00
f128bdcb55
Make post-ra scheduling, anti-dep breaking, and register scavenger (conservatively) aware of predicated instructions. This enables ARM to move if-conversion before post-ra scheduler.
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llvm-svn: 106091
2010-06-16 07:35:02 +00:00
848548300d
Not all entries in the range will have an SUnit. Check for that when looking
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for debug information.
llvm-svn: 105324
2010-06-02 15:29:36 +00:00
12ac8f0352
Update debug information when breaking anti-dependencies. rdar://7759363
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llvm-svn: 105300
2010-06-01 23:48:44 +00:00
35bc4d46cb
Make BreakAntiDependencies' SUnits argument const, and make the Begin
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and End arguments by-value rather than by-reference.
llvm-svn: 101830
2010-04-19 23:11:58 +00:00
67dd3a4464
Tidy whitespace.
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llvm-svn: 100904
2010-04-09 21:38:26 +00:00
b06015aa69
move target-independent opcodes out of TargetInstrInfo
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into TargetOpcodes.h. #include the new TargetOpcodes.h
into MachineInstr. Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the
codebase.
llvm-svn: 95687
2010-02-09 19:54:29 +00:00
eb431da074
80 column and whitespace cleanup
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llvm-svn: 92837
2010-01-06 16:48:02 +00:00
75a2efb06d
Change errs() to dbgs().
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llvm-svn: 92093
2009-12-24 00:14:25 +00:00
a45fe67667
<rdar://problem/7453528>. Track only physical registers that are valid for the target.
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llvm-svn: 90970
2009-12-09 17:18:22 +00:00
3f3a8b1c7e
<rdar://problem/6721894>. Allow multiple registers to be renamed together (super and sub) if necessary to break an anti-dependence.
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llvm-svn: 89722
2009-11-24 00:59:08 +00:00
5305dc0be1
Restructure code to allow renaming of multiple-register groups for anti-dep breaking.
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llvm-svn: 89511
2009-11-20 23:33:54 +00:00
80a03cc0b1
Remove some old experimental code that is no longer needed. Remove additional, speculative scheduling pass as its cost did not translate into significant performance improvement. Minor tweaks.
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llvm-svn: 89471
2009-11-20 19:32:48 +00:00
dd1c6198d4
Fix a couple of problems with maintaining liveness information for antidep breaking.
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llvm-svn: 89404
2009-11-19 23:12:37 +00:00
b9fe5d5d02
Allow target to specify regclass for which antideps will only be broken along the critical path.
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llvm-svn: 88682
2009-11-13 19:52:48 +00:00
da83f7d58b
Rename registers to break output dependencies in addition to anti-dependencies.
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llvm-svn: 87015
2009-11-12 19:08:21 +00:00
cf89db135e
Allow targets to specify register classes whose member registers should not be renamed to break anti-dependencies.
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llvm-svn: 86628
2009-11-10 00:15:47 +00:00
bed7cb6c1d
Fix bug in aggressive antidep breaking; liveness was not updated correctly for regions that do not have antidep candidates.
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llvm-svn: 86172
2009-11-05 21:06:09 +00:00
542649463b
Replace std::map.at() with std::map[].
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llvm-svn: 86102
2009-11-05 01:45:50 +00:00
7d8878add2
Break anti-dependencies using free registers in a round-robin manner to avoid introducing new anti-dependencies.
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llvm-svn: 86098
2009-11-05 01:19:35 +00:00
8501dbbe10
Do a scheduling pass ignoring anti-dependencies to identify candidate registers that should be renamed.
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llvm-svn: 85939
2009-11-03 20:57:50 +00:00
faa7660fd0
Between scheduling regions, correctly maintain anti-dep breaking state so that we don't incorrectly rename registers that span these regions.
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llvm-svn: 85537
2009-10-29 23:30:59 +00:00
9f1b2d4619
Fix a couple of bugs in aggressive anti-dep breaking.
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llvm-svn: 85522
2009-10-29 19:17:04 +00:00
e056d1077e
Allow the aggressive anti-dep breaker to process the same region multiple times. This is necessary because new anti-dependencies are exposed when "current" ones are broken.
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llvm-svn: 85166
2009-10-26 22:31:16 +00:00
de11f36ab7
Add aggressive anti-dependence breaker. Currently it is not the default for any target. Enable with -break-anti-dependencies=all.
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llvm-svn: 85145
2009-10-26 19:32:42 +00:00
Jakob Stoklund Olesen