ff62c62b7c
Constify arguments in isSuccessor and isLayoutSuccessor.
...
llvm-svn: 68054
2009-03-30 20:06:29 +00:00
57178e8822
Fix comment to match function name.
...
llvm-svn: 68050
2009-03-30 18:49:37 +00:00
7a78f3abd3
getEntryFor() may invalidate DenseMap iterator.
...
Walking an invalidated iterator is not a good idea.
llvm-svn: 68047
2009-03-30 18:34:47 +00:00
56709fdffe
Fix thinko: put stuff with both global and local relocations into data.rel{.ro}, not .local
...
llvm-svn: 68036
2009-03-30 17:37:43 +00:00
255a3cbfb4
Fix infinite looping
...
llvm-svn: 68034
2009-03-30 15:28:21 +00:00
d5e8e93a92
Properly propagate Kind.
...
llvm-svn: 68033
2009-03-30 15:28:00 +00:00
7c5f3c40ca
Do not propagate ELF-specific stuff (data.rel) into other targets. This simplifies code and also ensures correctness.
...
llvm-svn: 68032
2009-03-30 15:27:43 +00:00
c247fd396c
Add data.rel stuff
...
llvm-svn: 68031
2009-03-30 15:27:03 +00:00
bea241a5f5
IA64 is as weird as Alpha wrt r/o relocs :)
...
llvm-svn: 68007
2009-03-29 17:14:35 +00:00
014a86f216
Alpha always requires global relocations to be r/w regardless of PIC.
...
llvm-svn: 68006
2009-03-29 17:14:14 +00:00
088ebede53
Honour relocation behaviour stuff for ro objects
...
llvm-svn: 68005
2009-03-29 17:13:49 +00:00
7437b59caf
Extend the relocation tracker handler, so we can filter on different 'kinds' of relocations required.
...
llvm-svn: 68004
2009-03-29 17:13:18 +00:00
d21581eaa1
Fix PR3899: add support for extracting floats from vectors
...
when using -soft-float.
Based on a patch by Jakob Stoklund Olesen.
llvm-svn: 67996
2009-03-29 13:51:06 +00:00
8eda11bd9d
now that you can put a PointerIntPair in a SmallPtrSet, remove some
...
hackish workarounds from memdep
llvm-svn: 67971
2009-03-29 00:24:04 +00:00
356d974a93
add a note
...
llvm-svn: 67953
2009-03-28 19:26:55 +00:00
1f11c3c36f
Use array_lengthof
...
llvm-svn: 67950
2009-03-28 19:02:18 +00:00
6ff3dabbb4
Have only one definition of X86AddrNumOperands.
...
llvm-svn: 67949
2009-03-28 18:55:31 +00:00
c2a17d3022
Make code a bit less brittle by no hardcoding the number
...
of operands in an address in so many places.
llvm-svn: 67945
2009-03-28 17:03:24 +00:00
e622cbf385
Make check in CheckTailCallReturnConstraints for ignorable instructions between
...
a CALL and a RET node more generic. Add a test for tail calls with a void
return.
llvm-svn: 67943
2009-03-28 12:36:29 +00:00
83d5420d02
Enable tail call optimization for functions that return a struct (bug 3664) and for functions that return types that need extending (e.g i1).
...
llvm-svn: 67934
2009-03-28 08:33:27 +00:00
fd81c73cde
Optimize some 64-bit multiplication by constants into two lea's or one lea + shl since imulq is slow (latency 5). e.g.
...
x * 40
=>
shlq $3, %rdi
leaq (%rdi,%rdi,4), %rax
This has the added benefit of allowing more multiply to be folded into addressing mode. e.g.
a * 24 + b
=>
leaq (%rdi,%rdi,2), %rax
leaq (%rsi,%rax,8), %rax
llvm-svn: 67917
2009-03-28 05:57:29 +00:00
7516668998
move a large method out of line.
...
llvm-svn: 67892
2009-03-28 02:08:47 +00:00
2785e4be37
Fix what surely must be a copy+pasto.
...
llvm-svn: 67881
2009-03-27 23:55:04 +00:00
6d75876473
Initialize LiveOutInfo's APInt members to zero, as APInt's
...
default constructor produces an uninitialized APInt.
This fixes PR3896.
llvm-svn: 67879
2009-03-27 23:51:02 +00:00
669f1d0b0b
remove trailing whitespace
...
llvm-svn: 67874
2009-03-27 23:06:27 +00:00
41c8515b1b
"ghostify" the ilist<Function> sentinel
...
llvm-svn: 67872
2009-03-27 22:28:33 +00:00
705f2a6cd2
Avoid hardcoding that X86 addresses have 4 operands.
...
llvm-svn: 67848
2009-03-27 15:57:50 +00:00
227815437a
Use less hard coded constants to make the code less brittle.
...
llvm-svn: 67846
2009-03-27 15:45:05 +00:00
e728019392
I am trying to add a segment to the X86 addresses matching to
...
improve TLS support (see http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20090309/075220.html ), but that code is VERY brittle.
This patch just makes it a bit more resistant.
llvm-svn: 67843
2009-03-27 15:26:30 +00:00
3241b74f69
Revert r67798: it breaks llvm-gcc bootstrap on x86-64-linux, presumably due to
...
a miscompilation.
make[4]: Entering directory `gcc-4.2.llvm-objects/x86_64-unknown-linux-gnu/libstdc++-v3/include'
if [ ! -d "./x86_64-unknown-linux-gnu/bits/stdtr1c++.h.gch" ]; then \
mkdir -p ./x86_64-unknown-linux-gnu/bits/stdtr1c++.h.gch; \
fi; \
gcc-4.2.llvm-objects/./gcc/xgcc -shared-libgcc -Bgcc-4.2.llvm-objects/./gcc -nostdinc++
-Lgcc-4.2.llvm-objects/x86_64-unknown-linux-gnu/libstdc++-v3/src -Lgcc-4.2.llvm-objects/x86_64-unknown-linux-gnu/libstdc++-v3/src/.libs
-B/usr/local/gnat-llvm/x86_64-unknown-linux-gnu/bin/ -B/usr/local/gnat-llvm/x86_64-unknown-linux-gnu/lib/ -isystem
/usr/local/gnat-llvm/x86_64-unknown-linux-gnu/include -isystem /usr/local/gnat-llvm/x86_64-unknown-linux-gnu/sys-include -Winvalid-pch -Wno-deprecated -x
c++-header -g -O2 -D_GNU_SOURCE -Igcc-4.2.llvm-objects/x86_64-unknown-linux-gnu/libstdc++-v3/include/x86_64-unknown-linux-gnu
-Igcc-4.2.llvm-objects/x86_64-unknown-linux-gnu/libstdc++-v3/include -Igcc-4.2.llvm/libstdc++-v3/libsupc++ -O2 -g
gcc-4.2.llvm/libstdc++-v3/include/precompiled/stdtr1c++.h -o x86_64-unknown-linux-gnu/bits/stdtr1c++.h.gch/O2g.gch
In file included from gcc-4.2.llvm-objects/x86_64-unknown-linux-gnu/libstdc++-v3/include/tr1/repeat.h:247,
from gcc-4.2.llvm-objects/x86_64-unknown-linux-gnu/libstdc++-v3/include/tr1/functional:1098,
from gcc-4.2.llvm/libstdc++-v3/include/precompiled/stdtr1c++.h:53:
gcc-4.2.llvm-objects/x86_64-unknown-linux-gnu/libstdc++-v3/include/tr1/functional_iterate.h:417: internal compiler error: in ggc_recalculate_in_use_p, at
ggc-page.c:1602
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://llvm.org/bugs/ > for instructions.
make[4]: *** [x86_64-unknown-linux-gnu/bits/stdtr1c++.h.gch/O2g.gch] Error 1
llvm-svn: 67839
2009-03-27 14:56:47 +00:00
f4be420def
-write-graph now can be used with -o.
...
Makes it possible to set the output file name.
llvm-svn: 67835
2009-03-27 12:57:14 +00:00
a1be2dcd63
Shrink wrapping in PEI: initial release. Finishing development, enable with --shrink-wrap.
...
llvm-svn: 67828
2009-03-27 06:09:40 +00:00
4026b041ce
One more place to skip debug info.
...
llvm-svn: 67811
2009-03-27 01:13:37 +00:00
fe7c0492a0
While hoisting an instruction, update alias info set tracker.
...
llvm-svn: 67798
2009-03-26 23:48:52 +00:00
d88ebc352c
-no-implicit-float means explicit fp operations are legal.
...
llvm-svn: 67784
2009-03-26 23:06:32 +00:00
87aa96ddf3
Fix misc. small issues with debug visualization.
...
Detailed bug report:
http://llvm.org/bugs/show_bug.cgi?id=3873
llvm-svn: 67768
2009-03-26 21:23:48 +00:00
904f14663d
tADDhirr is a thumb instruction. Do not allow this code to be reached in non-thumb mode.
...
llvm-svn: 67765
2009-03-26 19:09:01 +00:00
76a561f35e
Don't assign a new stack slot if the pre-alloc splitter already assigned one.
...
llvm-svn: 67764
2009-03-26 18:53:38 +00:00
aa28be652c
Pull transform from target-dependent code into target-independent code.
...
llvm-svn: 67742
2009-03-26 06:14:09 +00:00
78b7cbe668
fix warning in -asserts mode.
...
llvm-svn: 67739
2009-03-26 05:29:34 +00:00
f38fd11a26
fix some warnings in release-asserts mode.
...
llvm-svn: 67738
2009-03-26 05:28:26 +00:00
3c04970f31
fix an apparently real bug exposed by a warning in -asserts mode.
...
llvm-svn: 67737
2009-03-26 05:28:14 +00:00
3871781c7b
fix warning in -asserts build.
...
llvm-svn: 67736
2009-03-26 05:25:59 +00:00
94f299f2c5
Match this pattern so that we can generate simpler code:
...
%a = ...
%b = and i32 %a, 2
%c = srl i32 %b, 1
%d = br i32 %c,
into
%a = ...
%b = and %a, 2
%c = X86ISD::CMP %b, 0
%d = X86ISD::BRCOND %c ...
This applies only when the AND constant value has one bit set and the SRL
constant is equal to the log2 of the AND constant. The back-end is smart enough
to convert the result into a TEST/JMP sequence.
llvm-svn: 67728
2009-03-26 01:47:50 +00:00
189d67181c
Doxygen-ify comments.
...
llvm-svn: 67727
2009-03-26 01:46:56 +00:00
db90560c1c
Skip debug info one more place. (This one gets
...
called from llc, not opt, but it's an IR level
optimization nevertheless.)
llvm-svn: 67724
2009-03-26 01:15:07 +00:00
4555618854
Before deleting a basic block, give other loop passes a chance cleanup analysis values, related to the instructions in the basic block.
...
llvm-svn: 67719
2009-03-25 23:57:48 +00:00
2e9f42bed5
Revert 67132. This is breaking some objective-c apps.
...
Also fixes SDISel so it *does not* force promote return value if the function is not marked signext / zeroext.
llvm-svn: 67701
2009-03-25 20:20:11 +00:00
eb1646d28c
When optimizing with debug info, don't keep the
...
stoppoint nodes around until Legalize; doing this
imposed an ordering on a sequence of loads that
came from different lines, interfering with scheduling.
llvm-svn: 67692
2009-03-25 17:36:08 +00:00
56a95f6c16
Fix a bug in our autoupgrade support: in an argument list to a function
...
call, we should treat "i64 zext" as the start of a constant expr, but
"i64 0 zext" as an argument with an obsolete attribute on it (this form
is already tested by test/Assembler/2007-07-30-AutoUpgradeZextSext.ll).
Make the autoupgrade logic more discerning to avoid treating "i64 zext"
as an old-style attribute, causing us to reject a valid constant expr.
This fixes PR3876.
llvm-svn: 67682
2009-03-25 06:36:36 +00:00
2755edf4c4
do not rely on callee being operand 0
...
llvm-svn: 67681
2009-03-25 06:32:59 +00:00
68b0881d94
Do not ignore DW_TAG_class_type!
...
llvm-svn: 67675
2009-03-25 03:52:06 +00:00
5e5a63cf8f
CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose.
...
llvm-svn: 67668
2009-03-25 01:47:28 +00:00
9966403e90
Don't print global names twice with -asm-verbose.
...
llvm-svn: 67667
2009-03-25 01:08:42 +00:00
c3b2111d97
Fix PR3874 by restoring a condition I removed, but making it more
...
precise than it used to be.
llvm-svn: 67662
2009-03-25 00:28:58 +00:00
a6e85a19c6
Do not ignore DW_TAG_class_type!
...
llvm-svn: 67661
2009-03-25 00:28:40 +00:00
9e94538005
oops, I intended to remove this, not comment it out. Thanks Duncan!
...
llvm-svn: 67657
2009-03-24 23:48:25 +00:00
f413a88839
Fix PR3845: Avoid stale MachineInstruction pointer reference.
...
llvm-svn: 67649
2009-03-24 20:33:17 +00:00
e7e5becdd2
simplify logic and get rid of the assumption that operand 0 is the callee
...
llvm-svn: 67642
2009-03-24 19:28:39 +00:00
306813cbbb
canonicalize inttoptr and ptrtoint instructions which cast pointers
...
to/from integer types that are not intptr_t to convert to intptr_t
then do an integer conversion to the dest type. This exposes the
cast to the optimizer.
llvm-svn: 67638
2009-03-24 18:35:40 +00:00
4d7e4ee799
fix one more fp80 case (used only by Interpreter)
...
and streamline code here a bit.
llvm-svn: 67636
2009-03-24 18:16:17 +00:00
d9eb41177a
two changes:
...
1. Make instcombine always canonicalize trunc x to i1 into an icmp(x&1). This
exposes the AND to other instcombine xforms and is more of what the code
generator expects.
2. Rewrite the remaining trunc pattern match to use 'match', which
simplifies it a lot.
llvm-svn: 67635
2009-03-24 18:15:30 +00:00
f259f3f312
Change JIT for different layout of fp80.
...
llvm-svn: 67629
2009-03-24 17:35:45 +00:00
c35847e109
more tidying: name the components of PhysReg in the case when
...
the target constraint specifies a specific physreg.
llvm-svn: 67618
2009-03-24 15:27:37 +00:00
42eceb3491
Tidy a bit more.
...
llvm-svn: 67617
2009-03-24 15:25:07 +00:00
246eda43bd
simplify this code a bit now that "allocation to a vreg class" can never
...
fail.
llvm-svn: 67616
2009-03-24 15:22:11 +00:00
efd2d44aa5
I was convinced that it's ok to allow a second i8 return value
...
to be returned in DL. LLVM's multiple-return-value support is
not ABI-conforming; front-ends that wish to have code emitted
that conforms to an ABI are currently expected to make
arrangements for this on their own rather than assuming that
multiple-return-values will automatically do the right thing.
This commit doesn't fundamentally change this situation.
llvm-svn: 67588
2009-03-24 01:04:34 +00:00
f3746cbc56
Minor compile-time optimization; don't bother checking
...
canClobberPhysRegDefs if the successor node doesn't
clobber any physical registers.
llvm-svn: 67587
2009-03-24 00:50:07 +00:00
9a658d72db
Add a pre-pass to the burr-list scheduler which makes adjustments to
...
help out the register pressure reduction heuristics in the case of
nodes with multiple uses. Currently this uses very conservative
heuristics, so it doesn't have a broad impact, but in cases where it
does help it can make a big difference.
llvm-svn: 67586
2009-03-24 00:49:12 +00:00
a774a99245
Do not emit comments unless -asm-verbose.
...
llvm-svn: 67580
2009-03-24 00:17:40 +00:00
32dfb35281
Use a SmallPtrSet instead of std::set.
...
llvm-svn: 67578
2009-03-23 23:39:20 +00:00
7fe1b0f50f
Fix a bug in spill weight computation. If the alias is a super-register, and the super-register is in the register class we are trying to allocate. Then add the weight to all sub-registers of the super-register even if they are not aliases.
...
e.g. allocating for GR32, bh is not used, updating bl spill weight.
bl should get the same spill weight otherwise it will be choosen
as a spill candidate since spilling bh doesn't make ebx available.
This fix PR2866.
llvm-svn: 67574
2009-03-23 22:57:19 +00:00
93eefa0043
Fix internal representation of fp80 to be the
...
same as a normal i80 {low64, high16} rather
than its own {high64, low16}. A depressing number
of places know about this; I think I got them all.
Bitcode readers and writers convert back to the old
form to avoid breaking compatibility.
llvm-svn: 67562
2009-03-23 21:16:53 +00:00
ed0e8d44ce
When unfolding a load during scheduling, the new operator node has
...
a data dependency on the load node, so it really needs a
data-dependence edge to the load node, even if the load previously
existed.
And add a few comments.
llvm-svn: 67554
2009-03-23 20:20:43 +00:00
f858466018
Fix PR3391 and PR3864. Reg allocator infinite looping.
...
llvm-svn: 67544
2009-03-23 18:24:37 +00:00
f477262e69
Don't set SUnit::hasPhysRegDefs to true unless the defs are
...
actually have uses, which reflects the way it's used.
llvm-svn: 67540
2009-03-23 17:39:36 +00:00
a366da1bf7
Fix canClobberPhysRegDefs to check all SDNodes grouped together
...
in an SUnit, instead of just the first one. This fix is needed
by some upcoming scheduler changes.
llvm-svn: 67531
2009-03-23 16:23:01 +00:00
52c278e54d
Add a new bit to SUnit to record whether a node has implicit physreg
...
defs, regardless of whether they are actually used.
llvm-svn: 67528
2009-03-23 16:10:52 +00:00
4f2fea1a21
Now that errs() is properly non-buffered, there's no need to
...
explicitly flush it.
llvm-svn: 67526
2009-03-23 15:57:19 +00:00
21ff35195e
LoopVR is not CFGOnly.
...
llvm-svn: 67524
2009-03-23 15:50:52 +00:00
5aabc424b1
Enhance LiveValues to work on PHI operands.
...
llvm-svn: 67523
2009-03-23 15:49:37 +00:00
4a683478d5
Correct some comments. Operand numbers start at 0.
...
llvm-svn: 67518
2009-03-23 15:40:10 +00:00
968c3b0d6e
Model inline asm constraint which ties an input to an output register as machine operand TIED_TO constraint. This eliminated the need to pre-allocate registers for these. This also allows register allocator can eliminate the unneeded copies.
...
llvm-svn: 67512
2009-03-23 08:01:15 +00:00
47c9750f04
Do not fold away subreg_to_reg if the source register has a sub-register index. That means the source register is taking a sub-register of a larger register. e.g. On x86
...
%RAX<def> = ...
%RAX<def> = SUBREG_TO_REG 0, %EAX:3<kill>, 3
The first def is defining RAX, not EAX so the top bits were not zero-extended.
llvm-svn: 67511
2009-03-23 07:19:58 +00:00
f2b60658ef
fix a bug Alexei Svitkine pointed out.
...
llvm-svn: 67510
2009-03-23 06:46:20 +00:00
fb95472123
When we restore signal handlers, restore them back to what they
...
were when we came around, not to their default handler. This
should fix PR3848
llvm-svn: 67509
2009-03-23 05:55:36 +00:00
f299a68ee0
factorize signal registration, part of PR3848.
...
llvm-svn: 67508
2009-03-23 05:42:29 +00:00
772de0ae2d
Fix a grammaro in a comment that Bill noticed.
...
llvm-svn: 67507
2009-03-23 05:02:44 +00:00
70d9929def
Add comments explaining why there's only one register for
...
i8 return values.
llvm-svn: 67502
2009-03-23 04:28:24 +00:00
1f15ca7c7a
Factorize out a concept - no functionality change.
...
llvm-svn: 67454
2009-03-21 21:27:31 +00:00
cbeda87da1
add a fastpath to ConstantExpr::getBitCast to handle the case when an obviously
...
unneeded bitcast is requested. This is common for frontends who just unconditionally
cast even if the target is often the right type already. THis prevents going into
getFoldedCast which switches on the opcode and does a bunch of other stuff before
doing the same opzn.
llvm-svn: 67435
2009-03-21 06:55:54 +00:00
9b9586a5ae
Removed AFGR32 register class
...
Handle odd registers allocation in FGR32.
llvm-svn: 67422
2009-03-21 00:05:07 +00:00
dc40d5ae2c
Fix a few more indentation problems and an 80-column violation.
...
llvm-svn: 67416
2009-03-20 23:16:43 +00:00
7117a916f5
No functional changes. Fix indentation and whitespace only.
...
llvm-svn: 67412
2009-03-20 22:42:55 +00:00
0a981d1d36
Fix instcombine to not introduce undefined shifts when merging two
...
shifts together. This fixes PR3851.
llvm-svn: 67411
2009-03-20 22:41:15 +00:00
a09e0afe74
Don't load values out of global constants with weak
...
linkage: the value may be replaced with something
different at link time. (Frontends that want to
allow values to be loaded out of weak constants can
give their constants weak_odr linkage).
llvm-svn: 67407
2009-03-20 21:53:29 +00:00
3bdc4bdba6
Simplify this code; use a while instead of an if and a do-while.
...
llvm-svn: 67400
2009-03-20 20:42:23 +00:00
2e55923fba
For inline asm output operand that matches an input. Encode the input operand index in the high bits.
...
llvm-svn: 67387
2009-03-20 18:03:34 +00:00
4655d731e1
Fixed comment for libcalls.
...
llvm-svn: 67373
2009-03-20 14:10:20 +00:00
83debdf4b4
Fixed build warnings for unused variables.
...
llvm-svn: 67372
2009-03-20 13:49:20 +00:00
Dan Gohman