Commit Graph

293418 Commits

Author SHA1 Message Date
George Rimar 732a1e52b9 [ELF] - Eliminate dead "if". NFC.
We call switchTo() from assignAddresses() for switching to Aether,
and from assignOffsets().

First calls assignOffsets() one by one for each output section.
(https://github.com/llvm-mirror/lld/blob/master/ELF/LinkerScript.cpp#L1045)

That I believe means the condition removed in this patch is dead.

llvm-svn: 336356
2018-07-05 14:27:36 +00:00
Gabor Buella 9679eb6527 [X86] Fix some vector cmp builtins - TRUE/FALSE predicates
This patch removes on optimization used with the TRUE/FALSE
predicates, as was suggested in https://reviews.llvm.org/D45616
for r335339.
The optimization was buggy, since r335339 used it also
for *_mask builtins, without actually applying the mask -- the
mask argument was just ignored.

Reviewers: craig.topper, uriel.k, RKSimon, andrew.w.kaylor, spatel, scanon, efriedma

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D48715

llvm-svn: 336355
2018-07-05 14:26:56 +00:00
George Rimar ccf0db9974 [ELF] - Convert excessive dyn_cast -> cast. NFC.
Currently, there are only OutputSection and SymbolAssignment
commands possible at the first level under SECTIONS tag.

Hence, dyn_cast was excessive.

llvm-svn: 336354
2018-07-05 14:09:47 +00:00
George Rimar d87b1eed8e [ELF] - Test we are able to assign version to symbols that are not "_Z*"
This is to test the following line of the code:
https://github.com/llvm-mirror/lld/blob/master/ELF/SymbolTable.cpp#L681

If symbol does not start from _Z prefix and we have extern "C++",
we do not call demangler and use its name as is.

llvm-svn: 336353
2018-07-05 14:01:54 +00:00
Clement Courbet f9a0bb330d [llvm-exegesis] Add uop computation for more X87 instruction classes.
Summary:
This allows measuring comparisons (UCOM_FpIr32,UCOM_Fpr32,...),
conditional moves (CMOVBE_Fp32,...)

Reviewers: gchatelet

Subscribers: tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D48713

llvm-svn: 336352
2018-07-05 13:54:51 +00:00
Simon Pilgrim 9e987e0917 Fix comment typo. NFCI.
llvm-svn: 336351
2018-07-05 13:51:35 +00:00
Michael Kruse 9f305371d9 [CodeGen] Fix potential null pointer dereference. NFC.
ScalarEvolution::getSCEV dereferences its argument, s.t. passing nullptr
leads to undefined behaviour.

Check for nullptr before calling it instead of checking its argument
afterwards.

llvm-svn: 336350
2018-07-05 13:44:50 +00:00
George Rimar 8ac85d9a11 [ELF] - Check we do not assign version to undefined symbol when using extern C++.
This tests the following 'continue' line in getDemangledSyms():
https://github.com/llvm-mirror/lld/blob/master/ELF/SymbolTable.cpp#L677

llvm-svn: 336349
2018-07-05 13:39:39 +00:00
Sanjay Patel bce899ff59 [AArch64, PowerPC, x86] add tests for signbit bit hacks; NFC
llvm-svn: 336348
2018-07-05 13:16:46 +00:00
Vladimir Stefanovic 9709905782 [mips] Add '-mcrc', '-mno-crc' options to enable/disable CRC ASE
'-mcrc' is shared with ARM.
'-mno-crc' is Mips-only (ARM uses '-mnocrc').

Differential revision: https://reviews.llvm.org/D48169

llvm-svn: 336347
2018-07-05 13:10:23 +00:00
Gabor Buella 38a7ce76ae [X86] NFC - add more test cases for vector cmp intrinsics
Add test cases with each predicate using the following
intrinsics:
_mm_cmp_pd
_mm_cmp_ps
_mm256_cmp_pd
_mm256_cmp_ps
_mm_cmp_pd_mask
_mm_cmp_ps_mask
_mm256_cmp_pd_mask
_mm256_cmp_ps_mask
_mm512_cmp_pd_mask
_mm512_cmp_ps_mask
_mm_mask_cmp_pd_mask
_mm_mask_cmp_ps_mask
_mm256_mask_cmp_pd_mask
_mm256_mask_cmp_ps_mask
_mm512_mask_cmp_pd_mask
_mm512_mask_cmp_ps_mask

Some of these are marked with FIXME, as there is bug in lowering
e.g. _mm512_mask_cmp_ps_mask.

llvm-svn: 336346
2018-07-05 12:57:47 +00:00
George Rimar 2d55b36aac [ELF] - Add test to check we don't crash when tracing reserved symbol.
This is to test the following line of code:
https://github.com/llvm-mirror/lld/blob/master/ELF/SymbolTable.cpp#L601

Without that line linker would crash.

llvm-svn: 336345
2018-07-05 12:48:29 +00:00
Simon Pilgrim dafd828c97 [SLPVectorizer] Begin abstracting InstructionsState alternate matching away from opcodes. NFCI.
This is an early step towards matching Instructions by attributes other than the opcode. This will be necessary for cast/call alternates which share the same opcode but have different types/intrinsicIDs etc. - which we could vectorize as long as we split them using the alternate mechanism.

Differential Revision: https://reviews.llvm.org/D48945

llvm-svn: 336344
2018-07-05 12:30:44 +00:00
Clement Courbet 2c278cdd98 [llvm-exegesis][NFC]clang-format
llvm-svn: 336343
2018-07-05 12:26:12 +00:00
George Rimar 889a161b4f [ELF] - Test LLD creates empty .imports file.
This covers the following code line with a test:
https://github.com/llvm-mirror/lld/blob/master/ELF/LTO.cpp#L213

After that, coverage of LTO.cpp is 100%.

llvm-svn: 336342
2018-07-05 12:23:37 +00:00
Yvan Roux 01c0d860f3 Revert "[CMake] Run libFuzzer tests with check-all."
Revert due to AArch64 bots breakage, upstream PR raised to track the
issue: https://bugs.llvm.org/show_bug.cgi?id=38034

llvm-svn: 336341
2018-07-05 12:19:03 +00:00
George Rimar 72ceddab7b [ELF] - Add test to check we produce an error if unable to write an empty index file.
Test case ensures lld generates an error if unable to
write an empty index file for lazy object file that is not added to link.

This covers the following line with a test:
https://github.com/llvm-mirror/lld/blob/master/ELF/LTO.cpp#L206

llvm-svn: 336340
2018-07-05 12:12:30 +00:00
Ryan Taylor 5f04458a61 [AMDGPU] Add VALU to V_INTERP Instructions
Wait states are not properly being inserted after buffer_store for v_interp instructions.

Add VALU to V_INTERP instructions so that the GCNHazardRecognizer can
check and insert the appropriate wait states when needed.

Differential Revision: https://reviews.llvm.org/D48772

Change-Id: Id540c9b074fc69b5c1de6b182276aa089c74aa64
llvm-svn: 336339
2018-07-05 12:02:07 +00:00
George Rimar 046fa610e0 [ELF] - Remove dead code. NFC.
I think code is dead, because the only way to see
Path as empty seems would be if replaceThinLTOSuffix()
replaced some prefix with empty prefix (making the result
Path empty).

But it is impossible to pass the empty prefix,
we would file in driver:
https://github.com/llvm-mirror/lld/blob/master/ELF/Driver.cpp#L669

llvm-svn: 336338
2018-07-05 11:58:04 +00:00
Chandler Carruth f26e7d1fe9 [ADT] Switch to indirect even the trivial case through an object pointer
that has required alignment. This avoids issues that keep coming up with
function pointers being less aligned.

I'm pretty annoyed that we can't take advantage of function alignment
even on platforms where they *are* aligned, but build modes and other
things make taking advantage of it somewhere between hard and
impossible. The best case scenario would still embed various build modes
into the ABI causing really hard to debug issues if you compiled one
object file differently from another. =/

This should at least bring the bots back that were having trouble with
this.

llvm-svn: 336337
2018-07-05 11:56:34 +00:00
Krasimir Georgiev 004f9d400f Partially revert r336268 in address-offsets.ll
Summary: There the typos are intentional, explicitly introduced to disable these cases in r280285.

Reviewers: bkramer

Reviewed By: bkramer

Subscribers: dschuff, sbc100, jgravelle-google, aheejin, llvm-commits

Differential Revision: https://reviews.llvm.org/D48962

llvm-svn: 336336
2018-07-05 11:30:15 +00:00
George Rimar 9b99abcf99 [ELF] - Advance position in a memory region when change the Dot.
This is https://bugs.llvm.org//show_bug.cgi?id=37836

Previously LLD could assign to Dot or set the address
for the section with address expression but did not advance
the position in a memory region.

Patch fixes the issue.

llvm-svn: 336335
2018-07-05 10:44:17 +00:00
Sander de Smalen 13f9425e3a [TableGen] Increase the number of supported decoder fix-ups.
The vast number of added instructions for SVE causes TableGen to fail with an assertion:

  Assertion `Delta < 65536U && "disassembler decoding table too large!"'

This patch increases the number of supported decoder fix-ups.

Reviewers: dmgreen, stoklund, petpav01

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D48937

llvm-svn: 336334
2018-07-05 10:39:15 +00:00
Simon Pilgrim 97e6afec2a [X86][SSE] Add extra v16i16 shl x,c -> pmullw test
We want to compare shifts with repeated vs non-repeated v8i16 shuffle masks (for PBLENDW ymm) 

llvm-svn: 336333
2018-07-05 09:54:53 +00:00
Gabor Marton 0bebf95944 [ASTImporter] Fix import of objects with anonymous types
Summary:
Currently, anonymous types are merged into the same redecl chain even if they
are structurally inequivalent. This results that global objects are not
imported, if there are at least two global objects with different anonymous
types. This patch provides a fix.

Reviewers: a.sidorin, balazske, r.stahl

Subscribers: rnkovacs, dkrupp, cfe-commits

Differential Revision: https://reviews.llvm.org/D48773

llvm-svn: 336332
2018-07-05 09:51:13 +00:00
Simon Pilgrim 6dc45e6ca0 Try to fix -Wimplicit-fallthrough warning. NFCI.
llvm-svn: 336331
2018-07-05 09:48:01 +00:00
Kirill Bobyrev 7cf29bc028 [NFS] Wipe trailing whitespaces
This patch is a preparation for another one containing meaningful
changes. This patch simply removes trailing whitespaces in few files
affected by the upcoming patch and reformats

llvm-svn: 336330
2018-07-05 09:37:26 +00:00
Simon Pilgrim 4a03201324 Fix -Wunused-variable warning. NFCI.
llvm-svn: 336329
2018-07-05 09:35:12 +00:00
Aleksandar Beserminji 3239ba8c0e [mips] Fix atomic operations at O0, v3
Similar to PR/25526, fast-regalloc introduces spills at the end of basic
blocks. When this occurs in between an ll and sc, the stores can cause the
atomic sequence to fail.

This patch fixes the issue by introducing more pseudos to represent atomic
operations and moving their lowering to after the expansion of postRA
pseudos.

This version addresses issues with the initial implementation and covers
all atomic operations.

This resolves PR/32020.

Thanks to James Cowgill for reporting the issue!

Patch By: Simon Dardis

Differential Revision: https://reviews.llvm.org/D31287

llvm-svn: 336328
2018-07-05 09:27:05 +00:00
Joachim Protze b41c61eed4 Dropped non-supoorted "--no-as-needed" flag from OMPT tests for macOS
The flag "--no-as-needed" is not recognized by the linker on macOS making the following tests fail:

ompt/loadtool/tool_available/tool_available.c
ompt/loadtool/tool_not_available/tool_not_available.c
This patch removes this flag for macOS and adds it only for Linux and Windows.
I tested it on Ubuntu 16.04 and macOS HighSierra, with Clang/LLVM 6.0.1 and OpenMP trunk.

This solution was also discussed in the OpenMP-dev mailing list.

Patch provided by Simone Atzeni

Differential Revision: https://reviews.llvm.org/D48888

llvm-svn: 336327
2018-07-05 09:14:06 +00:00
Joachim Protze 00505b85a3 [OMPT] Add synchronization to threads_nested.c testcase
The testcase potentially fails when a thread is reused.
The added synchronization makes sure this does not happen.

Patch provided by Simon Convent

Differential Revision: https://reviews.llvm.org/D48932

llvm-svn: 336326
2018-07-05 09:14:01 +00:00
Ivan A. Kosarev 466037900c [NEON] Fix combining of vldx_dup intrinsics with updating of base addresses
Resolves:
Unsupported ARM Neon intrinsics in Target-specific DAG combine
function for VLDDUP
https://bugs.llvm.org/show_bug.cgi?id=38031

Related diff: D48439

Differential Revision: https://reviews.llvm.org/D48920

llvm-svn: 336325
2018-07-05 08:59:49 +00:00
Sander de Smalen 097ab704c9 Reverting r336322 for now, as it causes an assert failure
in TableGen, for which there is already a patch in Phabricator
(D48937) that needs to be committed first.

llvm-svn: 336324
2018-07-05 08:52:03 +00:00
Mikael Holmen 8505f34b29 Partial revert of "NFC - Various typo fixes in tests"
This partially reverts r336268 since it causes buildbot failures.

Added FIXME at the places where the CHECKs are misspelled.

llvm-svn: 336323
2018-07-05 08:42:16 +00:00
Sander de Smalen ef44226c4f [AArch64][SVE] Asm: Support for predicated FP rounding instructions.
This patch also adds instructions for predicated FP square-root and
reciprocal exponent.

The added instructions are:
- FRINTI  Round to integral value (current FPCR rounding mode)
- FRINTX  Round to integral value (current FPCR rounding mode, signalling inexact)
- FRINTA  Round to integral value (to nearest, with ties away from zero)
- FRINTN  Round to integral value (to nearest, with ties to even)
- FRINTZ  Round to integral value (toward zero)
- FRINTM  Round to integral value (toward minus Infinity)
- FRINTP  Round to integral value (toward plus Infinity)
- FSQRT   Floating-point square root
- FRECPX  Floating-point reciprocal exponent

llvm-svn: 336322
2018-07-05 08:38:30 +00:00
Eric Liu bc25ef76ed [clangd] Log sema completion context kind and query scopes. NFC
Reviewers: sammccall

Subscribers: ilya-biryukov, MaskRay, jkorous, cfe-commits

Differential Revision: https://reviews.llvm.org/D48724

llvm-svn: 336321
2018-07-05 08:29:33 +00:00
Sam McCall f84dd024de Revert "[clangd] FileDistance: temporarily disable in CodeComplete, it's behaving badly"
The bad behavior seems to have been fixed by r336242 after all.
I thought it was persisting, but that was a different bug fixed by D48940

llvm-svn: 336320
2018-07-05 08:26:53 +00:00
Sjoerd Meijer 27be58b307 [ARM] ParallelDSP: only support i16 loads for now
We were miscompiling i8 loads, so reject them as unsupported narrow operations
for now.

Differential Revision: https://reviews.llvm.org/D48944

llvm-svn: 336319
2018-07-05 08:21:40 +00:00
Eric Liu 8944f0ef33 [clangd] Treat class constructor as in the same scope as the class in ranking.
Reviewers: sammccall

Subscribers: ilya-biryukov, MaskRay, jkorous, cfe-commits

Differential Revision: https://reviews.llvm.org/D48933

llvm-svn: 336318
2018-07-05 08:14:04 +00:00
Sander de Smalen 592718f906 [AArch64][SVE] Asm: Support for signed/unsigned MIN/MAX/ABD
This patch implements the following varieties:

- Unpredicated signed max,   e.g. smax z0.h, z1.h, #-128
- Unpredicated signed min,   e.g. smin z0.h, z1.h, #-128

- Unpredicated unsigned max, e.g. umax z0.h, z1.h, #255
- Unpredicated unsigned min, e.g. umin z0.h, z1.h, #255

- Predicated signed max,     e.g. smax z0.h, p0/m, z0.h, z1.h
- Predicated signed min,     e.g. smin z0.h, p0/m, z0.h, z1.h
- Predicated signed abd,     e.g. sabd z0.h, p0/m, z0.h, z1.h

- Predicated unsigned max,   e.g. umax z0.h, p0/m, z0.h, z1.h
- Predicated unsigned min,   e.g. umin z0.h, p0/m, z0.h, z1.h
- Predicated unsigned abd,   e.g. uabd z0.h, p0/m, z0.h, z1.h

llvm-svn: 336317
2018-07-05 07:54:10 +00:00
Lei Huang 66e22c21c3 [Power9] Optimize codgen for conversions of int to float128
Optimize code sequences for integer conversion to fp128 when the integer is a result of:
  * float->int
  * float->long
  * double->int
  * double->long

Differential Revision: https://reviews.llvm.org/D48429

llvm-svn: 336316
2018-07-05 07:46:01 +00:00
Craig Topper 350c5f1881 [X86] Remove X86 specific scalar FMA intrinsics and upgrade to tart independent FMA and extractelement/insertelement.
llvm-svn: 336315
2018-07-05 06:52:55 +00:00
Lei Huang 9d70afbb31 [Power9][NFC] add back-end tests for passing homogeneous fp128 aggregates by value
Tests to verify that we are passing fp128 via VSX registers as per ABI.
These are related to clang commit rL336308.

Differential Revision: https://reviews.llvm.org/D48310

llvm-svn: 336314
2018-07-05 06:51:38 +00:00
Lei Huang 5bab646c26 [Power9] Add tests for passing float128 in VSX reg for non-homogenous aggregates
Add missing testcase for rL336310

llvm-svn: 336313
2018-07-05 06:29:28 +00:00
Serge Pavlov 2f17e969e4 [demangler] Avoid alignment warning
The alignment specified by a constant for the field
`BumpPointerAllocator::InitialBuffer` exceeded the alignment
guaranteed by `malloc` and `new` on Windows. This change set
the alignment value to that of `long double`, which is defined
by the used platform.

It fixes https://bugs.llvm.org/show_bug.cgi?id=37944.

Differential Revision: https://reviews.llvm.org/D48889

llvm-svn: 336312
2018-07-05 06:24:29 +00:00
Serge Pavlov 892bd81a62 [demangler] Avoid alignment warning
The alignment specified by a constant for the field
`BumpPointerAllocator::InitialBuffer` exceeded the alignment
guaranteed by `malloc` and `new` on Windows. This change set
the alignment value to that of `long double`, which is defined
by the used platform.

It fixes https://bugs.llvm.org/show_bug.cgi?id=37944.

Differential Revision: https://reviews.llvm.org/D48889

llvm-svn: 336311
2018-07-05 06:22:39 +00:00
Lei Huang a855e17f09 [Power9] Ensure float128 in non-homogenous aggregates are passed via VSX reg
Non-homogenous aggregates are passed in consecutive GPRs, in GPRs and in memory,
or in memory. This patch ensures that float128 members of non-homogenous
aggregates are passed via VSX registers.

This is done via custom lowering a bitcast of a build_pari(i64,i64) to float128
to a new PPCISD node, BUILD_FP128.

Differential Revision: https://reviews.llvm.org/D48308

llvm-svn: 336310
2018-07-05 06:21:37 +00:00
Sam McCall 2161ec7ee2 [clangd] Track origins of symbols (various indexes, Sema).
Summary: Surface it in the completion items C++ API, and when a flag is set.

Reviewers: ioeric

Subscribers: ilya-biryukov, MaskRay, jkorous, cfe-commits

Differential Revision: https://reviews.llvm.org/D48938

llvm-svn: 336309
2018-07-05 06:20:41 +00:00
Lei Huang 449252d2ad [Power9] Update fp128 as a valid homogenous aggregate base type
Update clang to treat fp128 as a valid base type for homogeneous aggregate
passing and returning.

Differential Revision: https://reviews.llvm.org/D48044

llvm-svn: 336308
2018-07-05 04:32:01 +00:00
Lei Huang d17c39ccaa [Power9]Legalize and emit code for quad-precision convert from single-precision
Legalize and emit code for quad-precision floating point operation conversion of
single-precision value to quad-precision.

Differential Revision: https://reviews.llvm.org/D47569

llvm-svn: 336307
2018-07-05 04:18:37 +00:00