Bill Wendling
0602f39bb1
Remove superfluous SDNode ordering.
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llvm-svn: 91971
2009-12-23 01:28:19 +00:00
Bill Wendling
9df5c6dfc3
Remove node ordering from inline asm nodes. It's not needed.
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llvm-svn: 91961
2009-12-23 00:47:20 +00:00
Bill Wendling
91313064f1
Remove node ordering from VA nodes. It's not needed.
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llvm-svn: 91958
2009-12-23 00:44:51 +00:00
Bill Wendling
70794596a8
Assign ordering to SDNodes in PromoteNode. Also fixing a subtle bug where BSWAP
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was using "Tmp1" in the first getNode call instead of Node->getOperand(0).
llvm-svn: 91936
2009-12-22 22:53:39 +00:00
Bill Wendling
d85498132f
Allow 0 as an order number. Don't assign an order to formal arguments.
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llvm-svn: 91920
2009-12-22 21:35:02 +00:00
Bob Wilson
bac37abe73
Report an error for bad inline assembly, where the value passed for an
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"indirect" operand is not a pointer.
llvm-svn: 91913
2009-12-22 18:34:19 +00:00
Bill Wendling
919b7aab2e
Add more plumbing. This time in the LowerArguments and "get" functions which
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return partial registers. This affected the back-end lowering code some.
Also patch up some places I missed before in the "get" functions.
llvm-svn: 91880
2009-12-22 02:10:19 +00:00
Bill Wendling
ac08758b71
Add SDNode ordering to inlined asm and VA functions.
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llvm-svn: 91876
2009-12-22 01:25:10 +00:00
Bill Wendling
f376c40d0e
Adding more assignment of ordering to SDNodes. This time in the "call" and
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generic copy functions.
llvm-svn: 91872
2009-12-22 01:11:43 +00:00
Bill Wendling
a4d7df7a37
Add ordering of SDNodes to LowerCallTo.
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llvm-svn: 91866
2009-12-22 00:50:32 +00:00
Bill Wendling
b99b2693f3
Now add ordering to SDNodes created by the massive intrinsic lowering function.
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llvm-svn: 91863
2009-12-22 00:40:51 +00:00
Bill Wendling
ea3e73e596
To make things interesting, I added MORE code to set the ordering of
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SDNodes. This time in the load/store and limited-precision code.
llvm-svn: 91860
2009-12-22 00:12:37 +00:00
Bill Wendling
c6b473433b
Add more plumbing to assign ordering to SDNodes. Have the "getValue" method
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assign the ordering when called. Combine some of the ordering assignments to
keep things simple.
llvm-svn: 91857
2009-12-21 23:47:40 +00:00
Bill Wendling
e79105b591
More ordering plumbing. This time for GEP. I need to remember to assign
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orderings to values returned by getValue().
llvm-svn: 91850
2009-12-21 23:10:19 +00:00
Bill Wendling
fff99f066b
Another incremental check-in for assigning ordering to SDNodes. This time for
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shuffle and insert vector.
llvm-svn: 91847
2009-12-21 22:42:14 +00:00
Bill Wendling
443d0722b0
Assign ordering to more instructions. Incremental check-in.
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llvm-svn: 91846
2009-12-21 22:30:11 +00:00
Bill Wendling
28727f3785
- Add a bit more plumbing assigning an order to SDNodes.
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- Modify the "dump" method to emit the order of an SDNode.
llvm-svn: 91845
2009-12-21 21:59:52 +00:00
Bill Wendling
7f5eb53ce2
First wave of plumbing for assigning an ordering to SDNodes. This takes care of
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a lot of the branching instructions.
llvm-svn: 91838
2009-12-21 19:59:38 +00:00
Bill Wendling
022d18fa3f
Changes from review:
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- Move DisableScheduling flag into TargetOption.h
- Move SDNodeOrdering into its own header file. Give it a minimal interface that
doesn't conflate construction with storage.
- Move assigning the ordering into the SelectionDAGBuilder.
This isn't used yet, so there should be no functional changes.
llvm-svn: 91727
2009-12-18 23:32:53 +00:00
Bob Wilson
3152b0471b
Handle ARM inline asm "w" constraints with 64-bit ("d") registers.
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The change in SelectionDAGBuilder is needed to allow using bitcasts to convert
between f64 (the default type for ARM "d" registers) and 64-bit Neon vector
types. Radar 7457110.
llvm-svn: 91649
2009-12-18 01:03:29 +00:00
Bob Wilson
1c00b6964f
Fix a comment grammaro.
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llvm-svn: 91584
2009-12-17 05:07:36 +00:00
Daniel Dunbar
b827e52638
Reapply r91392, it was only unmasking the bug, and since TOT is still broken having it reverted does no good.
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llvm-svn: 91560
2009-12-16 20:10:05 +00:00
Daniel Dunbar
df45b70c1e
Revert "Initial work on disabling the scheduler. This is a work in progress, and
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this", this broke llvm-gcc bootstrap for release builds on
x86_64-apple-darwin10.
llvm-svn: 91533
2009-12-16 10:56:02 +00:00
Bill Wendling
07beddceb7
Initial work on disabling the scheduler. This is a work in progress, and this
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stuff isn't used just yet.
We want to model the GCC `-fno-schedule-insns' and `-fno-schedule-insns2'
flags. The hypothesis is that the people who use these flags know what they are
doing, and have hand-optimized the C code to reduce latencies and other
conflicts.
The idea behind our scheme to turn off scheduling is to create a map "on the
side" during DAG generation. It will order the nodes by how they appeared in the
code. This map is then used during scheduling to get the ordering.
llvm-svn: 91392
2009-12-15 01:54:51 +00:00
Dan Gohman
6d306bb32b
Fix the result type of SELECT nodes lowered from Select instructions with
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aggregate return values. This fixes PR5754.
llvm-svn: 91145
2009-12-11 19:50:50 +00:00
Dan Gohman
1a6c47f1cb
Rename SelectionDAGLowering to SelectionDAGBuilder, and rename
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SelectionDAGBuild.cpp to SelectionDAGBuilder.cpp.
llvm-svn: 89681
2009-11-23 18:04:58 +00:00