Commit Graph

68124 Commits

Author SHA1 Message Date
Matt Arsenault a7f1e0c44f R600: Implement isNarrowingProfitable.
llvm-svn: 204658
2014-03-24 19:43:31 +00:00
Matt Arsenault bd9958038c R600/SI: Move splitting 64-bit immediates to separate function.
llvm-svn: 204651
2014-03-24 18:26:52 +00:00
Ulrich Weigand cae3a17a21 [PowerPC] Generate little-endian object files
As a first step towards real little-endian code generation, this patch
changes the PowerPC MC layer to actually generate little-endian object
files.  This involves passing the little-endian flag through the various
layers, including down to createELFObjectWriter so we actually get basic
little-endian ELF objects, emitting instructions in little-endian order,
and handling fixups and relocations as appropriate for little-endian.

The bulk of the patch is to update most test cases in test/MC/PowerPC
to verify both big- and little-endian encodings.  (The only test cases
*not* updated are those that create actual big-endian ABI code, like
the TLS tests.)

Note that while the object files are now little-endian, the generated
code itself is not yet updated, in particular, it still does not adhere
to the ELFv2 ABI.

llvm-svn: 204634
2014-03-24 18:16:09 +00:00
Quentin Colombet 2d5c156b96 [X86][ISelDAG] Add missing fallback patterns for avx2 broadcast instructions.
Those patterns are used when the load cannot be folded into the related broadcast
during the select phase.
This happens when the load gets additional uses that were not anticipated during
the previous lowering phases (constant vector to constant load, then constant
load reused) or when selection DAG is not able to prove that folding the load
will not create a cycle in the DAG.

<rdar://problem/16074331>

llvm-svn: 204631
2014-03-24 17:54:19 +00:00
Matt Arsenault ad41d7b531 R600/SI: Fix 64-bit private loads.
llvm-svn: 204630
2014-03-24 17:50:46 +00:00
Adam Nemet b47372f555 [X86] Fix non-determinism in LowerVectorAllZeroTest
This can be observed with the old testcase of CodeGen/X86/pr12312.ll:

47c47
<       vorps   %ymm0, %ymm1, %ymm0
---
>       vorps   %ymm1, %ymm0, %ymm0
97c97
<       vorps   %ymm1, %ymm0, %ymm0
---
>       vorps   %ymm0, %ymm1, %ymm0

The vector VecIns is populated with all the values from VecInMap. This is done
while iterating VecInMap.  VecInMap uses a hash of pointer values so the
resulting order can vary depending on the memory layout.

The fix is to populate the vector VecIns earlier as VecInMap is populated.
This is done in DAG traversal order.

Fixes <rdar://problem/16398806>

llvm-svn: 204623
2014-03-24 16:52:08 +00:00
Daniel Sanders d89b13625e [mips] Add error message when trying to use $at in '.set noat' mode.
Summary:
Patch by David Chisnall
His work was sponsored by: DARPA, AFRL

Differential Revision: http://llvm-reviews.chandlerc.com/D3158

llvm-svn: 204621
2014-03-24 16:48:01 +00:00
Eli Bendersky 6de2087ea7 Removes the NVPTXSplitBBatBar pass.
This pass is a historic remnant and actually causes less efficient code to be
generated in some cases.

llvm-svn: 204620
2014-03-24 16:36:39 +00:00
Tom Stellard 8c12fd9252 R600/SI: Fix warning with gcc 4.8.2
llvm-svn: 204618
2014-03-24 16:12:34 +00:00
Tom Stellard da99c6eff5 R600/SI: Promote fp64 SELECT to i64
This type promotion is replacing a Tablegen pattern and it is already
covered by existing tests.

llvm-svn: 204617
2014-03-24 16:07:30 +00:00
Tom Stellard c9a67a2b6d SelectionDAG: Allow promotion of SELECT nodes from float to int types
And vice-versa, as long as the types are the same width.

There are a few R600 tests that will cover this.

llvm-svn: 204616
2014-03-24 16:07:28 +00:00
Tom Stellard 2c1c9de151 R600: Reorganize tablegen instruction definitions
Each GPU family now has its own file.

llvm-svn: 204615
2014-03-24 16:07:25 +00:00
Will Schmidt 114777e47f [PPC64LE] ELFv2 ABI updates for the .opd section
[PPC64LE] ELFv2 ABI updates for the .opd section
The PPC64 Little Endian (PPC64LE) target supports the ELFv2 ABI, and as
such, does not have a ".opd" section.  This is keyed off a _CALL_ELF=2
macro check.

The CALL_ELF check is not clearly documented at this time.  The basis
for usage in this patch is from the gcc thread here:
http://gcc.gnu.org/ml/gcc-patches/2013-11/msg01144.html

> Adding comment from Uli:
Looks good to me.  I think the old-style JIT doesn't really work
anyway for 64-bit, but at least with this patch LLVM will compile
and link again on a ppc64le host ...

llvm-svn: 204614
2014-03-24 16:04:15 +00:00
Daniel Sanders 01f9fc06e7 [mips] Allow dsubu to take an immediate as an alias for dsubiu.
Summary:
Patch by David Chisnall
His work was sponsored by: DARPA, AFRL

Differential Revision: http://llvm-reviews.chandlerc.com/D3155

llvm-svn: 204611
2014-03-24 15:38:00 +00:00
Hal Finkel e01d32107c [PowerPC] Mark many instructions as commutative
I'm under the impression that we used to infer the isCommutable flag from the
instruction-associated pattern. Regardless, we don't seem to do this (at least
by default) any more. I've gone through all of our instruction definitions, and
marked as commutative all of those that should be trivial to commute (by
exchanging the first two operands). There has been special code for the RL*
instructions, and that's not changed.

Before this change, we had the following commutative instructions:

 RLDIMI
 RLDIMIo
 RLWIMI
 RLWIMI8
 RLWIMI8o
 RLWIMIo
 XSADDDP
 XSMULDP
 XVADDDP
 XVADDSP
 XVMULDP
 XVMULSP

After:

 ADD4
 ADD4o
 ADD8
 ADD8o
 ADDC
 ADDC8
 ADDC8o
 ADDCo
 ADDE
 ADDE8
 ADDE8o
 ADDEo
 AND
 AND8
 AND8o
 ANDo
 CRAND
 CREQV
 CRNAND
 CRNOR
 CROR
 CRXOR
 EQV
 EQV8
 EQV8o
 EQVo
 FADD
 FADDS
 FADDSo
 FADDo
 FMADD
 FMADDS
 FMADDSo
 FMADDo
 FMSUB
 FMSUBS
 FMSUBSo
 FMSUBo
 FMUL
 FMULS
 FMULSo
 FMULo
 FNMADD
 FNMADDS
 FNMADDSo
 FNMADDo
 FNMSUB
 FNMSUBS
 FNMSUBSo
 FNMSUBo
 MULHD
 MULHDU
 MULHDUo
 MULHDo
 MULHW
 MULHWU
 MULHWUo
 MULHWo
 MULLD
 MULLDo
 MULLW
 MULLWo
 NAND
 NAND8
 NAND8o
 NANDo
 NOR
 NOR8
 NOR8o
 NORo
 OR
 OR8
 OR8o
 ORo
 RLDIMI
 RLDIMIo
 RLWIMI
 RLWIMI8
 RLWIMI8o
 RLWIMIo
 VADDCUW
 VADDFP
 VADDSBS
 VADDSHS
 VADDSWS
 VADDUBM
 VADDUBS
 VADDUHM
 VADDUHS
 VADDUWM
 VADDUWS
 VAND
 VAVGSB
 VAVGSH
 VAVGSW
 VAVGUB
 VAVGUH
 VAVGUW
 VMADDFP
 VMAXFP
 VMAXSB
 VMAXSH
 VMAXSW
 VMAXUB
 VMAXUH
 VMAXUW
 VMHADDSHS
 VMHRADDSHS
 VMINFP
 VMINSB
 VMINSH
 VMINSW
 VMINUB
 VMINUH
 VMINUW
 VMLADDUHM
 VMULESB
 VMULESH
 VMULEUB
 VMULEUH
 VMULOSB
 VMULOSH
 VMULOUB
 VMULOUH
 VNMSUBFP
 VOR
 VXOR
 XOR
 XOR8
 XOR8o
 XORo
 XSADDDP
 XSMADDADP
 XSMAXDP
 XSMINDP
 XSMSUBADP
 XSMULDP
 XSNMADDADP
 XSNMSUBADP
 XVADDDP
 XVADDSP
 XVMADDADP
 XVMADDASP
 XVMAXDP
 XVMAXSP
 XVMINDP
 XVMINSP
 XVMSUBADP
 XVMSUBASP
 XVMULDP
 XVMULSP
 XVNMADDADP
 XVNMADDASP
 XVNMSUBADP
 XVNMSUBASP
 XXLAND
 XXLNOR
 XXLOR
 XXLXOR

This is a by-inspection change, and I'm not sure how to write a reliable test
case. I would like advice on this, however.

llvm-svn: 204609
2014-03-24 15:07:28 +00:00
Daniel Sanders a771fefb72 [mips] Implement shorthand add / sub forms for MIPS.
Summary:
- If only two registers are passed to a three-register operation, then the
  first argument is both source and destination register.

- If a non-register is passed as the last argument, generate the immediate
  version of the instruction.

Also mark DADD commutative and add scheduling information (to the generic
scheduler), and implement DSUB.

Patch by David Chisnall
His work was sponsored by: DARPA, AFRL

CC: theraven

Differential Revision: http://llvm-reviews.chandlerc.com/D3148

llvm-svn: 204605
2014-03-24 14:05:39 +00:00
Justin Holewinski ba2fa6de4f [NVPTX] Add isel patterns for addrspacecast
llvm-svn: 204600
2014-03-24 11:17:53 +00:00
Hal Finkel 32854b0439 [PowerPC] Don't schedule VSX copy legalization unless VSX is enabled
There is no need to schedule this extra pass if it will have nothing to do.

llvm-svn: 204594
2014-03-24 09:51:41 +00:00
Hal Finkel bbad2332e3 [PowerPC] Update comment re: VSX copy-instruction selection
I've done some experimentation with this, and it looks like using the
lower-latency (but lower throughput) copy instruction is essentially always the
right thing to do.

My assumption is that, in order to be relatively sure that the higher-latency
copy will increase throughput, we'd want to have it unlikely to be in-flight
with its use. On the P7, the global completion table (GCT) can hold a maximum
of 120 instructions, shared among all active threads (up to 4), giving 30
instructions per thread.  So specifically, I'd require at least that many
instructions between the copy and the use before the high-latency variant is
used.

Trying this, however, over the entire test suite resulted in zero cases where
the high-latency form would be preferable. This may be a consequence of the
fact that the scheduler views copies as free, and so they tend to end up close
to their uses. For this experiment I created a function:

  unsigned chooseVSXCopy(MachineBasicBlock &MBB,
                         MachineBasicBlock::iterator I,
                         unsigned DestReg, unsigned SrcReg,
                         unsigned StartDist = 1,
                         unsigned Depth = 3) const;

with an implementation like:

  if (!Depth)
    return PPC::XXLOR;

  const unsigned MaxDist = 30;
  unsigned Dist = StartDist;
  for (auto J = I, JE = MBB.end(); J != JE && Dist <= MaxDist; ++J) {
    if (J->isTransient() && !J->isCopy())
      continue;

    if (J->isCall() || J->isReturn() || J->readsRegister(DestReg, TRI))
      return PPC::XXLOR;

    ++Dist;
  }

  // We've exceeded the required distance for the high-latency form, use it.
  if (Dist > MaxDist)
    return PPC::XVCPSGNDP;

  // If this is only an exit block, use the low-latency form.
  if (MBB.succ_empty())
    return PPC::XXLOR;

  // We've reached the end of the block, check the successor blocks (up to some
  // depth), and use the high-latency form if that is okay with all successors.
  for (auto J = MBB.succ_begin(), JE = MBB.succ_end(); J != JE; ++J) {
    if (chooseVSXCopy(**J, (*J)->begin(), DestReg, SrcReg,
                      Dist, --Depth) == PPC::XXLOR)
      return PPC::XXLOR;
  }

  // All of our successor blocks seem okay with the high-latency variant, so
  // we'll use it.
  return PPC::XVCPSGNDP;

and then changed the copy opcode selection from:
    Opc = PPC::XXLOR;
to:
    Opc = chooseVSXCopy(MBB, std::next(I), DestReg, SrcReg);

In conclusion, I'm removing the FIXME from the comment, because I believe that
there is, at least absent other examples, nothing to fix.

llvm-svn: 204591
2014-03-24 09:36:36 +00:00
Karthik Bhat 195e9dd91b Allow constant folding of ceil function whenever feasible
llvm-svn: 204583
2014-03-24 04:36:06 +00:00
Rafael Espindola 022bb76879 Propagate section from base to derived symbol.
We were already propagating the section in

a = b

With this patch we also propagate it for

a = b + 1

llvm-svn: 204581
2014-03-24 03:43:21 +00:00
Duncan P. N. Exon Smith d7d83477fa InstrProf: Silence spurious warnings in GCC 4.8
No functionality change.

llvm-svn: 204580
2014-03-24 00:47:18 +00:00
Arnaud A. de Grandmaison 1182600f20 ARM: no need to update SplatBits as it is not used
llvm-svn: 204575
2014-03-23 21:14:32 +00:00
David Majnemer 9338984f57 WinCOFF: Add support for -ffunction-sections
This is a pretty straight forward translation for COFF, we just need to
stick the function in a COMDAT section marked as
IMAGE_COMDAT_SELECT_NODUPLICATES.

llvm-svn: 204565
2014-03-23 17:47:39 +00:00
Nuno Lopes 31617266ea remove a bunch of unused private methods
found with a smarter version of -Wunused-member-function that I'm playwing with.
Appologies in advance if I removed someone's WIP code.

 include/llvm/CodeGen/MachineSSAUpdater.h            |    1 
 include/llvm/IR/DebugInfo.h                         |    3 
 lib/CodeGen/MachineSSAUpdater.cpp                   |   10 --
 lib/CodeGen/PostRASchedulerList.cpp                 |    1 
 lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp    |   10 --
 lib/IR/DebugInfo.cpp                                |   12 --
 lib/MC/MCAsmStreamer.cpp                            |    2 
 lib/Support/YAMLParser.cpp                          |   39 ---------
 lib/TableGen/TGParser.cpp                           |   16 ---
 lib/TableGen/TGParser.h                             |    1 
 lib/Target/AArch64/AArch64TargetTransformInfo.cpp   |    9 --
 lib/Target/ARM/ARMCodeEmitter.cpp                   |   12 --
 lib/Target/ARM/ARMFastISel.cpp                      |   84 --------------------
 lib/Target/Mips/MipsCodeEmitter.cpp                 |   11 --
 lib/Target/Mips/MipsConstantIslandPass.cpp          |   12 --
 lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp              |   21 -----
 lib/Target/NVPTX/NVPTXISelDAGToDAG.h                |    2 
 lib/Target/PowerPC/PPCFastISel.cpp                  |    1 
 lib/Transforms/Instrumentation/AddressSanitizer.cpp |    2 
 lib/Transforms/Instrumentation/BoundsChecking.cpp   |    2 
 lib/Transforms/Instrumentation/MemorySanitizer.cpp  |    1 
 lib/Transforms/Scalar/LoopIdiomRecognize.cpp        |    8 -
 lib/Transforms/Scalar/SCCP.cpp                      |    1 
 utils/TableGen/CodeEmitterGen.cpp                   |    2 
 24 files changed, 2 insertions(+), 261 deletions(-)

llvm-svn: 204560
2014-03-23 17:09:26 +00:00
Hal Finkel 4a912250fa [PowerPC] Make use of VSX f64 <-> i64 conversion instructions
When VSX is available, these instructions should be used in preference to the
older variants that only have access to the scalar floating-point registers.

llvm-svn: 204559
2014-03-23 05:35:00 +00:00
Lang Hames 459b5dc39e Revert r204076 for now - it caused significant regressions in a number of
benchmarks.

<rdar://problem/16368461>

llvm-svn: 204558
2014-03-23 04:22:31 +00:00
Duncan P. N. Exon Smith 4680361d7c InstrProf: Check pointer size in raw profile
Since the profile can come from 32-bit machines, we need to check the
pointer size.  Change the magic number to facilitate this.

Adds tests for reading 32-bit and 64-bit binaries (both big- and
little-endian).  The tests write a binary using printf in RUN lines
(like raw-magic-but-no-header.test).  Assuming the bots don't complain,
this seems like a better way forward for testing RawInstrProfReader than
committing binary files.

<rdar://problem/16400648>

llvm-svn: 204557
2014-03-23 03:38:12 +00:00
Rafael Espindola a6e3a599d1 Propagate types from symbol to aliases.
This is similar, but not identical to what gas does. The logic in MC is to just
compute the symbol table after parsing the entire file. GAS is mixed, given

.type b, @object
a = b
b:
.type b, @function

It will propagate the change and make 'a' a function. Given

.type b, @object
b:
a = b
.type b, @function

the type of 'a' is still object.

Since we do the computation in the end, we produce a function in both cases.

llvm-svn: 204555
2014-03-23 03:33:20 +00:00
NAKAMURA Takumi d3415c2440 [CMake] LLVMProfileData: No need to add LINK_LIBS here. LLVMBuild should do.
llvm-svn: 204553
2014-03-23 01:23:36 +00:00
Craig Topper a9253267a9 Prune includes in ARM target.
llvm-svn: 204548
2014-03-22 23:51:00 +00:00
Saleem Abdulrasool 44419fc3cd ARM IAS: properly handle function entries in .thumb
When a label is parsed, check if there is type information available for the
label.  If so, check if the symbol is a function.  If the symbol is a function
and we are in thumb mode and no explicit thumb_func has been emitted, adjust the
symbol data to indicate that the function definition is a thumb function.

The application of this inferencing is improved value handling in the object
file (the required thumb bit is set on symbols which are thumb functions).  It
also helps improve compatibility with binutils.

The one complication that arises from this handling is the MCAsmStreamer.  The
default implementation of getOrCreateSymbolData in MCStreamer does not support
tracking the symbol data.  In order to support the semantics of thumb functions,
track symbol data in assembly streamer.  Although O(n) in number of labels in
the TU, this is already done in various other streamers and as such the memory
overhead is not a practical concern in this scenario.

llvm-svn: 204544
2014-03-22 19:26:18 +00:00
Hal Finkel 55805eb562 [PowerPC] Fix the VSX v2f64 return register
v2f64 values, like other 128-bit values, are returned under VSX in register
vs34 (Altivec register v2).

llvm-svn: 204543
2014-03-22 18:24:43 +00:00
Juergen Ributzka e474752f4c [Constant Hoisting] Erase dead cast instructions.
The cleanup code that removes dead cast instructions only removed them from the
basic block, but didn't delete them. This fix erases them now too.

llvm-svn: 204538
2014-03-22 01:49:30 +00:00
Juergen Ributzka e802d507b0 [Constant Hoisting] Fix multiple entries for the same basic block in PHI nodes.
A PHI node usually has only one value/basic block pair per incoming basic block.
In the case of a switch statement it is possible that a following PHI node may
have more than one such pair per incoming basic block. E.g.:
%0 = phi i64 [ 123456, %case2 ], [ 654321, %Entry ], [ 654321, %Entry ]
This is valid and the verfier doesn't complain, because both values are the
same.

Constant hoisting materializes the constant for each operand separately and the
value is still the same, but the variable names have changed. As a result the
verfier can't recognize anymore that they are the same value and complains.

This fix adds special update code for PHI node in constant hoisting to prevent
this corner case.

This fixes <rdar://problem/16394449>

llvm-svn: 204537
2014-03-22 01:49:27 +00:00
Andrea Di Biagio 5b0aacf1c7 [DAG] Fix an assertion failure caused by an invalid cast in method 'BuildVectorSDNode::isConstantSplat'
This patch renames method 'isConstantSplat' as 'getConstantSplatValue'
(mainly for consistency reasons), and rewrites its logic to ensure
that we always perform a legal 'cast<ConstantSDNode>'.

Added test shift-combine-crash.ll to verify that DAGCombiner no longer crashes with an assertion failure in the attempt to simplify a vector shift by a vector of all undef counts.

llvm-svn: 204536
2014-03-22 01:47:22 +00:00
Adrian Prantl ca2728ec22 Delete stale comment. Thanks, Eric!
llvm-svn: 204530
2014-03-21 22:58:25 +00:00
Adrian Prantl 78619f7171 Dwarf Debug: Remove some cargo-cult type uniquing. Scopes do not have
an ID, so this is a noop.
Thanks Manman for catching this!

llvm-svn: 204528
2014-03-21 22:16:32 +00:00
Rafael Espindola 66f96fe0cb Fix the value computation in
sym_a:
sym_d = sym_a + 1

This is the smallest fix I was able to extract from what got reverted in
r204203.

llvm-svn: 204527
2014-03-21 22:00:29 +00:00
Arnaud A. de Grandmaison c97727a492 Remove some dead assignements found by scan-build
llvm-svn: 204526
2014-03-21 21:54:46 +00:00
Manman Ren c935560568 Register allocator: add condition to hoist a spill to outer loop.
We make sure a spill is not hoisted to a hotter outer loop by adding
a condition. Hoist a spill to outer loop if there are multiple dependents
(it can be beneficial if more than one dependents are hoisted) or
if DepSV (the hoisting source) is hotter than SV (the hoisting destination).

rdar://16268194

llvm-svn: 204522
2014-03-21 21:46:24 +00:00
Argyrios Kyrtzidis 900e9a3da0 [Support] Follow up to r204426, for LockFileManager, make the given path absolute so relative paths are properly handled in both Windows and Unix.
llvm-svn: 204520
2014-03-21 21:45:07 +00:00
Duncan P. N. Exon Smith ae29f7a5ec InstrProf: Move constructor to the header
Fixes 80-column violation at the same time.

<rdar://problem/15950346>

llvm-svn: 204516
2014-03-21 20:59:19 +00:00
Duncan P. N. Exon Smith 745a2bf0b8 InstrProf: Change magic number to have non-text characters
Include non-text characters in the magic number so that text files can't
match.

<rdar://problem/15950346>

llvm-svn: 204513
2014-03-21 20:42:37 +00:00
Duncan P. N. Exon Smith 4c5b7cb1fc InstrProf: Use move semantics with unique_ptr
<rdar://problem/15950346>

llvm-svn: 204512
2014-03-21 20:42:34 +00:00
Duncan P. N. Exon Smith 09a67f45ee InstrProf: Detect magic numbers in a more scalable way
No functionality change.

<rdar://problem/15950346>

llvm-svn: 204511
2014-03-21 20:42:31 +00:00
Duncan P. N. Exon Smith 531bb481e2 InstrProf: Actually detect bad headers
<rdar://problem/15950346>

llvm-svn: 204510
2014-03-21 20:42:28 +00:00
Juergen Ributzka 838282ec3a [RuntimeDyld] Fix comment for previous commit (r204439)
llvm-svn: 204508
2014-03-21 20:38:46 +00:00
Juergen Ributzka 7608dc0441 [RuntimeDyld] clang-format files.
llvm-svn: 204507
2014-03-21 20:28:42 +00:00
David Blaikie 330ec978a6 DebugInfo: Omit DW_AT_addr_base from skeletal type units.
Type units have no addresses, so there's no need for DW_AT_addr_base.
This removes another relocation from every skeletal type unit and brings
LLVM's skeletal type units in line with GCC's (containing only
GNU_dwo_name (strp), comp_dir (strp), and GNU_pubnames (flag_present)).

Cary's got some ideas about using str_index in the .o file to reduce
those last two relocations (well, replace two relocations with one
relocation (pointing to the string index) and two indicies)

llvm-svn: 204506
2014-03-21 20:27:21 +00:00
Chad Rosier b7747e31ef [AArch64] Add SchedRW lists to NEON instructions.
Previously, only regular AArch64 instructions were annotated with SchedRW lists.
This patch does the same for NEON enabling these instructions to be scheduled by
the MIScheduler. Additionally, store operations are now modeled and a few
SchedRW lists were updated for bug fixes (e.g. multiple def operands).

Reviewers: apazos, mcrosier, atrick
Patch by Dave Estes <cestes@codeaurora.org>!

llvm-svn: 204505
2014-03-21 19:34:41 +00:00
Duncan P. N. Exon Smith 24b4b65339 InstrProf: Read raw binary profile in llvm-profdata
Read a raw binary profile that corresponds to a memory dump from the
runtime profile.

The test is a binary file generated from
cfe/trunk/test/Profile/c-general.c with the new compiler-rt runtime and
the matching text version of the input.  It includes instructions on how
to regenerate.

<rdar://problem/15950346>

llvm-svn: 204496
2014-03-21 18:26:05 +00:00
Justin Bogner 47b8768fc0 ProfileData: Avoid brace initialization, windows doesn't like it
llvm-svn: 204494
2014-03-21 18:22:16 +00:00
Matt Arsenault 8e2581b11e R600/SI: Move instruction patterns to scalar versions.
Some of them also had the pattern on both, so this removes the
duplication.

llvm-svn: 204492
2014-03-21 18:01:18 +00:00
Justin Bogner b9bd7f85a7 ProfileData: Introduce InstrProfWriter using the naive text format
This isn't a format we'll want to write out in practice, but moving it
to the writer library simplifies llvm-profdata and isolates it from
further changes to the format.

This also allows us to update the tests to not rely on the text output
format.

llvm-svn: 204489
2014-03-21 17:46:22 +00:00
Justin Bogner f8d791983c ProfileData: Introduce the InstrProfReader interface and a text reader
This introduces the ProfileData library and updates llvm-profdata to
use this library for reading profiles. InstrProfReader is an abstract
base class that will be subclassed for both the raw instrprof data
from compiler-rt and the efficient instrprof format that will be used
for PGO.

llvm-svn: 204482
2014-03-21 17:24:48 +00:00
Daniel Sanders f88a29e66a [mips] Correct lowering of VECTOR_SHUFFLE to VSHF.
Summary:
VECTOR_SHUFFLE concatenates the vectors in an vectorwise fashion.
  <0b00, 0b01> + <0b10, 0b11> -> <0b00, 0b01, 0b10, 0b11>
VSHF concatenates the vectors in a bitwise fashion:
  <0b00, 0b01> + <0b10, 0b11> ->
  0b0100       + 0b1110       -> 0b01001110
                                 <0b10, 0b11, 0b00, 0b01>
We must therefore swap the operands to get the correct result.

The test case that discovered the issue was MultiSource/Benchmarks/nbench.

Reviewers: matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D3142

llvm-svn: 204480
2014-03-21 16:56:51 +00:00
Tom Stellard 1583409e33 R600/SI: Handle MUBUF instructions in SIInstrInfo::moveToVALU()
llvm-svn: 204476
2014-03-21 15:51:57 +00:00
Tom Stellard e038720702 R600/SI: Handle S_MOV_B64 in SIInstrInfo::moveToVALU()
llvm-svn: 204475
2014-03-21 15:51:54 +00:00
Tom Stellard def38c567d R600/SI: Use SGPR_(32|64) reg clases when lowering SI_ADDR64_RSRC
The SReg_(32|64) register classes contain special registers in addition
to the numbered SGPRs.  This can lead to machine verifier errors when
these register classes are used as sub-registers for SReg_128, since
SReg_128 only uses the numbered SGPRs.

Replacing SReg_(32|64) with SGPR_(32|64) fixes this problem, since
the SGPR_(32|64) register classes contain only numbered SGPRs.

Tests cases for this are comming in a later commit.

llvm-svn: 204474
2014-03-21 15:51:53 +00:00
Tom Stellard edfd81d965 Sink: Don't sink static allocas from the entry block
CodeGen treats allocas outside the entry block as dynamically sized
stack objects.

llvm-svn: 204473
2014-03-21 15:51:51 +00:00
Richard Sandiford 5676585886 [SystemZ] Use "let Predicates =" for blocks of new instructions
...instead of a separate Requires for each one.  This style was already
used in some places and seems more compact.

No behavioral change intended.

llvm-svn: 204452
2014-03-21 11:04:54 +00:00
Richard Sandiford dc6c2c953d [SystemZ] Add support for z196 float<->unsigned conversions
These complement the older float<->signed instructions.

llvm-svn: 204451
2014-03-21 10:56:30 +00:00
Matheus Almeida 518b4f9fcf [mips] Update namespace.
We should be using the llvm namespace and not an anonymous namespace
in a header file.

llvm-svn: 204450
2014-03-21 10:35:14 +00:00
Juergen Ributzka 046709f06b [RuntimeDyld] Allow processRelocationRef to process more than one relocation entry at a time.
Some targets require more than one relocation entry to perform a relocation.
This change allows processRelocationRef to process more than one relocation
entry at a time by passing the relocation iterator itself instead of just
the relocation entry.

Related to <rdar://problem/16199095>

llvm-svn: 204439
2014-03-21 07:26:41 +00:00
Juergen Ributzka f0dff49ad0 [Constant Hoisting] Make the constant materialization cost operand dependent
Extend the target hook to take also the operand index into account when
calculating the cost of the constant materialization.

Related to <rdar://problem/16381500>

llvm-svn: 204435
2014-03-21 06:04:45 +00:00
Juergen Ributzka 500abd48d1 [Constant Hoisting] Lazily compute the idom and cache the result.
Related to <rdar://problem/16381500>

llvm-svn: 204434
2014-03-21 06:04:39 +00:00
Juergen Ributzka 5429c06b90 [Constant Hoisting] Change the algorithm to only track constants for instructions.
Originally the algorithm would search for expensive constants and track their
users, which could be instructions and constant expressions. This change only
tracks the constants for instructions, but constant expressions are indirectly
covered too. If an operand is an constant expression, then we look through the
expression to find anny expensive constants.

The algorithm keep now track of the instruction and the operand index where the
constant is used. This allows more precise hoisting of constant materialization
code for PHI instructions, because we only hoist to the basic block of the
incoming operand. Before we had to find the idom of all PHI operands and hoist
the materialization code there.

This also makes updating of instructions easier. Before we had to keep track of
the original constant, find it in the instructions, and then replace it. Now we
can just simply update the operand.

Related to <rdar://problem/16381500>

llvm-svn: 204433
2014-03-21 06:04:36 +00:00
Juergen Ributzka b8489b3167 [Constant Hoisting] Fix capitalization of function names.
llvm-svn: 204432
2014-03-21 06:04:33 +00:00
Juergen Ributzka a29a5b8475 [Constant Hoisting] Replace the MapVector with a separate Map and Vector to keep track of constant candidates.
This simplifies working with the constant candidates and removes the tight
coupling between the map and the vector.

Related to <rdar://problem/16381500>

llvm-svn: 204431
2014-03-21 06:04:30 +00:00
Saleem Abdulrasool 7f2f9f402c MCParser: add an assertion
Add an assertion that the section is not NULL.  Potential NULL pointer
dereference identified by clang static analyzer.

llvm-svn: 204429
2014-03-21 05:13:23 +00:00
Jiangning Liu db55b02e1c This reverts commit r203762, "ARM: support emission of complex SO expressions".
The commit r203762 introduced silent failure for complext SO expression, and it's even worse than compiler crash.

llvm-svn: 204427
2014-03-21 02:51:01 +00:00
Argyrios Kyrtzidis 531a5be4d0 [Support] Make sure LockFileManager works correctly with relative paths.
llvm-svn: 204426
2014-03-21 02:31:56 +00:00
Kevin Qin 275ce91243 Fix an assertion caused by using inline asm with indirect register inputs.
llvm-svn: 204425
2014-03-21 02:14:50 +00:00
Kevin Qin b2c78b07d6 [AArch64] Remove .data_region directive from AArch64.
.data_region is only used in Darwin, so it shouldn't be generated
for other OS. Currently AArch64 doesn't support darwin yet, so
I removed it from AArch64. When Darwin is supported someday, we can
add it back and associate it with Darwin.

llvm-svn: 204424
2014-03-21 02:12:48 +00:00
Argyrios Kyrtzidis 3757569318 [Support] Make sure sys::fs::remove can remove symbolic links and make sure LockFileManager can handle a symbolic link that points nowhere.
llvm-svn: 204422
2014-03-21 01:25:37 +00:00
Rui Ueyama 827c8a2b07 Object/COFF: Support large relocation table.
NumberOfRelocations field in COFF section table is only 16-bit wide. If an
object has more than 65535 relocations, the number of relocations is stored
to VirtualAddress field in the first relocation field, and a special flag
(IMAGE_SCN_LNK_NRELOC_OVFL) is set to Characteristics field.

In test we cheated a bit. I made up a test file so that it has
IMAGE_SCN_LNK_NRELOC_OVFL flag but the number of relocations is much smaller
than 65535. This is to avoid checking in a large test file just to test a
file with many relocations.

Differential Revision: http://llvm-reviews.chandlerc.com/D3139

llvm-svn: 204418
2014-03-21 00:44:19 +00:00
Weiming Zhao 0152485679 Fix PR19136: [ARM] Fix Folding SP Update into vpush/vpop
Sicne MBB->computeRegisterLivenes() returns Dead for sub regs like s0,
d0 is used in vpop instead of updating sp, which causes s0 dead before
its use.

This patch checks the liveness of each subreg to make sure the reg is
actually dead.

llvm-svn: 204411
2014-03-20 23:28:16 +00:00
Rafael Espindola 98629c4e4d Don't use EmitAbsValue with symbol references.
The function exists to force an expression to be absolute, but there it is not
possible to force a symbol reference since

a = b
.long a

means something else.

This is an alternative fix for pr9951 that uses an assert. It then deletes
the old pr9951 test that was testing nothing already.

llvm-svn: 204399
2014-03-20 21:26:38 +00:00
Lang Hames 868d4b3122 Add an option to MCJIT to have it forward all sections to the
RTDyldMemoryManager, regardless of whether it thinks they're "required for
execution".

Currently, RuntimeDyld only passes sections that are "required for execution"
to the RTDyldMemoryManager, and takes "required for execution" to mean exactly
"contains symbols or relocations". There are two problems with this:
(1) It can drop sections with anonymous data that is referenced by code.
(2) It leaves the JIT client no way to inspect interesting sections that aren't
    actually required to run the program (e.g dwarf sections).

A test case is still in the works.

Future work: We may want to replace this with a generic section filtering
mechanism, but that will require more consideration. For now, this flag at least
allows clients to volunteer to do the filtering themselves.

Fixes <rdar://problem/15177691>.

llvm-svn: 204398
2014-03-20 21:06:46 +00:00
Juergen Ributzka 46357931ab Revert "[Constant Hoisting] Extend coverage of the constant hoisting pass."
I will break this up into smaller pieces for review and recommit.

llvm-svn: 204393
2014-03-20 20:17:13 +00:00
Juergen Ributzka 6dab520c70 [Constant Hoisting] Extend coverage of the constant hoisting pass.
This commit extends the coverage of the constant hoisting pass, adds additonal
debug output and updates the function names according to the style guide.

Related to <rdar://problem/16381500>

llvm-svn: 204389
2014-03-20 19:55:52 +00:00
Mark Seaborn b6118c5b17 Remove LowerInvoke's obsolete "-enable-correct-eh-support" option
This option caused LowerInvoke to generate code using SJLJ-based
exception handling, but there is no code left that interprets the
jmp_buf stack that the resulting code maintained (llvm.sjljeh.jblist).
This option has been obsolete for a while, and replaced by
SjLjEHPrepare.

This leaves the default behaviour of LowerInvoke, which is to convert
invokes to calls.

Differential Revision: http://llvm-reviews.chandlerc.com/D3136

llvm-svn: 204388
2014-03-20 19:54:47 +00:00
Eric Christopher 47f2be8847 Typo.
llvm-svn: 204378
2014-03-20 19:16:20 +00:00
Eric Christopher 384f3feb2d Reapply DW_AT_low/high_pc patch:
Use the range machinery for DW_AT_ranges and DW_AT_high/lo_pc.

    This commit moves us from a single range per subprogram to extending
    ranges if we are:

    a) In the same section, and
    b) In the same enclosing CU.

    This means we have more fine grained ranges for compile units, and fewer
    ranges overall when we have multiple functions in the same CU
    adjacent to each other in the object file.

    Also remove all of the earlier hacks around this functionality for
    function sections etc. Also update all of the testcases to take into
    account the merging functionality.

with a fix for location entries in the debug_loc section:

Make sure that debug loc entries are relative to the low_pc
of the compile unit. This means that when we only have a single
range that the offset should be just relative to the low_pc
of the unit, for multiple ranges for a CU this means that we'll be
relative to 0 which we emit along with DW_AT_ranges.

This mostly shows up with linked binaries, so add a testcase with
multiple CUs so that our location is going to be offset of a CU
with a non-zero low_pc.

llvm-svn: 204377
2014-03-20 19:16:16 +00:00
Rafael Espindola 2006306f53 Remove dead and incorrect code.
is_symlink was always false since it was using stat instead of lstat.

llvm-svn: 204361
2014-03-20 17:39:04 +00:00
David Blaikie 7ac51493d6 Add comments from Eric's review of r204094.
llvm-svn: 204358
2014-03-20 17:05:45 +00:00
Matt Arsenault 99395fa98f R600: Remove unused method declaration.
llvm-svn: 204357
2014-03-20 16:41:06 +00:00
Kai Nacke 93fe5e810d [MIPS] Add cpu octeon and some instructions
The Octeon cpu from Cavium Networks is mips64r2 based and has an extended
instruction set. In order to utilize this with LLVM, a new cpu feature "octeon"
and a subtarget feature "cnmips" is added. A small set of new instructions
(baddu, dmul, pop, dpop, seq, sne) is also added. LLVM generates dmul, pop and
dpop instructions with option -mcpu=octeon or -mattr=+cnmips.

llvm-svn: 204337
2014-03-20 11:51:58 +00:00
Alexander Potapenko 04969e8b31 [ASan] Do not instrument globals from the llvm.metadata section.
Fixes https://code.google.com/p/address-sanitizer/issues/detail?id=279.

llvm-svn: 204331
2014-03-20 10:48:34 +00:00
Zoran Jovanovic a0f5328984 Provide an operand for microMIPS wait instruction.
llvm-svn: 204329
2014-03-20 10:41:37 +00:00
Zoran Jovanovic 87d13e5ec1 Implementation of microMIPS 16-bit instructions MOVE and JALR.
Differential Revision: http://llvm-reviews.chandlerc.com/D3112

llvm-svn: 204325
2014-03-20 10:18:24 +00:00
Zoran Jovanovic 28221d8bc1 Mark alias symbols as microMIPS if necessary. Differential Revision: http://llvm-reviews.chandlerc.com/D3080
llvm-svn: 204323
2014-03-20 09:44:49 +00:00
Matheus Almeida 9e1450bce9 [mips] Splitting up class definition from implementation.
Also removed some unnecessary #includes.

No functional changes.

llvm-svn: 204320
2014-03-20 09:29:54 +00:00
Alexey Samsonov 94bc422d7a Add llvm_unreachable after fully-covered switches to appease GCC
llvm-svn: 204318
2014-03-20 07:30:40 +00:00
David Majnemer d9eb2d1401 Object: Don't double-escape empty hexdata
We would emit a pair of double quotes inside a pair of single quotes.
Just use a pair of single quotes.

llvm-svn: 204312
2014-03-20 06:28:52 +00:00
Saleem Abdulrasool 39f773f939 Reapply 'ARM IAS: support .thumb_set'
Re-apply the change after it was reverted to do conflicts due to another change
being reverted.

llvm-svn: 204306
2014-03-20 06:05:33 +00:00
Craig Topper 38afbfdd76 [X86] Check return value of readSIB in disassembler so errors propagate. In particular this makes a too short instruction with a missing SIB byte fail.
llvm-svn: 204305
2014-03-20 05:56:00 +00:00
Hao Liu 40b5ab8e5b [ARM]Fix an assertion failure in A15SDOptimizer about DPair reg class by treating DPair as QPR.
llvm-svn: 204304
2014-03-20 05:36:59 +00:00
Rafael Espindola 7fadc0ea7d Look through variables when computing relocations.
Given

bar = foo + 4
	.long bar

MC would eat the 4. GNU as includes it in the relocation. The rule seems to be
that a variable that defines a symbol is used in the relocation and one that
does not define a symbol is evaluated and the result included in the relocation.

Fixing this unfortunately required some other changes:

* Since the variable is now evaluated, it would prevent the ELF writer from
  noticing the weakref marker the elf streamer uses. This patch then replaces
  that with a VariantKind in MCSymbolRefExpr.

* Using VariantKind then requires us to look past other VariantKind to see

	.weakref	bar,foo
	call	bar@PLT

  doing this also fixes

	zed = foo +2
	call zed@PLT

  so that is a good thing.

* Looking past VariantKind means that the relocation selection has to use
  the fixup instead of the target.

This is a reboot of the previous fixes for MC. I will watch the sanitizer
buildbot and wait for a build before adding back the previous fixes.

llvm-svn: 204294
2014-03-20 02:12:01 +00:00
Eric Christopher e9551ec1a0 Revert "Use the range machinery for DW_AT_ranges and DW_AT_high/lo_pc."
This appears to trigger failures with optimization and function arguments somehow.

This reverts commit r204277.

llvm-svn: 204286
2014-03-20 00:12:06 +00:00
Eric Christopher e33c990616 Use the range machinery for DW_AT_ranges and DW_AT_high/lo_pc.
This commit moves us from a single range per subprogram to extending
ranges if we are:

a) In the same section, and
b) In the same enclosing CU.

This means we have more fine grained ranges for compile units, and fewer
ranges overall when we have multiple functions in the same CU
adjacent to each other in the object file.

Also remove all of the earlier hacks around this functionality for
function sections etc. Also update all of the testcases to take into
account the merging functionality.

llvm-svn: 204277
2014-03-19 22:42:36 +00:00
Matt Arsenault dd78b8059b R600/SI: Add unused LDS 2 form instructions.
llvm-svn: 204275
2014-03-19 22:19:56 +00:00
Matt Arsenault d06ebd93e6 R600/SI: Add support for 64-bit LDS writes
llvm-svn: 204274
2014-03-19 22:19:54 +00:00
Matt Arsenault b943348cb9 R600/SI: Add support for 64-bit LDS loads.
v2:
  -Use correct opcode for DS_READ_64

llvm-svn: 204273
2014-03-19 22:19:52 +00:00
Matt Arsenault 99ed78926b R600/SI: Match i16 immediate offset of LDS instructions.
llvm-svn: 204272
2014-03-19 22:19:49 +00:00
Matt Arsenault 547aff20f5 R600/SI: Don't display the GDS bit.
It isn't actually used now, and probably never will be, plus it makes
tests less annoying. I also think SC prints GDS instructions as a
separate instruction name.

llvm-svn: 204270
2014-03-19 22:19:43 +00:00
Matt Arsenault 9cd8c38a32 R600/SI: Merge offset0 and offset1 fields for single address DS instructions v2
Also remove unused data fields from the DS_Load_Helper class.

v2:
  - Merge fields for DS_WRITE

llvm-svn: 204269
2014-03-19 22:19:39 +00:00
Hans Wennborg f88287fd7a Fix comment (PR19188)
llvm-svn: 204256
2014-03-19 18:41:38 +00:00
Matheus Almeida c11f305082 [mips] 80-column.
llvm-svn: 204252
2014-03-19 16:29:06 +00:00
Evgeniy Stepanov 2275a01a44 Set debug info for instructions inserted in SplitBlockAndInsertIfThen.
llvm-svn: 204230
2014-03-19 12:56:38 +00:00
Craig Topper c6d4efa1e5 Prune includes in X86 target.
llvm-svn: 204216
2014-03-19 06:53:25 +00:00
David Majnemer ddf28f2b79 Object: Provide a richer means of describing auxiliary symbols
The current state of affairs has auxiliary symbols described as a big
bag of bytes. This is less than satisfying, it detracts from the YAML
file as being human readable.

Instead, allow for symbols to optionally contain their auxiliary data.
This allows us to have a much higher level way of describing things like
weak symbols, function definitions and section definitions.

This depends on D3105.

Differential Revision: http://llvm-reviews.chandlerc.com/D3092

llvm-svn: 204214
2014-03-19 04:47:47 +00:00
Rafael Espindola 7bbd5c2636 Revert "Add back r203962, r204028 and r204059."
This reverts commit r204178.

llvm-svn: 204203
2014-03-19 00:13:43 +00:00
David Blaikie 47f4b82d8b DebugInfo: Use the comp_dir of the referencing type units when building debug_line.dwo
This isn't a complete fix - it falls back to non-comp_dir when multiple
compile units are in play. Adding a map of comp_dir to table is part of
the more general solution, but I gave up (in the short term) when I
realized I'd also have to calculate the size of each type unit so as to
produce correct DW_AT_stmt_list attributes.

llvm-svn: 204202
2014-03-19 00:11:28 +00:00
Rui Ueyama f078eff39c Object/COFF: Add function to check if section number is reserved one.
Differential Revision: http://llvm-reviews.chandlerc.com/D3103

llvm-svn: 204199
2014-03-18 23:37:53 +00:00
Duncan P. N. Exon Smith cb1c81afa0 Fix use_iterator crash in ObjCArc from r203364
The use_iterator redesign in r203364 introduced an increment past the
end of a range in -objc-arc-contract.  Added an explicit check for the
end of the range.

<rdar://problem/16333235>

llvm-svn: 204195
2014-03-18 22:32:43 +00:00
Jim Grosbach 319026d148 Tidy up. Update per naming conventions.
No functional change.

llvm-svn: 204192
2014-03-18 22:09:10 +00:00
Jim Grosbach eaf6036fb2 MachO: Emit a version-min load command when possible.
When deployment target version information is available, emit it to the
target streamer for inclusion in the object file.

rdar://11337778

llvm-svn: 204191
2014-03-18 22:09:08 +00:00
Jim Grosbach 448334a738 Darwin: Add assembler directives to create version-min load commands.
Allow object files to be tagged with a version-min load command for iOS
or MacOSX.

Teach macho-dump to understand the version-min load commands for
testcases.

rdar://11337778

llvm-svn: 204190
2014-03-18 22:09:05 +00:00
Chandler Carruth 4c5001cc9c [LV] While I'm here, use range based for loops which are so much cleaner
for this kind of walk.

llvm-svn: 204188
2014-03-18 22:00:32 +00:00
Chandler Carruth ae324439d0 [LV] The actual change I intended to commit in r204148. Sorry for the
noise.

Original commit log:
Replace some dead code with an assert. When I first ported this pass
from a loop pass to a function pass I did so in the naive, recursive
way. It doesn't actually work, we need a worklist instead. When
I switched to the worklist I didn't delete the naive recursion. That
recursion was also buggy because it was dead and never really exercised.

llvm-svn: 204187
2014-03-18 21:58:38 +00:00
Chandler Carruth f73079ca89 [LV] Replace some dead code with an assert. When I first ported this
pass from a loop pass to a function pass I did so in the naive,
recursive way. It doesn't actually work, we need a worklist instead.
When I switched to the worklist I didn't delete the naive recursion.
That recursion was also buggy because it was dead and never really
exercised.

llvm-svn: 204184
2014-03-18 21:51:46 +00:00
Eric Christopher 11f806740d More header and forward declaration cleanup.
llvm-svn: 204183
2014-03-18 21:44:12 +00:00
Eric Christopher acbe42badd Add back the headers we're getting via (likely) transitive includes.
We really do use these things in the header.

llvm-svn: 204180
2014-03-18 20:58:35 +00:00
Rafael Espindola 574bfa12fa Add back r203962, r204028 and r204059.
This reverts commit r204137.

This includes a fix for handling aliases of aliases.

llvm-svn: 204178
2014-03-18 20:40:38 +00:00
Eric Christopher c0bd5f8256 Fix for coding style.
llvm-svn: 204177
2014-03-18 20:39:54 +00:00
Eric Christopher ce4a9445ec Remove a bunch of unnecessary includes and forward declarations.
llvm-svn: 204176
2014-03-18 20:37:10 +00:00
Hans Wennborg aec21ce43e X86 memcpy lowering: use "rep movs" even when esi is used as base pointer
For functions where esi is used as base pointer, we would previously fall back
from lowering memcpy with "rep movs" because that clobbers esi.

With this patch, we just store esi in another physical register, and restore
it afterwards. This adds a little bit of register preassure, but the more
efficient memcpy should be worth it.

Differential Revision: http://llvm-reviews.chandlerc.com/D2968

llvm-svn: 204174
2014-03-18 20:04:34 +00:00
Raul E. Silvera a9dafe6793 Add support for scalarizing/splitting vector bswap.
Summary:
  SLP Vectorization of intrinsics (r203707) has exposed cases where the
  expansion of vector bswap is failing (PR19151).

Reviewers: hfinkel

CC: chandlerc

Differential Revision: http://llvm-reviews.chandlerc.com/D3104

llvm-svn: 204163
2014-03-18 17:49:12 +00:00
Adrian Prantl d486b343a0 Debug info: Remove OdrMemberMap from DwarfDebug, it's not necessary.
Follow-up to r203982.

llvm-svn: 204162
2014-03-18 17:41:15 +00:00
Michael Zolotukhin ed0a7761e5 Add stride normalization to SCEV Normalize/Denormalize transformation.
llvm-svn: 204161
2014-03-18 17:34:03 +00:00
Andrea Di Biagio 28f46d9f39 [DAGCombiner] teach how to simplify xor/and/or nodes according to the following rules:
1)  (AND (shuf (A, C, Mask), shuf (B, C, Mask)) -> shuf (AND (A, B), C, Mask)
 2)  (OR  (shuf (A, C, Mask), shuf (B, C, Mask)) -> shuf (OR  (A, B), C, Mask)
 3)  (XOR (shuf (A, C, Mask), shuf (B, C, Mask)) -> shuf (XOR (A, B), V_0, Mask)

 4)  (AND (shuf (C, A, Mask), shuf (C, B, Mask)) -> shuf (C, AND (A, B), Mask)
 5)  (OR  (shuf (C, A, Mask), shuf (C, B, Mask)) -> shuf (C, OR  (A, B), Mask)
 6)  (XOR (shuf (C, A, Mask), shuf (C, B, Mask)) -> shuf (V_0, XOR (A, B), Mask)

llvm-svn: 204160
2014-03-18 17:12:59 +00:00
Manuel Jacob dcb78dbc82 X86: Use enums for memory operand decoding instead of integer literals.
Summary:
X86BaseInfo.h defines an enum for the offset of each operand in a memory operand
sequence.  Some code uses it and some does not.  This patch replaces (hopefully)
all remaining locations where an integer literal was used instead of this enum.
No functionality change intended.

Reviewers: nadav

CC: llvm-commits, t.p.northover

Differential Revision: http://llvm-reviews.chandlerc.com/D3108

llvm-svn: 204158
2014-03-18 16:14:11 +00:00
Krzysztof Parzyszek 4d38c82575 Enable CFI on Hexagon.
llvm-svn: 204157
2014-03-18 16:02:37 +00:00
Bill Schmidt ff9622ef0e Fix PR19144: Incorrect offset generated for int-to-fp conversion at -O0.
When converting a signed 32-bit integer to double-precision floating point on
hardware without a lfiwax instruction, we have to instead use a lfd followed
by fcfid.  We were erroneously offsetting the address by 4 bytes in
preparation for either a lfiwax or lfiwzx when generating the lfd.  This fixes
that silly error.

This was not caught in the test suite since the conversion tests were run with
-mcpu=pwr7, which implies availability of lfiwax.  I've added another test
case for older hardware that checks the code we expect in the absence of
lfiwax and other flavors of fcfid.  There are fewer tests in this test case
because we punt to DAG selection in more cases on older hardware.  (We must
generate complex fiddly sequences in those cases, and there is marginal
benefit in duplicating that logic in fast-isel.)

llvm-svn: 204155
2014-03-18 14:32:50 +00:00
Evgeniy Stepanov 302964ee92 [msan] Origin tracking with history.
LLVM part of MSan implementation of advanced origin tracking,
when we record not only creation point, but all locations where
an uninitialized value was stored to memory, too.

llvm-svn: 204151
2014-03-18 13:30:56 +00:00
Diego Novillo 213bb00245 Tolerate unmangled names in sample profiles.
Summary:
The compiler does not always generate linkage names. If a function
has been inlined and its body elided, its linkage name may not be
generated.

When the binary executes, the profiler will use its unmangled name
when attributing samples. This results in unmangled names in the
input profile.

We are currently failing hard when this happens. However, in this case
all that happens is that we fail to attribute samples to the inlined
function. While this means fewer optimization opportunities, it should
not cause a compilation failure.

This patch accepts all valid function names, regardless of whether
they were mangled or not.

Reviewers: chandlerc

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D3087

llvm-svn: 204142
2014-03-18 12:03:12 +00:00
Alexander Kornienko 64de613751 Revert r203962 and two revisions depending on it: r204028 and r204059.
The revision I'm reverting breaks handling of transitive aliases. This blocks us
and breaks sanitizer bootstrap:
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-bootstrap/builds/2651
(and checked locally by Alexey).

This revision is the result of:

  svn merge -r204059:204058 -r204028:204027 -r203962:203961 .

+ the regression test added to test/MC/ELF/alias.s

Another way to reproduce the regression with clang:
  $ cat q.c
  void a1();
  void a2() __attribute__((alias("a1")));
  void a3() __attribute__((alias("a2")));
  void a1() {}

  $ ~/work/llvm-build/bin/clang-3.5-good -c q.c && mv q.o good.o && \
      ~/work/llvm-build/bin/clang-3.5-bad -c q.c && mv q.o bad.o && \
      objdump -t good.o bad.o

    good.o:     file format elf64-x86-64

    SYMBOL TABLE:
    0000000000000000 l    df *ABS*  0000000000000000 q.c
    0000000000000000 l    d  .text  0000000000000000 .text
    0000000000000000 l    d  .data  0000000000000000 .data
    0000000000000000 l    d  .bss   0000000000000000 .bss
    0000000000000000 l    d  .comment       0000000000000000 .comment
    0000000000000000 l    d  .note.GNU-stack        0000000000000000 .note.GNU-stack
    0000000000000000 l    d  .eh_frame      0000000000000000 .eh_frame
    0000000000000000 g     F .text  0000000000000006 a1
    0000000000000000 g     F .text  0000000000000006 a2
    0000000000000000 g     F .text  0000000000000006 a3



    bad.o:     file format elf64-x86-64

    SYMBOL TABLE:
    0000000000000000 l    df *ABS*  0000000000000000 q.c
    0000000000000000 l    d  .text  0000000000000000 .text
    0000000000000000 l    d  .data  0000000000000000 .data
    0000000000000000 l    d  .bss   0000000000000000 .bss
    0000000000000000 l    d  .comment       0000000000000000 .comment
    0000000000000000 l    d  .note.GNU-stack        0000000000000000 .note.GNU-stack
    0000000000000000 l    d  .eh_frame      0000000000000000 .eh_frame
    0000000000000000 g     F .text  0000000000000006 a1
    0000000000000000 g     F .text  0000000000000006 a2
    0000000000000000 g       .text  0000000000000000 a3

llvm-svn: 204137
2014-03-18 10:36:11 +00:00
Evgeniy Stepanov 2aac07349d [msan] Kill -msan-store-clean-origin flag.
Not only is it slower than the alternative, but also subtly broken.
This commit does not change the default behavior.

llvm-svn: 204131
2014-03-18 09:47:06 +00:00
Alon Mishne ad312155a6 [C++11] Change DebugInfoFinder to use range-based loops
Also changes the iterators to return actual DI type over MDNode.

llvm-svn: 204130
2014-03-18 09:41:07 +00:00
Evgeniy Stepanov dba42d6652 [msan] Remove unused code.
llvm-svn: 204125
2014-03-18 08:29:42 +00:00
Craig Topper 26696314d5 [C++11] Mark the target fast isel classes as 'final' so that the compiler can de-virtualize some of the internal calls.
llvm-svn: 204123
2014-03-18 07:27:13 +00:00
Alexey Samsonov 27dc839406 [C++11] Change the interface of getCOFF{Section,Relocation,Symbol} to make it work with range-based for loops.
Reviewers: ruiu

Reviewed By: ruiu

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D3097

llvm-svn: 204120
2014-03-18 06:53:02 +00:00
Saleem Abdulrasool 42b233a836 ARM: add an assertion
Add an assertion that a valid section is referenced.  The potential NULL pointer
dereference was identified by the clang static analyzer.

llvm-svn: 204114
2014-03-18 05:26:55 +00:00
Adrian Prantl 0aa1aa2e9d DwarfDebug: Only unique retained types instead of all types.
This is a follow-up to r203983 based on feedback from dblaikie and mren (Thanks!)
No functionality change.

llvm-svn: 204107
2014-03-18 02:35:03 +00:00
Adrian Prantl 1a1647cab6 Switch the type field in DIVariable and DIGlobalVariable over to DITypeRefs.
This allows us to catch more opportunities for ODR-based type uniquing
during LTO.
Paired commit with CFE which updates some testcases to verify the new
DIBuilder behavior.

llvm-svn: 204106
2014-03-18 02:34:58 +00:00
Adrian Prantl 702bf5a9d9 Replace unnecessary #include directive with forward declarations.
llvm-svn: 204104
2014-03-18 02:34:52 +00:00
Eric Christopher 089793b39e Add explanatory comment.
llvm-svn: 204103
2014-03-18 02:18:27 +00:00
Eric Christopher 05135fb468 Shorten DotDebugLocEntry to just DebugLocEntry and reformat.
No functional change.

llvm-svn: 204102
2014-03-18 02:18:24 +00:00
David Blaikie 8287aff1cc DebugInfo: Avoid emitting standard opcode lengths in debug_line.dwo headers where opcodes are never used anyway
Introduce a slightly tighter wrapper around the header structure that
handles this use case. (MCDwarfDwoLineTable)

llvm-svn: 204101
2014-03-18 02:13:23 +00:00
David Blaikie 4a2f95f60e DebugInfo: Implement debug_line.dwo for file names used in type units during -gsplit-dwarf
This removes an attribute (and more importantly, a relocation) from
skeleton type units and removes some unnecessary file names from the
debug_line section that remains in the .o (and linked executable) file.

There's still a few places we could shave off some more space here:

* use compilation dir of the underlying compilation unit (since all the
  type units share that compilation dir - though this would be more
  complicated in LTO cases where they don't (keep a map of compilation
  dir->line table header?))

* Remove some of the unnecessary header fields from the line table since
  they're not needed in this situation (about 12 bytes per table).

llvm-svn: 204099
2014-03-18 01:17:26 +00:00
David Blaikie e05274d7d9 DebugInfo: Do not rely on the compilation dir (index 0) for files in line tables shared between compilation units
When emitting assembly there's no support for emitting separate line
tables for each compilation unit - so LLVM emits .loc directives
producing a single line table.

Line tables have an implicit directory (index 0) equal to the
compilation directory (DW_AT_comp_dir) of the compilation unit that
references them.

If multiple compilation units (with possibly disparate compilation
directories) reference the same line table, we must avoid relying on
this ambiguous directory.

Achieve this my simply not setting the compilation directory on the line
table when we're in this situation (multiple units while emitting
assembly).

llvm-svn: 204094
2014-03-18 00:11:48 +00:00
David Blaikie 0e8d401c53 DebugInfo: Move getOrCreateSourceID from DwarfDebug to DwarfCompileUnit
We still do a few lookups into the line table mapping in MCContext that
could be factored out into a single lookup (rather than looking it up
once for the table label, once to set the compilation unit, once for
each time we need a file ID, etc... ) but assembly output complicates
that somewhat as we still need a virtual dispatch back to the
MCAsmStreamer in that case.

llvm-svn: 204092
2014-03-17 23:53:25 +00:00
David Blaikie c7f29dc068 DebugInfo: Move line table zero-directory-index (compilation dir) handling into MCDwarf
Our handling of compilation directory in DwarfDebug was broken
(incorrectly using the 'last' compilation directory (that of the last
CU in the metadata list) for all function emission in any CU). By moving
this handling down into MCDwarf the issue is fixed as the compilation
dir is tracked correctly per line table.

llvm-svn: 204089
2014-03-17 23:29:40 +00:00
Matt Arsenault f45faaf30d Make methods static
llvm-svn: 204085
2014-03-17 22:23:09 +00:00
Dan Gohman 172c5d3451 Use range metadata instead of introducing selects.
When GlobalOpt has determined that a GlobalVariable only ever has two values,
it would convert the GlobalVariable to a boolean, and introduce SelectInsts
at every load, to choose between the two possible values. These SelectInsts
introduce overhead and other unpleasantness.

This patch makes GlobalOpt just add range metadata to loads from such
GlobalVariables instead. This enables the same main optimization (as seen in
test/Transforms/GlobalOpt/integer-bool.ll), without introducing selects.

The main downside is that it doesn't get the memory savings of shrinking such
GlobalVariables, but this is expected to be negligible.

llvm-svn: 204076
2014-03-17 19:57:04 +00:00
Owen Anderson b36376efcb Switch a number of loops in lib/CodeGen over to range-based for-loops, now that
the MachineRegisterInfo iterators are compatible with it.

llvm-svn: 204075
2014-03-17 19:36:09 +00:00
Matt Arsenault fae02989b7 R600: Match sign_extend_inreg to BFE instructions
llvm-svn: 204072
2014-03-17 18:58:11 +00:00
Matt Arsenault 985b9de485 Make DAGCombiner work on vector bitshifts with constant splat vectors.
llvm-svn: 204071
2014-03-17 18:58:01 +00:00
David Blaikie c2df16b6d3 DebugInfo: Use MC line table file entry uniquing for non-asm input as well.
See r204027 for the precursor to this that applied to asm debug info.

This required some non-obvious API changes to handle the case of asm
output (we never go asm->asm so this didn't come up in r204027): the
modification of the file/directory name by MCDwarfLineTableHeader needed
to be reflected in the MCAsmStreamer caller so it could print the
appropriate .file directive, so those StringRef parameters are now
non-const ref (in/out) parameters rather than just const.

llvm-svn: 204069
2014-03-17 18:13:58 +00:00
Adam Nemet 8a130a5f86 [X86] Fix unused variable warning with NDEBUG from r204058
llvm-svn: 204063
2014-03-17 17:32:53 +00:00
Saleem Abdulrasool 3f44cd7926 MC: change runtime check to an assertion
It is unclear how it would be possible to get M to be NULL in normal scenarios.
Change this to an assert rather than a runtime check as per dblakie's
suggestion.

llvm-svn: 204060
2014-03-17 17:13:57 +00:00
Saleem Abdulrasool 11543a9953 ARM IAS: support .thumb_set
This performs the equivalent of a .set directive in that it creates a symbol
which is an alias for another symbol or value which may possibly be yet
undefined.  This directive also has the added property in that it marks the
aliased symbol as being a thumb function entry point, in the same way that the
.thumb_func directive does.

The current implementation fails one test due to an unrelated issue.  Functions
within .thumb sections are not marked as thumb_func.  The result is that
the aliasee function is not valued correctly.

llvm-svn: 204059
2014-03-17 17:13:54 +00:00
Adam Nemet 24381f1cb7 [VectorLegalizer/X86] Don't unvectorize fp_to_uint for v8f32->v8i16
Rather than LegalizeAction::Expand, this needs LegalizeAction::Promote to get
promoted to fp_to_sint v8f32->v8i32.  This is a legal operation on AVX.

For that to work properly, we also need to teach the legalizer about the
specific promotion required here.  The default vector promotion uses
bitcasting to a vector type of the same total size.  We want to promote the
vector element type, effectively widening the operation and then truncating
the result.  This is analogous to the current logic of how int_to_fp is
promoted.

The change also factors out some code from the int_to_fp promotion code to
ValueType::widenIntegerVectorElementType.  This is now shared between
int_to_fp and fp_to_int.

There is no longer need for the custom lowering of fp_to_sint f32->v8i16 in
X86.  It can now go through the new target-independent fp_to_*int promotion
logic.

I also checked that no other target uses Promote for these ops yet, so there
shouldn't be any unexpected change in behavior.

Fixes <rdar://problem/16202247>

llvm-svn: 204058
2014-03-17 17:06:14 +00:00
Tom Stellard d0084464b5 R600/SI: Fix implementation of isInlineConstant() used by the verifier
The type of the immediates should not matter as long as the encoding is
equivalent to the encoding of one of the legal inline constants.

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
llvm-svn: 204056
2014-03-17 17:03:52 +00:00
Tom Stellard fbe435de63 R600/SI: Use correct dest register class for V_READFIRSTLANE_B32
This instructions writes to an 32-bit SGPR.  This change required adding
the 32-bit VCC_LO and VCC_HI registers, because the full VCC register
is 64 bits.

This fixes verifier errors on several of the indirect addressing piglit
tests.

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
llvm-svn: 204055
2014-03-17 17:03:51 +00:00
Tom Stellard ca700e41ef R600/SI: Add generic checks to SIInstrInfo::verifyInstruction()
Added checks for number of operands and operand register classes.

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
llvm-svn: 204054
2014-03-17 17:03:49 +00:00
Eli Bendersky 576ef3c667 Consistent use of the noduplicate attribute.
The "noduplicate" attribute of call instructions is sometimes queried directly
and sometimes through the cannotDuplicate() predicate. This patch streamlines
all queries to use the cannotDuplicate() predicate. It also adds this predicate
to InvokeInst, to mirror what CallInst has.

llvm-svn: 204049
2014-03-17 16:19:07 +00:00
Alexey Samsonov 464d2e448b [C++11] Introduce ObjectFile::symbols() to use range-based loops.
Reviewers: rafael

Reviewed By: rafael

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D3081

llvm-svn: 204031
2014-03-17 07:28:19 +00:00
Rafael Espindola f863a3e2ec Consider the base pointer for setting the symbol type.
This is really a consistency fix. Since given

a = b

we propagate the information, we should propagate it too given

a = b + (1 - 1)

Fixes pr19145.

llvm-svn: 204028
2014-03-17 04:29:51 +00:00
David Blaikie c714ef4581 DebugInfo: Improve reuse of file table entries in asm debug info
The previous deduping strategy was woefully inadequate - it only
considered the most recent file used and avoided emitting a duplicate in
that case - never considering the a/b/a scenario.

It was also lacking when it came to directory paths as the previous
filename would never match the current if the filename had been split
into file and directory components.

This change builds caching functionality into the line table at the
lowest level in an optional form (a file number of 0 indicates that one
should be chosen and returned) and will eventually be reused by the
normal source level debugging DWARF emission.

llvm-svn: 204027
2014-03-17 01:52:11 +00:00
Lang Hames 7c8189c6d3 [X86] New and improved VZeroUpperInserter optimization.
- Adds support for inserting vzerouppers before tail-calls.
  This is enabled implicitly by having MachineInstr::copyImplicitOps preserve
  regmask operands, which allows VZeroUpperInserter to see where tail-calls use
  vector registers.

- Fixes a bug that caused the previous version of this optimization to miss some
  vzeroupper insertion points in loops. (Loops-with-vector-code that followed
  loops-without-vector-code were mistakenly overlooked by the previous version).

- New algorithm never revisits instructions.

Fixes <rdar://problem/16228798>

llvm-svn: 204021
2014-03-17 01:22:54 +00:00
David Blaikie 6107968f55 Remove named Twine.
While technically correct, we generally disallow any instance of named
Twines due to their subtlety.

llvm-svn: 204016
2014-03-16 01:36:18 +00:00
Arnaud A. de Grandmaison 75c9e6dedf Remove some dead assignements found by scan-build
llvm-svn: 204013
2014-03-15 22:13:15 +00:00
Benjamin Kramer 86c7741f68 Make some assertions on constant expressions static.
llvm-svn: 204011
2014-03-15 18:47:07 +00:00
Benjamin Kramer 62fb0cfb97 LSR: Compress a pair (and get rid of the DenseMapInfo for it).
Also convert a horrible hash function to use our hashing infrastructure.
No functionality change.

llvm-svn: 204008
2014-03-15 17:17:48 +00:00
Patrik Hagglund 8d09a6c674 Replace ValueTypes.h with MachineValueType.h if possible.
Utilize the previous move of MVT to a separate header for all trivial
cases (that don't need any further restructuring).

Reviewed By: Tim Northover

llvm-svn: 204003
2014-03-15 09:11:41 +00:00
Justin Bogner e3bfdc4e14 Support: Make error_category's constructor public
Since our error_category is based on the std one, we should have the
same visibility for the constructor.  This also allows us to avoid
using the _do_message implementation detail in our own categories.

llvm-svn: 203998
2014-03-15 04:05:59 +00:00
NAKAMURA Takumi 6cf7e5d341 SampleProfile.cpp: Fix take #2. The issue was abuse of StringRef here.
llvm-svn: 203996
2014-03-15 01:56:17 +00:00
NAKAMURA Takumi bfb172897e SampleProfile.cpp: Quick fix to r203976 about abuse of Twine. The life of Twine was too short.
FIXME: DiagnosticInfoSampleProfile should not hold Twine&.
llvm-svn: 203990
2014-03-15 00:10:12 +00:00
Matt Arsenault ea330fbe49 R600: Remove unnecessary attempt to zext a pointer.
Private pointers are now always 32-bits.

llvm-svn: 203989
2014-03-15 00:08:26 +00:00
Matt Arsenault 74891cdefe R600: Code cleanup.
Use sign_extend_inreg and getZeroExtendInReg instead of
using the bit operations they expand into.

llvm-svn: 203988
2014-03-15 00:08:22 +00:00
Adrian Prantl 2e4e62e2cc Debug info: Unique types before emitting them to DWARF, where applicable.
llvm-svn: 203983
2014-03-14 23:08:29 +00:00
Adrian Prantl d1e6a4e189 Debug Info: Fix LTO type uniquing for C++ member declarations
based on the ODR.

This adds an OdrMemberMap to DwarfDebug which is used to unique C++
member function declarations based on the unique identifier of their
containing class and their mangled name.
We can't use the usual DIRef mechanism here because DIScopes are indexed
using their entire MDNode, including decl_file and decl_line, which need
not be unique (see testcase).

Prior to this change multiple redundant member function declarations would
end up in the same uniqued DW_TAG_class_type.

llvm-svn: 203982
2014-03-14 23:08:25 +00:00
Adrian Prantl e2da17fb9e typo
llvm-svn: 203980
2014-03-14 23:08:17 +00:00
Jim Grosbach 9a3284fb2f MC: don't create a backtrace for diagnostics.
For better or worse, this is currently the normal error reporting path
when dealing with backend errors from inline assembly. It's not just
internal compiler issues that come through here, so we shouldn't be
creating a backtrace on this path.

rdar://16329947

llvm-svn: 203979
2014-03-14 22:41:58 +00:00
Diego Novillo 709590838f Re-format SampleProfile.cpp with clang-format. No functional changes.
llvm-svn: 203977
2014-03-14 22:07:18 +00:00
Diego Novillo a32aa3251c Use DiagnosticInfo facility.
Summary:
The sample profiler pass emits several error messages. Instead of
just aborting the compiler with report_fatal_error, we can emit
better messages using DiagnosticInfo.

This adds a new sub-class of DiagnosticInfo to handle the sample
profiler.

Reviewers: chandlerc, qcolombet

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D3086

llvm-svn: 203976
2014-03-14 21:58:59 +00:00
Eric Christopher 09d1c0f85d Remove command line option for CU hashing. This is on by default now.
Fix up testcases and use of flag.

llvm-svn: 203973
2014-03-14 21:20:07 +00:00
Eric Christopher 4dd947aa02 If we see that we're emitting code for a function that doesn't have
any lexical scopes then go ahead and turn on DW_AT_ranges for the
compile unit since we would be claiming to describe in the CU
a range for which we don't have information in the CU otherwise.

llvm-svn: 203969
2014-03-14 20:53:49 +00:00
Eric Christopher 3a70d0083f Remove the -generate-dwarf-cu-ranges flag.
Rewrite a couple of testcases to cover areas that would be normally
by turning it on into testcases that will follow the logic.

llvm-svn: 203968
2014-03-14 20:53:43 +00:00
David Blaikie bfdb81dc2d MCContext: Remove redundant assignment
The member variable is not initialized in the ctor so it's already
empty. No need to empty it again.

llvm-svn: 203963
2014-03-14 20:09:26 +00:00
Rafael Espindola 8953f81f67 Correctly handle an ELF symbol defined with "a = b + expr".
We were marking the symbol as absolute instead of computing b's offset + the
expression value.

This fixes pr19126.

llvm-svn: 203962
2014-03-14 20:09:04 +00:00
David Blaikie edc1753ba3 DwarfDebug: Remove some needless recursion.
llvm-svn: 203946
2014-03-14 16:33:32 +00:00
Duncan P. N. Exon Smith a824862664 x86: Add missing break to getCallPreservedMask()
This change brings getCallPreservedMask()'s logic in line with
getCalleeSavedRegs().

While this changes the control flow slightly, the change is not
currently observable.  is64Bit must be false to get to the accidental
fallthrough, but the case that we fall into (coldcc) does nothing unless
is64Bit is true.

llvm-svn: 203943
2014-03-14 16:29:21 +00:00
Duncan P. N. Exon Smith fea3c8afd6 x86: NFC: Make getCallPreservedMask() more similar to getCalleeSavedRegs()
Changing order of checks in getCallPreservedMask() to match
getCalleeSavedRegs() so that the logic is easier to compare.

llvm-svn: 203939
2014-03-14 16:09:13 +00:00
Duncan P. N. Exon Smith 8f66a3afe0 x86: getCalleeSavedRegs() would crash on 0 (so don't default to it)
The current logic assumes that MF is not 0.  Assert that it isn't, and
remove the default of 0 from the header.

llvm-svn: 203934
2014-03-14 15:38:12 +00:00
Alexey Samsonov aa4d29571c [C++11] Introduce SectionRef::relocations() to use range-based loops
Reviewers: rafael

Reviewed By: rafael

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D3077

llvm-svn: 203927
2014-03-14 14:22:49 +00:00
Ulrich Weigand f445399870 [ppc64] Avoid copy relocs in named rodata sections
Commit r181723 introduced code to avoid placing initialized variables
needing relocations into the .rodata section, which avoid copy relocs
that do not work as expected on ppc64 function references.

The same treatment is also needed for *named* .rodata.XXX sections.
This patch changes PPC64LinuxTargetObjectFile::SelectSectionForGlobal
to modify "Kind" *before* calling the default SelectSectionForGlobal
routine, instead of first calling the default routine and then just
checking for the (main) .rodata section afterwards.

llvm-svn: 203921
2014-03-14 12:45:22 +00:00
Alexander Potapenko b76ea32834 [ASan] Fix https://code.google.com/p/address-sanitizer/issues/detail?id=274
by ignoring globals from __TEXT,__cstring,cstring_literals during instrumenation.
Add a regression test.

llvm-svn: 203916
2014-03-14 10:41:49 +00:00
Alexey Samsonov 4d97203add Use ctor instead of initializer list to appease Windows buildbots
llvm-svn: 203915
2014-03-14 10:37:36 +00:00
Alexey Samsonov 3e13ef5296 Use temporary instead of a local variable here
llvm-svn: 203914
2014-03-14 10:20:10 +00:00
Evgeniy Stepanov 49e2625144 AddressSanitizer instrumentation for MOV and MOVAPS.
This is an initial version of *Sanitizer instrumentation of assembly code.

Patch by Yuri Gorshenin.

llvm-svn: 203908
2014-03-14 08:58:04 +00:00
Stepan Dyatkovskiy a53cf970a1 MergeFunctions, cmpType: fixed variable names from XXTy1 and XXTy2 to XXTyL and XXTyR.
llvm-svn: 203907
2014-03-14 08:48:52 +00:00
Stepan Dyatkovskiy 90c4436962 MergeFunctions, cmpType: Fixed comments wrapping.
llvm-svn: 203905
2014-03-14 08:17:19 +00:00
Owen Anderson ec5d480329 Revert r203883 (which was more of a bandaid) and fix the real underlying
issue in that the new MachineRegisterInfo bundle iterators didn't
dereference to the START of the bundle, while the old skipBundle()
method did.

llvm-svn: 203890
2014-03-14 05:02:18 +00:00
Pete Cooper 7360280e5c Fix issue with r203865. The old behaviour would get a MachineOperand then find the MI for the bundle the MI was in. The new behaviour was failing to get the parent bundle and instead just used the MI from the MachineOperand
llvm-svn: 203883
2014-03-14 02:28:05 +00:00
Eric Christopher af7eca2da4 Use DW_AT_linkage_name when we're emitting DWARF4 or above.
llvm-svn: 203867
2014-03-13 23:26:25 +00:00
Rafael Espindola 2fb5bc33a3 Remove the linker_private and linker_private_weak linkages.
These linkages were introduced some time ago, but it was never very
clear what exactly their semantics were or what they should be used
for. Some investigation found these uses:

* utf-16 strings in clang.
* non-unnamed_addr strings produced by the sanitizers.

It turns out they were just working around a more fundamental problem.
For some sections a MachO linker needs a symbol in order to split the
section into atoms, and llvm had no idea that was the case. I fixed
that in r201700 and it is now safe to use the private linkage. When
the object ends up in a section that requires symbols, llvm will use a
'l' prefix instead of a 'L' prefix and things just work.

With that, these linkages were already dead, but there was a potential
future user in the objc metadata information. I am still looking at
CGObjcMac.cpp, but at this point I am convinced that linker_private
and linker_private_weak are not what they need.

The objc uses are currently split in

* Regular symbols (no '\01' prefix). LLVM already directly provides
whatever semantics they need.
* Uses of a private name (start with "\01L" or "\01l") and private
linkage. We can drop the "\01L" and "\01l" prefixes as soon as llvm
agrees with clang on L being ok or not for a given section. I have two
patches in code review for this.
* Uses of private name and weak linkage.

The last case is the one that one could think would fit one of these
linkages. That is not the case. The semantics are

* the linker will merge these symbol by *name*.
* the linker will hide them in the final DSO.

Given that the merging is done by name, any of the private (or
internal) linkages would be a bad match. They allow llvm to rename the
symbols, and that is really not what we want. From the llvm point of
view, these objects should really be (linkonce|weak)(_odr)?.

For now, just keeping the "\01l" prefix is probably the best for these
symbols. If we one day want to have a more direct support in llvm,
IMHO what we should add is not a linkage, it is just a hidden_symbol
attribute. It would be applicable to multiple linkages. For example,
on weak it would produce the current behavior we have for objc
metadata. On internal, it would be equivalent to private (and we
should then remove private).

llvm-svn: 203866
2014-03-13 23:18:37 +00:00
Owen Anderson 16c6bf49b7 Phase 2 of the great MachineRegisterInfo cleanup. This time, we're changing
operator* on the by-operand iterators to return a MachineOperand& rather than
a MachineInstr&.  At this point they almost behave like normal iterators!

Again, this requires making some existing loops more verbose, but should pave
the way for the big range-based for-loop cleanups in the future.

llvm-svn: 203865
2014-03-13 23:12:04 +00:00
Owen Anderson 9b8f9c3d95 Fix a bug in InstCombine where we would incorrectly attempt to construct a
bitcast between pointers of two different address spaces if they happened to have
the same pointer size.

llvm-svn: 203862
2014-03-13 22:51:43 +00:00
David Blaikie d9012ba118 MCDwarf: Rename MCDwarfFileTable to MCDwarfLineTable
This type now represents all the data for the DWARF line table:
directory names, file names, and the line table proper.

llvm-svn: 203858
2014-03-13 21:59:51 +00:00
David Blaikie 5cff0e6a81 MCDwarf: Extract the DWARF line table header handling into its own type
llvm-svn: 203856
2014-03-13 21:47:12 +00:00
Lang Hames 8b132433c6 Make GDBJITRegistrar thread safe. Patch by Jim Kearyn, with cleanup by
Ivan Puzyrevskiy.

Fixes PR15750. Thanks Jim and Ivan.

llvm-svn: 203853
2014-03-13 21:25:37 +00:00
David Blaikie 498589c3fd MCDwarf: Sink file/directory creation down into MCDwarfFileTable form MCContext
llvm-svn: 203836
2014-03-13 19:15:04 +00:00
David Blaikie 533490de63 MCDwarf: Oh, and move the directory string over to std::string as well
(see r203831 for similar stuff)

llvm-svn: 203833
2014-03-13 19:05:33 +00:00
David Blaikie a55ddad134 MCDwarf: Simplify MCDwarfFile to just use std::string instead of cunning use of MCContext's allocator.
There aren't /that/ many files, and we are already using various maps
and other standard containers that don't use MCContext's allocator to
store these values, so this doesn't seem to be critical and simplifies
the design (I'll be moving construction out of MCContext shortly so it'd
be annoying to have to pass the allocator around to allocate these
things... and we'll have non-MCContext users (debug_line.dwo) shortly)

llvm-svn: 203831
2014-03-13 18:55:04 +00:00
Ekaterina Romanova 8d62008ecb Fix for http://llvm.org/bugs/show_bug.cgi?id=18590
This patch fixes the bug in peephole optimization that folds a load which defines one vreg into the one and only use of that vreg. With debug info, a DBG_VALUE that referenced the vreg considered to be a use, preventing the optimization. The fix is to ignore DBG_VALUE's during the optimization, and undef a DBG_VALUE that references a vreg that gets removed.
Patch by Trevor Smigiel!

llvm-svn: 203829
2014-03-13 18:47:12 +00:00
David Blaikie 639f8ea397 MCDwarf: Simply MCDwarfFile since it really is just a StringRef and unsigned.
llvm-svn: 203827
2014-03-13 18:21:24 +00:00
Rafael Espindola 4269b9eed5 Use printable names to implement directional labels.
This changes the implementation of local directional labels to use a dedicated
map. With that it can then just use CreateTempSymbol, which is what the rest
of MC uses.

CreateTempSymbol doesn't do a great job at making sure the names are unique
(or being efficient when the names are not needed), but that should probably
be fixed in a followup patch.

This fixes pr18928.

llvm-svn: 203826
2014-03-13 18:09:26 +00:00
David Blaikie f4a640eaf6 Remove stale comment
llvm-svn: 203823
2014-03-13 17:58:09 +00:00
David Blaikie 11765bce2d MCDwarf: Refactor line table handling into a single data structure
This replaces several "compile unit ID -> thing" mappings in favor of
one mapping from CUID to the whole line table structure (files,
directories, and lines).

This is another step along the way to refactoring out reusable
components of line table handling for use when generating debug_line.dwo
for fission type units.

Also, might be a good basis to fold some of this handling down into
MCStreamers to avoid the special case of "One line table when doing asm
printing, line table per CU otherwise" by building it into the different
MCStreamer implementations.

llvm-svn: 203821
2014-03-13 17:55:28 +00:00
Tom Stellard 08ef1233c6 R600: LDS instructions shouldn't implicitly define OQAP
LDS instructions are pseudo instructions which model
the OQAP defs and uses within a single instruction.

This fixes a hang in the opencv MedianFilter tests.

llvm-svn: 203818
2014-03-13 17:13:04 +00:00
Hans Wennborg 89050436e6 [ARM] Use symbolic register names in .cfi directives only with IAS (PR19110)
This is a follow-up to r203635. Saleem pointed out that since symbolic register
names are much easier to read, it would be good if we could turn them off only
when we really need to because we're using an external assembler.

Differential Revision: http://llvm-reviews.chandlerc.com/D3056

llvm-svn: 203806
2014-03-13 15:56:41 +00:00
Alexey Samsonov 063eb3fa2d [C++11] Introduce ObjectFile::sections().
Summary:
This adds ObjectFile::section_iterator_range, that allows to write
range-based for-loops running over all sections of a given file.
Several files from lib/ are converted to the new interface. Similar fixes
should be applied to a variety of llvm-* tools.

Reviewers: rafael

Reviewed By: rafael

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D3069

llvm-svn: 203799
2014-03-13 13:52:54 +00:00
Manuel Jacob a7c48f99ae CodeGenPrep: sink extends of illegal types into use block.
Summary:
This helps the instruction selector to lower an i64 * i64 -> i128
multiplication into a single instruction on targets which support it.

This is an update of D2973 which was reverted because of a bug reported
as PR19084.

Reviewers: t.p.northover, chapuni

Reviewed By: t.p.northover

CC: llvm-commits, alex, chapuni

Differential Revision: http://llvm-reviews.chandlerc.com/D3021

llvm-svn: 203797
2014-03-13 13:36:25 +00:00
Evgeniy Stepanov 7ab838eb56 [msan] Fix handling of byval arguments in VarArg calls.
llvm-svn: 203794
2014-03-13 13:17:11 +00:00
Elena Demikhovsky fd05667276 AVX-512: masked load/store + intrinsics for them.
llvm-svn: 203790
2014-03-13 12:05:52 +00:00
Stepan Dyatkovskiy d8eb0bcb5b First patch of patch series that improves MergeFunctions performance time from O(N*N) to
O(N*log(N)). The idea is to introduce total ordering among functions set.
That allows to build binary tree and perform function look-up procedure in O(log(N)) time. 

This patch description:
Introduced total ordering among Type instances. Actually it is improvement for existing
isEquivalentType.
0. Coerce pointer of 0 address space to integer.
1. If left and right types are equal (the same Type* value), return 0 (means equal).
2. If types are of different kind (different type IDs). Return result of type IDs
comparison, treating them as numbers.
3. If types are vectors or integers, return result of its
pointers comparison (casted to numbers).
4. Check whether type ID belongs to the next group: 
* Void 
* Float 
* Double 
* X86_FP80 
* FP128 
* PPC_FP128 
* Label 
* Metadata 
If so, return 0.
5. If left and right are pointers, return result of address space
comparison (numbers comparison).
6. If types are complex.
Then both LEFT and RIGHT will be expanded and their element types will be checked with
the same way. If we get Res != 0 on some stage, return it. Otherwise return 0.
7. For all other cases put llvm_unreachable.

llvm-svn: 203788
2014-03-13 11:54:50 +00:00
Chandler Carruth b07f378fc8 [PM] Stop playing fast and loose with rebinding of references. However
convenient it is to imagine a world where this works, that is not C++ as
was pointed out in review. The standard even goes to some lengths to
preclude any attempt at this, for better or worse. Maybe better. =]

llvm-svn: 203775
2014-03-13 09:50:31 +00:00
Tim Northover 38a93aaaa1 AArch64: error when both positional & named operands are used.
Only one instruction pair needed changing: SMULH & UMULH. The previous
code worked, but MC was doing extra work treating Ra as a valid
operand (which then got completely overwritten in MCCodeEmitter).

No behaviour change, so no tests.

llvm-svn: 203772
2014-03-13 09:00:13 +00:00
Alexey Samsonov 96dc29c028 [C++11] DWARF parser: use SmallVector<std::unique_ptr> for parsed units in DWARFContext, and delete custom destructors
llvm-svn: 203770
2014-03-13 08:19:59 +00:00
Hal Finkel 27774d9274 [PowerPC] Initial support for the VSX instruction set
VSX is an ISA extension supported on the POWER7 and later cores that enhances
floating-point vector and scalar capabilities. Among other things, this adds
<2 x double> support and generally helps to reduce register pressure.

The interesting part of this ISA feature is the register configuration: there
are 64 new 128-bit vector registers, the 32 of which are super-registers of the
existing 32 scalar floating-point registers, and the second 32 of which overlap
with the 32 Altivec vector registers. This makes things like vector insertion
and extraction tricky: this can be free but only if we force a restriction to
the right register subclass when needed. A new "minipass" PPCVSXCopy takes care
of this (although it could do a more-optimal job of it; see the comment about
unnecessary copies below).

Please note that, currently, VSX is not enabled by default when targeting
anything because it is not yet ready for that.  The assembler and disassembler
are fully implemented and tested. However:

 - CodeGen support causes miscompiles; test-suite runtime failures:
      MultiSource/Benchmarks/FreeBench/distray/distray
      MultiSource/Benchmarks/McCat/08-main/main
      MultiSource/Benchmarks/Olden/voronoi/voronoi
      MultiSource/Benchmarks/mafft/pairlocalalign
      MultiSource/Benchmarks/tramp3d-v4/tramp3d-v4
      SingleSource/Benchmarks/CoyoteBench/almabench
      SingleSource/Benchmarks/Misc/matmul_f64_4x4

 - The lowering currently falls back to using Altivec instructions far more
   than it should. Worse, there are some things that are scalarized through the
   stack that shouldn't be.

 - A lot of unnecessary copies make it past the optimizers, and this needs to
   be fixed.

 - Many more regression tests are needed.

Normally, I'd fix these things prior to committing, but there are some
students and other contributors who would like to work this, and so it makes
sense to move this development process upstream where it can be subject to the
regular code-review procedures.

llvm-svn: 203768
2014-03-13 07:58:58 +00:00
Hal Finkel 5457bd08cb [TableGen] Optionally forbid overlap between named and positional operands
There are currently two schemes for mapping instruction operands to
instruction-format variables for generating the instruction encoders and
decoders for the assembler and disassembler respectively: a) to map by name and
b) to map by position.

In the long run, we'd like to remove the position-based scheme and use only
name-based mapping. Unfortunately, the name-based scheme currently cannot deal
with complex operands (those with suboperands), and so we currently must use
the position-based scheme for those. On the other hand, the position-based
scheme cannot deal with (register) variables that are split into multiple
ranges. An upcoming commit to the PowerPC backend (adding VSX support) will
require this capability. While we could teach the position-based scheme to
handle that, since we'd like to move away from the position-based mapping
generally, it seems silly to teach it new tricks now. What makes more sense is
to allow for partial transitioning: use the name-based mapping when possible,
and only use the position-based scheme when necessary.

Now the problem is that mixing the two sensibly was not possible: the
position-based mapping would map based on position, but would not skip those
variables that were mapped by name. Instead, the two sets of assignments would
overlap. However, I cannot currently change the current behavior, because there
are some backends that rely on it [I think mistakenly, but I'll send a message
to llvmdev about that]. So I've added a new TableGen bit variable:
noNamedPositionallyEncodedOperands, that can be used to cause the
position-based mapping to skip variables mapped by name.

llvm-svn: 203767
2014-03-13 07:57:54 +00:00
Alexey Samsonov 1eabf98b32 [C++11] Convert DWARF parser to range-based for loops
llvm-svn: 203766
2014-03-13 07:52:54 +00:00
Saleem Abdulrasool aae4dc21ea ARM: ignore unused variable to fix -Wunused-variable builds
llvm-svn: 203765
2014-03-13 07:15:45 +00:00
Saleem Abdulrasool 324133910a MC: fix silly typo
llvm-svn: 203763
2014-03-13 07:02:46 +00:00
Saleem Abdulrasool dadf94ce84 ARM: support emission of complex SO expressions
Support to the IAS was added to actually parse and handle the complex SO
expressions.  However, the object file lowering was not updated to compensate
for the fact that the shift operand may be an absolute expression.

When trying to assemble to an object file, the lowering would fail while
succeeding when emitting purely assembly.  Add an appropriate test.

The test case is inspired by the test case provided by Jiangning Liu who also
brought the issue to light.

llvm-svn: 203762
2014-03-13 07:02:41 +00:00
Saleem Abdulrasool 9b7c0af292 Support: add support to identify WinCOFF/ARM objects
Add the Windows COFF ARM object file magic.  This enables the LLVM tools to
interact with COFF object files for Windows on ARM.

llvm-svn: 203761
2014-03-13 07:02:35 +00:00
Owen Anderson abb90c9ddb Phase 1 of refactoring the MachineRegisterInfo iterators to make them suitable
for use with C++11 range-based for-loops.

The gist of phase 1 is to remove the skipInstruction() and skipBundle()
methods from these iterators, instead splitting each iterator into a version
that walks operands, a version that walks instructions, and a version that
walks bundles.  This has the result of making some "clever" loops in lib/CodeGen
more verbose, but also makes their iterator invalidation characteristics much
more obvious to the casual reader. (Making them concise again in the future is a
good motivating case for a pre-incrementing range adapter!)

Phase 2 of this undertaking with consist of removing the getOperand() method,
and changing operator*() of the operand-walker to return a MachineOperand&.  At
that point, it should be possible to add range views for them that work as one
might expect.

llvm-svn: 203757
2014-03-13 06:02:25 +00:00
Saleem Abdulrasool ac58e9fc0b MC: fix possible NULL pointer dereference
Avoid NULL pointer scenario found via clang's static analyzer.

llvm-svn: 203745
2014-03-13 02:09:51 +00:00
Mark Seaborn 07e7486128 Fix typo in comment: "inwoke" -> "invoke"
llvm-svn: 203739
2014-03-13 00:04:17 +00:00
David Blaikie f4ad698336 MCDwarf: Remove unused parameter
llvm-svn: 203727
2014-03-12 22:35:23 +00:00
David Blaikie a55e64f84a MCDwarf: Invert the Section+CU->LineEntries mapping so the CU is the primary dimension
This makes the mapping consistent with other CU->X mappings in the
MCContext, helping pave the way to refactor all these values into a
single data structure per CU and thus a single map.

I haven't renamed the data structure as that would make the patch churn
even higher (the MCLineSection name no longer makes sense, as this
structure now contains lines for multiple sections covered by a single
CU, rather than lines for a single section in multiple CUs) and further
refactorings will follow that may remove this type entirely.

For convenience, I also gave the MCLineSection value semantics so we
didn't have to do the lazy construction, manual delete, etc.

(& for those playing at home, refactoring the line printing into a
single data structure will eventually alow that data structure to be
reused to own the debug_line.dwo line table used for type unit file name
resolution)

llvm-svn: 203726
2014-03-12 22:28:56 +00:00
Justin Bogner ec49f9820c Back out Profile library and dependent commits
Chandler voiced some concern with checking this in without some
discussion first. Reverting for now.

This reverts r203703, r203704, r203708, and 203709.

llvm-svn: 203723
2014-03-12 22:00:57 +00:00
Michael Zolotukhin 66806aef1e PR17473:
Don't normalize an expression during postinc transformation unless it's
invertible.

llvm-svn: 203719
2014-03-12 21:31:05 +00:00
Adam Nemet d4e56073c7 [X86] Add peephole for masked rotate amount
Extend what's currently done for shift because the HW performs this masking
implicitly:

   (rotl:i32 x, (and y, 31)) -> (rotl:i32 x, y)

I use the newly factored out multiclass that was only supporting shifts so
far.

For testing I extended my testcase for the new rotation idiom.

<rdar://problem/15295856>

llvm-svn: 203718
2014-03-12 21:20:55 +00:00
Michael Zolotukhin 15e6e543b9 Test commit
llvm-svn: 203716
2014-03-12 21:15:56 +00:00
Justin Bogner a1f278f96c Profile: Remove an inefficient and unnecessary API function
This was leftover from an approach I abandoned, but I forgot to update
it before committing.

llvm-svn: 203708
2014-03-12 20:26:37 +00:00