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22403 Commits

Author SHA1 Message Date
Benjamin Kramer 72196f3ae5 InstCombine: Teach most integer add/sub/mul/div combines how to deal with vectors. 
llvm-svn: 199602
 2014-01-19 15:24:22 +00:00
Benjamin Kramer 76b15d04ff InstCombine: Refactor fmul/fdiv combines to handle vectors. 
llvm-svn: 199598
 2014-01-19 13:36:27 +00:00
Chandler Carruth 1bf38c6a71 Fix a really nasty SROA bug with how we handled out-of-bounds memcpy 
intrinsics.

Reported on the list by Evan with a couple of attempts to fix, but it
took a while to dig down to the root cause. There are two overlapping
bugs here, both centering around the circumstance of discovering
a memcpy operand which is known to be completely outside the bounds of
the alloca.

First, we need to kill the *other* side of the memcpy if it was added to
this alloca. Otherwise we'll factor it into our slicing and try to
rewrite it even though we know for a fact that it is dead. This is made
more tricky because we can visit the sides in either order. So we have
to both kill the other side and skip instructions marked as dead. The
latter really should be goodness in every case, but here is a matter of
correctness.

Second, we need to actually remove the *uses* of the alloca by the
memcpy when queuing it for later deletion. Otherwise it may still be
using the alloca when we go to promote it (if the rewrite re-uses the
existing alloca instruction). Do this by factoring out the
use-clobbering used when for nixing a Phi argument and re-using it
across the operands of a to-be-deleted instruction.

llvm-svn: 199590
 2014-01-19 12:16:54 +00:00
Saleem Abdulrasool 9390005577 ARM ELF: ensure that the tag types are corrected 
Ensure that the tag types are reflected on a replacement.  This is particularly
important for the compatibility tag which has multiple representations where the
last definition wins.

llvm-svn: 199577
 2014-01-19 08:25:41 +00:00
Saleem Abdulrasool 196c3212ba ARM: update build attributes for ABI r2.09 
Update names for the names as per the current ABI errata.  Mark deprecated tags
as such.

llvm-svn: 199576
 2014-01-19 08:25:35 +00:00
Arnold Schwaighofer cc742dd9e4 LoopVectorizer: A reduction that has multiple uses of the reduction value is not 
a reduction.

Really. Under certain circumstances (the use list of an instruction has to be
set up right - hence the extra pass in the test case) we would not recognize
when a value in a potential reduction cycle was used multiple times by the
reduction cycle.

Fixes PR18526.
radar://15851149

llvm-svn: 199570
 2014-01-19 03:18:31 +00:00
Chandler Carruth 043949d446 [PM] Make the verifier work independently of any pass manager. 
This makes the 'verifyFunction' and 'verifyModule' functions totally
independent operations on the LLVM IR. It also cleans up their API a bit
by lifting the abort behavior into their clients and just using an
optional raw_ostream parameter to control printing.

The implementation of the verifier is now just an InstVisitor with no
multiple inheritance. It also is significantly more const-correct, and
hides the const violations internally. The two layers that force us to
break const correctness are building a DomTree and dispatching through
the InstVisitor.

A new VerifierPass is used to implement the legacy pass manager
interface in terms of the other pieces.

The error messages produced may be slightly different now, and we may
have slightly different short circuiting behavior with different usage
models of the verifier, but generally everything works equivalently and
this unblocks wiring the verifier up to the new pass manager.

llvm-svn: 199569
 2014-01-19 02:22:18 +00:00
Nick Lewycky a6a17d77d2 Don't refuse to transform constexpr(call(arg, ...)) to call(constexpr(arg), ...)) just because the function has multiple return values even if their return types are the same. Patch by Eduard Burtescu! 
llvm-svn: 199564
 2014-01-18 22:47:12 +00:00
Benjamin Kramer dd39a98b1c ARM: Let the assembler reject v5 instructions in v4 mode. 
PR18524.

llvm-svn: 199559
 2014-01-18 19:03:19 +00:00
NAKAMURA Takumi 3189afc4ca [CMake] Add llvm-tblgen to dependencies of check-llvm. 
llvm-tblgen is not built when external LLVM_TABLEGEN is specified.
Even then, llvm-tblgen should be built for testing tblgen itself.

llvm-svn: 199558
 2014-01-18 19:01:08 +00:00
Benjamin Kramer fea9ac99b0 InstCombine: Make the (fmul X, -1.0) -> (fsub -0.0, X) transform handle vectors too. 
PR18532.

llvm-svn: 199553
 2014-01-18 16:43:14 +00:00
Adrian Prantl ef129fbb41 Debug info (LTO): Move the creation of accessibility flags to 
getOrCreateSubprogramDIE to avoid attributes being added twice when DIEs
are merged.

rdar://problem/15842330.

llvm-svn: 199536
 2014-01-18 02:12:00 +00:00
Owen Anderson 48b842ef7c Fix more instances of dropped fast math flags when optimizing FADD instructions. All found by inspection (aka grep). 
llvm-svn: 199528
 2014-01-18 00:48:14 +00:00
Reid Kleckner 436c42ec3d Add an inalloca flag to allocas 
Summary:
The only current use of this flag is to mark the alloca as dynamic, even
if its in the entry block.  The stack adjustment for the alloca can
never be folded into the prologue because the call may clear it and it
has to be allocated at the top of the stack.

Reviewers: majnemer

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D2571

llvm-svn: 199525
 2014-01-17 23:58:17 +00:00
Rui Ueyama e5df6095b1 llvm-objdump/COFF: Print ordinal base number. 
llvm-svn: 199518
 2014-01-17 22:02:24 +00:00
Juergen Ributzka e625013071 Add two new calling conventions for runtime calls 
This patch adds two new target-independent calling conventions for runtime
calls - PreserveMost and PreserveAll.
The target-specific implementation for X86-64 is defined as following:
  - Arguments are passed as for the default C calling convention
  - The same applies for the return value(s)
  - PreserveMost preserves all GPRs - except R11
  - PreserveAll preserves all GPRs and all XMMs/YMMs - except R11

Reviewed by Lang and Philip

llvm-svn: 199508
 2014-01-17 19:47:03 +00:00
Daniel Sanders b825a634d6 [mips][msa] Correct pattern for LSA 
Summary:
$rs and $rt were the wrong way round in the .td and the testcase wasn't
strict enough to detect the mistake.

Reviewers: matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D2554

llvm-svn: 199498
 2014-01-17 15:40:05 +00:00
Renato Golin afc43a1cbe Add MLA alias for ARMv4 support. 
Fix MLA defs to use register class GPRnopc.
Add encoding tests for multiply instructions.
(Alias for MUL/SMLAL/UMLAL added by r199026.)

Patch by Zhaoshi.

llvm-svn: 199491
 2014-01-17 13:53:08 +00:00
Kostya Serebryany 714c67c31e [asan] extend asan-coverage (still experimental). 
- add a mode for collecting per-block coverage (-asan-coverage=2).
   So far the implementation is naive (all blocks are instrumented),
   the performance overhead on top of asan could be as high as 30%.
 - Make sure the one-time calls to __sanitizer_cov are moved to function buttom,
   which in turn required to copy the original debug info into the call insn.

Here is the performance data on SPEC 2006
(train data, comparing asan with asan-coverage={0,1,2}):

                             asan+cov0     asan+cov1      diff 0-1    asan+cov2       diff 0-2      diff 1-2
       400.perlbench,        65.60,        65.80,         1.00,        76.20,         1.16,         1.16
           401.bzip2,        65.10,        65.50,         1.01,        75.90,         1.17,         1.16
             403.gcc,         1.64,         1.69,         1.03,         2.04,         1.24,         1.21
             429.mcf,        21.90,        22.60,         1.03,        23.20,         1.06,         1.03
           445.gobmk,       166.00,       169.00,         1.02,       205.00,         1.23,         1.21
           456.hmmer,        88.30,        87.90,         1.00,        91.00,         1.03,         1.04
           458.sjeng,       210.00,       222.00,         1.06,       258.00,         1.23,         1.16
      462.libquantum,         1.73,         1.75,         1.01,         2.11,         1.22,         1.21
         464.h264ref,       147.00,       152.00,         1.03,       160.00,         1.09,         1.05
         471.omnetpp,       115.00,       116.00,         1.01,       140.00,         1.22,         1.21
           473.astar,       133.00,       131.00,         0.98,       142.00,         1.07,         1.08
       483.xalancbmk,       118.00,       120.00,         1.02,       154.00,         1.31,         1.28
            433.milc,        19.80,        20.00,         1.01,        20.10,         1.02,         1.01
            444.namd,        16.20,        16.20,         1.00,        17.60,         1.09,         1.09
          447.dealII,        41.80,        42.20,         1.01,        43.50,         1.04,         1.03
          450.soplex,         7.51,         7.82,         1.04,         8.25,         1.10,         1.05
          453.povray,        14.00,        14.40,         1.03,        15.80,         1.13,         1.10
             470.lbm,        33.30,        34.10,         1.02,        34.10,         1.02,         1.00
         482.sphinx3,        12.40,        12.30,         0.99,        13.00,         1.05,         1.06

llvm-svn: 199488
 2014-01-17 11:00:30 +00:00
Kevin Qin e0faea11b1 [AArch64 NEON] Expand vector for UDIV/SDIV/UREM/SREM/FREM as neon doesn't support these operations. 
llvm-svn: 199485
 2014-01-17 09:54:30 +00:00
Craig Topper 2d4b3c9770 Teach x86 asm parser to handle 'opaque ptr' in Intel syntax. 
llvm-svn: 199477
 2014-01-17 07:44:10 +00:00
Craig Topper 9ac290ad5b Teach X86 asm parser to understand 'ZMMWORD PTR' in Intel syntax. 
llvm-svn: 199476
 2014-01-17 07:37:39 +00:00
Craig Topper a49c2960c6 Fix intel syntax for 64-bit version of FXSAVE/FXRSTOR to use '64' suffix instead of 'q' 
llvm-svn: 199474
 2014-01-17 07:25:39 +00:00
Hao Liu 17457a2ee2 [AArch64]Fix the problem can't select f16_to_f32 and f32_to_f16. 
Also add copy support for FPR16.
Also add a missing test case file belongs to commit r197361.

llvm-svn: 199463
 2014-01-17 06:23:30 +00:00
Kevin Qin 212d9b4a56 [AArch64 NEON] Custom lower conversion between vector integer and vector floating point if element bit-width doesn't match. 
llvm-svn: 199462
 2014-01-17 05:52:35 +00:00
Hao Liu 18d92262c5 [AArch64]Fix the problem can't select concat_vectors of two v1i32 types. 
Also fix the problem can't select scalar_to_vector from f32 to v2f32/v4f32.

llvm-svn: 199461
 2014-01-17 05:44:46 +00:00
Reid Kleckner 60d3a835ff Change inalloca rules to make it only apply to the last parameter 
This makes things a lot easier, because we can now talk about the
"argument allocation", which allocates all the memory for the call in
one shot.

The only functional change is to the verifier for a feature that hasn't
shipped yet.

llvm-svn: 199434
 2014-01-16 22:59:24 +00:00
Owen Anderson e7321660c1 Fix two cases where we could lose fast math flags when optimizing FADD expressions. 
llvm-svn: 199427
 2014-01-16 21:26:02 +00:00
Owen Anderson 4557a156e3 Fix an instance where we would drop fast math flags when performing an fdiv to reciprocal multiply transformation. 
llvm-svn: 199425
 2014-01-16 21:07:52 +00:00
Owen Anderson e8537fc7e0 Fix a bug in InstCombine where we failed to preserve fast math flags when optimizing an FMUL expression. 
llvm-svn: 199424
 2014-01-16 20:59:41 +00:00
Rui Ueyama da49d0d44c llvm-objdump/COFF: Print DLL name in the export table header. 
llvm-svn: 199422
 2014-01-16 20:50:34 +00:00
Owen Anderson f74cfe031f Teach InstCombine that (fmul X, -1.0) can be simplified to (fneg X), which LLVM expresses as (fsub -0.0, X). 
llvm-svn: 199420
 2014-01-16 20:36:42 +00:00
Ed Maste ef6fed7c84 llvm-symbolizer: make mangled name heuristic apply to all symbols 
PR: http://llvm.org/pr18431
Review: http://llvm-reviews.chandlerc.com/D2552
llvm-svn: 199404
 2014-01-16 17:25:12 +00:00
Amara Emerson dba59eb3f4 Move the xscale build attribute test to the proper place and remove the old one. 
The encoding of build attributes is already tested in CodeGen/ARM/build-attributes-encoding.s

llvm-svn: 199393
 2014-01-16 15:11:54 +00:00
Jiangning Liu 4df2363a23 For ARM, fix assertuib failures for some ld/st 3/4 instruction with wirteback. 
llvm-svn: 199369
 2014-01-16 09:16:13 +00:00
Elena Demikhovsky d1487261a0 AVX-512: fixed a compare pattern 
llvm-svn: 199366
 2014-01-16 08:45:54 +00:00
Craig Topper 35da3d190a Allow x86 mov instructions to/from memory with absolute address to be encoded and disassembled with a segment override prefix. Fixes PR16962. 
llvm-svn: 199364
 2014-01-16 07:36:58 +00:00
Bill Wendling 2f98bac1f4 Fix typo: : not ; 
llvm-svn: 199359
 2014-01-16 07:08:22 +00:00
Rui Ueyama ad882ba896 llmv-objdump/COFF: Print export table contents. 
This patch adds the capability to dump export table contents. An example
output is this:

  Export Table:
   Ordinal      RVA  Name
         5   0x2008  exportfn1
         6   0x2010  exportfn2

By adding this feature to llvm-objdump, we will be able to use it to check
export table contents in LLD's tests. Currently we are doing binary
comparison in the tests, which is fragile and not readable to humans.

llvm-svn: 199358
 2014-01-16 07:05:49 +00:00
Rafael Espindola 306e2b019f Convert test to FileCheck. 
llvm-svn: 199355
 2014-01-16 06:31:20 +00:00
Arnold Schwaighofer e3ac099726 BasicAA: We need to check both access sizes when comparing a gep and an 
underlying object of unknown size.

Fixes PR18460.

llvm-svn: 199351
 2014-01-16 04:53:18 +00:00
Manman Ren 2ebfb42fe9 Report a warning when dropping outdated debug info metadata. 
Use DiagnosticInfo to emit the warning.

llvm-svn: 199346
 2014-01-16 01:51:12 +00:00
Reed Kotler 43788a20c6 Adjust offsets for max load instruction offsets. This is more pessimistic 
than it needs to be by 1 bit but I need to finish some other things so 
that all the boundary cases will work in that situation. constpool.c
in test-suite will fail to assemble under our new internal test-suite sync
without this change.

llvm-svn: 199343
 2014-01-16 00:47:46 +00:00
David Peixotto c0f92a2dc9 Fix parsing of .symver directive on ARM 
ARM assembly syntax uses @ for a comment, execpt for the second
parameter of the .symver directive which requires @ as part of the
symbol name. This commit fixes the parsing of this directive by
adding a special case for ARM for this one argumnet.

To make the change we had to move the AllowAtInIdentifier variable
to the MCAsmLexer interface (from AsmLexer) and expose a setter for
the value.  The ELFAsmParser then toggles this value when parsing
the second argument to the .symver directive for a target that
uses @ as a comment symbol

llvm-svn: 199339
 2014-01-15 22:40:02 +00:00
Andrea Di Biagio 12de5f3bc1 Update test/CodeGen/X86/vbinop-simplify-bug.ll. 
Redirect the output of llc to /dev/null.

llvm-svn: 199329
 2014-01-15 20:16:14 +00:00
Andrea Di Biagio d7c03ec348 [DAGCombiner] Fix a wrong check in method SimplifyVBinOp. 
This fixes a regression intruced by r199135.

Revision 199135 tried to simplify part of the logic in method
DAGCombiner::SimplifyVBinOp introducing calls to method BuildVectorSDNode::isConstant().

However, that revision wrongly changed the check performed by method
SimplifyVBinOp to identify dag nodes that can be folded.
Before revision 199135, that method only tried to simplify vector binary operations
if both operands were build_vector of Constant/ConstantFP/Undef only.

After revision 199135, method SimplifyVBinop tried to
simplify also vector binary operations with only one constant operand.

This fixes the problem restoring the old behavior of SimplifyVBinOp.

llvm-svn: 199328
 2014-01-15 19:51:32 +00:00
Kevin Enderby 2e13b1c7f1 Update the X86 assembler for .intel_syntax to accept 
the | and & bitwise operators.

rdar://15570412

llvm-svn: 199323
 2014-01-15 19:05:24 +00:00
Rafael Espindola 587940502b Make sure we create a new archive by deleting any stale ones first. 
llvm-svn: 199319
 2014-01-15 16:56:57 +00:00
Zoran Jovanovic 7d63392da9 LL and SC decoder method fix. 
llvm-svn: 199316
 2014-01-15 13:17:33 +00:00
Zoran Jovanovic d4cb61cf0e Added support for LWU microMIPS instruction. 
llvm-svn: 199315
 2014-01-15 13:01:18 +00:00