Commit Graph

243 Commits

Author SHA1 Message Date
Chandler Carruth 6bda14b313 Sort the remaining #include lines in include/... and lib/....
I did this a long time ago with a janky python script, but now
clang-format has built-in support for this. I fed clang-format every
line with a #include and let it re-sort things according to the precise
LLVM rules for include ordering baked into clang-format these days.

I've reverted a number of files where the results of sorting includes
isn't healthy. Either places where we have legacy code relying on
particular include ordering (where possible, I'll fix these separately)
or where we have particular formatting around #include lines that
I didn't want to disturb in this patch.

This patch is *entirely* mechanical. If you get merge conflicts or
anything, just ignore the changes in this patch and run clang-format
over your #include lines in the files.

Sorry for any noise here, but it is important to keep these things
stable. I was seeing an increasing number of patches with irrelevant
re-ordering of #include lines because clang-format was used. This patch
at least isolates that churn, makes it easy to skip when resolving
conflicts, and gets us to a clean baseline (again).

llvm-svn: 304787
2017-06-06 11:49:48 +00:00
Saleem Abdulrasool ac76ec7ce8 ADT: handle special case of ARM environment for SUSE
SUSE treats "gnueabi" as "gnueabihf" so make sure that we normalise the
environment.

llvm-svn: 304670
2017-06-03 22:31:06 +00:00
Jacob Gravelle 26115924a2 Revert r304117 - WebAssembly object format isn't ready to be the default
Summary: Wasm object format has some functionality regressions from the ELF format, and doesn't play nicely with the rest of the toolchain. It should eventually be the default, but not yet.

Reviewers: sunfish, sbc100

Subscribers: jfb, dschuff, llvm-commits

Differential Revision: https://reviews.llvm.org/D33811

llvm-svn: 304512
2017-06-02 01:26:17 +00:00
Nikolai Bozhenov 82f0801c1b [Nios2] Target registration
Reviewers: craig.topper, hfinkel, joerg, lattner, zvi

Reviewed By: craig.topper

Subscribers: oren_ben_simhon, igorb, belickim, tvvikram, mgorny, llvm-commits, pavel.v.chupin, DavidKreitzer

Differential Revision: https://reviews.llvm.org/D32669
Patch by AndreiGrischenko <andrei.l.grischenko@intel.com>

llvm-svn: 304144
2017-05-29 09:48:30 +00:00
Saleem Abdulrasool f122423ace Support: adjust the default obj format for wasm
WebAssemly uses a custom object file format.  For the wasm targets,
default to the `Wasm` object file format.

llvm-svn: 304117
2017-05-29 00:14:57 +00:00
Akira Hatanaka b10bff1183 [ThinLTO] Do not assert when adding a module with a different but
compatible target triple

Currently, an assertion fails in ThinLTOCodeGenerator::addModule when
the target triple of the module being added doesn't match that of the
one stored in TMBuilder. This patch relaxes the constraint and makes
changes to allow target triples that only differ in their version
numbers on Apple platforms, similarly to what r228999 did.

rdar://problem/30133904

Differential Revision: https://reviews.llvm.org/D33291

llvm-svn: 303326
2017-05-18 03:52:29 +00:00
Alex Lorenz c748d7b57b [Triple] Add a "macos" OS type that acts as a synonym for "macosx"
The "macosx" OS type is still the canonical type. In the future "macos" will
become the canonical OS type (but we will still support "macosx").

rdar://27043820

Differential Revision: https://reviews.llvm.org/D32748

llvm-svn: 302011
2017-05-03 10:42:35 +00:00
Ismail Donmez 6dda31729c Add SUSE vendor
Summary: SUSE's ARM triples end with -gnueabi even though they are hard-float. This requires special handling of SUSE ARM triples. Hence we need a way to differentiate the SUSE as vendor. This CL adds that.

Reviewers: chandlerc, compnerd, echristo, rengolin

Reviewed By: rengolin

Subscribers: aemerson, rengolin, llvm-commits

Differential Revision: https://reviews.llvm.org/D32426

llvm-svn: 301174
2017-04-24 11:18:29 +00:00
Brad Smith 159f3bb80e Set default CPU for OpenBSD/arm to Cortex-A8
llvm-svn: 296493
2017-02-28 17:28:35 +00:00
George Burgess IV ccf11c2f9f [ARM] Add support for armv7ve triple in llvm (PR31358).
Gcc supports target armv7ve which is armv7-a with virtualization
extensions. This change adds support for this in llvm for gcc
compatibility.

Also remove redundant FeatureHWDiv, FeatureHWDivARM for a few models as
this is specified automatically by FeatureVirtualization.

Patch by Manoj Gupta.

Differential Revision: https://reviews.llvm.org/D29472

llvm-svn: 294661
2017-02-09 23:29:14 +00:00
Dan Gohman 1209c7ac16 [WebAssembly] Add triple support for the new wasm object format
Differential Revision: https://reviews.llvm.org/D26701

llvm-svn: 292252
2017-01-17 20:34:09 +00:00
Daniel Berlin 4056253c4d Revert "[Triple] Add Facebook vendor"
This reverts commit r287684

Objections on the review thread had not been addressed to
prior to commit.  I asked the committer to revert, but i expect they
are gone for the US holiday or something.

llvm-svn: 287798
2016-11-23 19:03:54 +00:00
Shoaib Meenai 5497121613 [Triple] Add Facebook vendor
Add a compiler vendor for Facebook, to enable future vendor-specific
behavior.

Differential Revision: https://reviews.llvm.org/D25136

llvm-svn: 287684
2016-11-22 19:36:26 +00:00
Pekka Jaaskelainen 8483cf0ae8 Add a little endian variant of TCE.
llvm-svn: 287111
2016-11-16 15:22:23 +00:00
Alex Bradbury b6e784a240 [RISCV] Recognise riscv32 and riscv64 in triple parsing code
This is the first in a series of 10 initial patches that incrementally add an 
MC layer for RISC-V to LLVM. See 
<http://lists.llvm.org/pipermail/llvm-dev/2016-August/103748.html> for more 
discussion.

Differential Revision: https://reviews.llvm.org/D23557

llvm-svn: 285707
2016-11-01 16:47:54 +00:00
David L Kreitzer 3155abfb57 Define "contiki" OS specifier.
Patch by Michael LeMay

Differential revision: http://reviews.llvm.org/D24897

llvm-svn: 284240
2016-10-14 14:41:46 +00:00
Javed Absar fb4b6e8db9 [ARM]: Add Cortex-R52 target to LLVM
This patch adds Cortex-R52, the new ARM real-time processor, to LLVM. 
Cortex-R52 implements the ARMv8-R architecture.

llvm-svn: 283542
2016-10-07 12:06:40 +00:00
Petr Hosek e023d62e76 [Triple] Add triple for Fuchsia
Fuchsia is a new operating system.

Differential Revision: https://reviews.llvm.org/D25116

llvm-svn: 283419
2016-10-06 05:17:26 +00:00
Mehdi Amini b7fb124512 Use StringRef in Triple API (NFC)
llvm-svn: 282996
2016-10-01 01:16:22 +00:00
Tom Stellard e190cd2834 Triple: Add opencl environment type
Summary:
For AMDGPU, we have been using the operating system component of the triple
for specifying the low-level runtime that is being used.  The rationale for
this is that the host operating system (e.g. Linux) is irrelevant for GPU code,
since its execution enviroment will be mostly controled by the low-level runtime
being used to execute the code.

In most cases, higher level languages have their own runtime which is
implemented on top of the low-level runtime.  The kernel ABIs of each
language mostly depend on the low-level runtime, but there may be some
slight differences between languages.  OpenCL for example, may append
additional arguments to the kernel in order to pass values like global
offsets or buffers for printf.  OpenMP, HCC, or other languages may want
to add their own values which differ from OpenCL.

The reason for adding a new opencl environment type is to make it possible for the backend
to distinguish between the ABIs of the higher-level languages and handle them correctly.
It seems cleaner to use the enviroment component for this rather than creating a new
OS type for every combination of low-level runtime / high-level language.

Reviewers: Anastasia, chandlerc

Subscribers: whchung, pekka.jaaskelainen, wdng, yaxunl, llvm-commits

Differential Revision: https://reviews.llvm.org/D24735

llvm-svn: 282218
2016-09-23 00:42:56 +00:00
Daniel Sanders 2cb55d7dfd [mips] Recognise the triple used by Debian stretch for mips64el.
Summary:
The triple used for this distribution is mips64el-linux-gnuabi64.

Reviewers: sdardis

Subscribers: sdardis, llvm-commits

Differential Revision: https://reviews.llvm.org/D22406

llvm-svn: 275966
2016-07-19 10:22:19 +00:00
Justin Bogner 068a8054ae IR: Set a TargetPrefix for nvvm intrinsics
Since these are named nvvm_* rather than nvptx_*, we also need to
update getArchTypePrefix. It's a bit unusual for getArchTypePrefix not
to match the backend name, but I think this fits the intent of the
function in this case.

llvm-svn: 274890
2016-07-08 17:25:18 +00:00
Pirama Arumuga Nainar 9c3aec2035 Add RenderScript ArchType
Summary:
Add renderscript32 and renderscript64 ArchTypes.  This is to configure
the ABI requirement on 32-bit RenderScript that 'long' types have 64-bit
size and alignment.  64-bit RenderScript is the same as AArch64, but is
added here for completeness.

Reviewers: echristo, rsmith

Subscribers: aemerson, jfb, rampitec, dschuff, mehdi_amini, llvm-commits, srhines

Differential Revision: http://reviews.llvm.org/D21333

llvm-svn: 274412
2016-07-02 00:23:09 +00:00
Davide Italiano 901269c8c9 [Triple] Reimplement isLittleEndian(). Now it works for arm too.
Differential Revision:   http://reviews.llvm.org/D21846

llvm-svn: 274154
2016-06-29 20:01:39 +00:00
Davide Italiano 941685e9f4 [Triple] Add isLittleEndian().
This allows us to query about the endianness without having to
look at DataLayout. The API will be used (and tested) in lld,
in order to find out the endianness of BitcodeFiles.

Briefly discussed with Rafael.

llvm-svn: 274090
2016-06-29 01:56:27 +00:00
Rafael Espindola a895a0cd01 Add support for musl-libc on ARM Linux.
Patch by Lei Zhang!

llvm-svn: 273726
2016-06-24 21:14:33 +00:00
Rafael Espindola 9768b0ae73 Add a Musl environment to the triple.
It will be used in clang.

Patch by Lei Zhang.

llvm-svn: 272660
2016-06-14 12:45:33 +00:00
Matt Arsenault 5e845e54f5 Add AMDGPU related triple vendors/OSes
As support expands to more runtimes, we'll need to
distinguish between more than just HSA and unknown.
This also lets us stop using unknown everywhere.

llvm-svn: 260790
2016-02-13 01:56:21 +00:00
Tim Northover 94bdbd09d7 ARMv7k: use Cortex-A7 by default even for tvOS
Also actually test the default CPU from those triples.

llvm-svn: 260621
2016-02-11 23:49:08 +00:00
Jacques Pienaar dbfe8700cb [lanai] Add Lanai triple.
Add triple for the Lanai backend.

General Lanai backend discussion on llvm-dev thread "[RFC] Lanai backend".

Differential Revision: http://reviews.llvm.org/D17003

llvm-svn: 260545
2016-02-11 17:16:20 +00:00
Matt Arsenault 429f28066c AMDGPU: Fix getArchTypePrefix
llvm-svn: 258525
2016-01-22 19:09:12 +00:00
Kelvin Li 510498c0d3 parseArch() supports more variations of arch names for PowerPC builds
llvm-svn: 258103
2016-01-19 00:04:41 +00:00
Bradley Smith e26f799422 [ARM] Add ARMv8-M Baseline/Mainline LLVM targeting
llvm-svn: 257878
2016-01-15 10:24:39 +00:00
Tamas Berghammer 904d5fe496 Mark arm as the 32bit variant of aarch64 in Triple
Change Triple::get32BitArchVariant to return arm/armeb as the 32bit
variant of aarch64/aarch64_be and do the same change for the oppoiste
direction in Triple::get64BitArchVariant.

Differential revision: http://reviews.llvm.org/D15529

llvm-svn: 257048
2016-01-07 10:41:12 +00:00
David Majnemer ff1d084aa2 [MC] Don't use the architecture to govern which object file format to use
InitMCObjectFileInfo was trying to override the triple in awkward ways.
For example, a triple specifying COFF but not Windows was forced as ELF.
This makes it easy for internal invariants to get violated, such as
those which triggered PR25912.

This fixes PR25912.

llvm-svn: 256226
2015-12-22 01:39:04 +00:00
Dan Gohman 05ac43fec3 [WebAssembly] Experimental ELF writer support
This creates the initial infrastructure for writing ELF output files. It
doesn't yet have any implementation for encoding instructions.

Differential Revision: http://reviews.llvm.org/D15555

llvm-svn: 255869
2015-12-17 01:39:00 +00:00
Oliver Stannard 4667071574 [ARM] Add ARMv8.2-A to TargetParser
Add ARMv8.2-A to TargetParser, so that it can be used by the clang
command-line options and the .arch directive.

Most testing of this will be done in clang, checking that the
command-line options that this enables work.

Differential Revision: http://reviews.llvm.org/D15037

llvm-svn: 254400
2015-12-01 10:33:56 +00:00
Artyom Skrobov 7f0fc9ccb7 Avoid duplicate entry for cortex-a7 in the TargetParser (NFC)
Reviewers: t.p.northover, rengolin

Subscribers: aemerson, rengolin, llvm-commits

Differential Revision: http://reviews.llvm.org/D14757

llvm-svn: 253676
2015-11-20 16:46:14 +00:00
Artyom Skrobov 91f339ab3f Handle ARMv6-J as an alias, instead of fake architecture
Summary:
This follows D14577 to treat ARMv6-J as an alias for ARMv6,
instead of an architecture in its own right.

The functional change is that the default CPU when targeting ARMv6-J
changes from arm1136j-s to arm1136jf-s, which is currently used as
the default CPU for ARMv6; both are, in fact, ARMv6-J CPUs.

The J-bit (Jazelle support) is irrelevant to LLVM, and it doesn't
affect code generation, attributes, optimizations, or anything else,
apart from selecting the default CPU.

Reviewers: rengolin, logan, compnerd

Subscribers: aemerson, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D14755

llvm-svn: 253675
2015-11-20 16:46:09 +00:00
Artyom Skrobov f187a65f99 Handle ARMv6KZ naming
Summary:
* ARMv6KZ is the "canonical" name, given in the ARMARM
* ARMv6Z is an "official abbreviation" for it, mentioned in the ARMARM
* ARMv6ZK is a popular misspelling, which we should support as an alias.

The patch corrects the handling of the names.

Functional changes:
* ARMv6Z no longer treated as an architecture in its own right
* ARMv6ZK renamed to ARMv6KZ, accepting ARMv6ZK as an alias
* arm1176jz-s and arm1176jzf-s recognized as ARMv6ZK, instead of ARMv6K
* default ARMv6K CPU changed to arm1176j-s

Reviewers: rengolin, logan, compnerd

Subscribers: aemerson, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D14568

llvm-svn: 253206
2015-11-16 14:05:32 +00:00
Artyom Skrobov 2c2f378f8a Cull non-standard variants of ARM architectures (NFC)
Summary:
This patch changes ARMV5, ARMV5E, ARMV6SM, ARMV6HL, ARMV7, ARMV7L,
ARMV7HL, ARMV7EM to be treated as aliases for the corresponding
standard architectures, instead of as actual architectures.

Reviewers: rengolin

Subscribers: aemerson, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D14577

llvm-svn: 252903
2015-11-12 15:51:41 +00:00
Tim Northover 5e6fce6492 ARM: add watchOS default version support function.
It's useful for Clang's Driver faff.

llvm-svn: 251574
2015-10-28 22:57:14 +00:00
Tim Northover 2d4d161519 ARM: support .watchos_version_min and .tvos_version_min.
These MachO file directives are used by linkers and other tools to provide
compatibility information, much like the existing .ios_version_min and
.macosx_version_min.

llvm-svn: 251569
2015-10-28 22:36:05 +00:00
Michael Kuperstein e1194bdb4f [X86] Make elfiamcu an OS, not an environment.
GNU tools require elfiamcu to take up the entire OS field, so, e.g.
i?86-*-linux-elfiamcu is not considered a legal triple.
Make us compatible.

Differential Revision: http://reviews.llvm.org/D14081

llvm-svn: 251390
2015-10-27 07:23:59 +00:00
Michael Kuperstein fe897623f3 [X86] Add support for elfiamcu triple
This adds support for the i?86-*-elfiamcu triple, which indicates the IAMCU psABI is used.

Differential Revision: http://reviews.llvm.org/D13977

llvm-svn: 251222
2015-10-25 08:07:37 +00:00
Dylan McKay b1d469c657 Initial migration of AVR backend
This patch adds the underlying infrastructure for an AVR backend to be included into LLVM. It is the first of a series of patches aimed at moving the out-of-tree AVR backend into the tree.

It consists of adding a new`Triple` target 'avr'.

llvm-svn: 250492
2015-10-16 03:10:30 +00:00
Chandler Carruth f054eca167 [ADT] Micro-optimize the Triple constructor by doing a single split and
re-using the resulting components rather than repeatedly splitting and
re-splitting to compute each component as part of the initializer list.

This is more work on PR23676. Sadly, it doesn't help much. It removes
the constructor from my profile, but doesn't make a sufficient dent in
the total time. But it should play together nicely with subsequent
changes.

llvm-svn: 247250
2015-09-10 07:51:43 +00:00
Chandler Carruth 477121721b [ADT] Add a single-character version of the small vector split routine
on StringRef. Finding and splitting on a single character is
substantially faster than doing it on even a single character StringRef
-- we immediately get to a *very* tuned memchr call this way.

Even nicer, we get to this even in a debug build, shaving 18% off the
runtime of TripleTest.Normalization, helping PR23676 some more.

llvm-svn: 247244
2015-09-10 06:07:03 +00:00
Douglas Katzman 78425200ee Add Myriad into enum VendorType
Differential Revision: http://reviews.llvm.org/D12540

llvm-svn: 246732
2015-09-02 23:11:25 +00:00
Chandler Carruth 5543fbc9b2 Stop calling the flat out insane ARM target parsing code unless the
architecture string is something quite weird. Similarly delay calling
the BPF parsing code, although that is more reasonable.

To understand why I was motivated to make this change, it cuts the time
for running the ADT TripleTest unittests by a factor of two in
non-optimized builds (the developer default) and reduces my 'check-llvm'
time by a full 15 seconds. The implementation of parseARMArch is *that*
slow. I tried to fix it in the prior series of commits, but frankly,
I have no idea how to finish fixing it. The entire premise of the
function (to allow 'v7a-unknown-linux' or some such to parse as an
'arm-unknown-linux' triple) seems completely insane to me, but I'll let
the ARM folks sort that out. At least it is now out of the critical path
of every developer working on LLVM. It also will likely make some other
folks' code significantly faster as I've heard reports of 2% of time
spent in triple parsing even in optimized builds!

I'm not done making this code faster, but I am done trying to improve
the ARM target parsing code.

llvm-svn: 246378
2015-08-30 09:54:34 +00:00