Commit Graph

922 Commits

Author SHA1 Message Date
Eric Christopher d5c75eed44 Add a couple of missing vsx load and store intrinsics.
Patch by Jing Yu!

llvm-svn: 266122
2016-04-12 21:08:54 +00:00
Michael Zuckerman 04fb3bc682 [Clang][BuiltIn][avx512] Adding avx512 (shuf,sqrt{ss|sd},rsqrt ) builtin to clang
llvm-svn: 266048
2016-04-12 07:59:39 +00:00
Michael Zuckerman 81f468c859 [Clang][AVX512][BuiltIn] Adding avx512 ( psll{d|q}512,psllv{16si|8di},psra{d|q}512,psrav{16si|8di},pternlog{d|q}{128|256|512} ) builtin to clang
Differential Revision: http://reviews.llvm.org/D18926

llvm-svn: 265964
2016-04-11 17:04:21 +00:00
Michael Zuckerman 6b5f4d8ad1 [CLANG] [AVX512] [BUILTIN] Adding PSRA{Q|D|QI|DI}{128|256|512} builtin
Differential Revision: http://reviews.llvm.org/D17693

llvm-svn: 265952
2016-04-11 15:46:39 +00:00
Michael Zuckerman 1af947a7b3 [Clang][AVX512][BuiltIn] Adding avx512 ( punpck{h|l}{dq|qdq}{128|256|512},rndscale{ss|sd}, {scalef{ss|sd|pd512|ps512} ) builtin to clang
Differential Revision: http://reviews.llvm.org/D18929

llvm-svn: 265935
2016-04-11 12:32:31 +00:00
Michael Zuckerman 07525091e6 [Clang][AVX512][BuiltIn] Adding avx512 ( ptest{n}m{b|w}{128|256|512} ) builtin to clang
Differential Revision: http://reviews.llvm.org/D18924

llvm-svn: 265928
2016-04-11 10:22:07 +00:00
Michael Zuckerman d8d2f62107 [Clang][AVX512][BuiltIn] Adding avx512 ( vperm{i|t}2var, vpermil{var}{ps|pd}{256|512} ) builtin to clang.
Differential Revision: http://reviews.llvm.org/D18933

llvm-svn: 265915
2016-04-11 07:15:34 +00:00
Michael Zuckerman 8d16199b7b [Clang][AVX512][BuiltIn] Adding avx512 ( vcvt ) builtin to clang
Differential Revision: http://reviews.llvm.org/D18932

llvm-svn: 265904
2016-04-10 17:24:03 +00:00
Michael Zuckerman cdd54c83d8 Adding avx512 (unpck{h|l}{pd|ps}, rcp14{pd|ps}{128|256},vplzcnt{d|q} ) builtin to clang
Differential Revision: http://reviews.llvm.org/D18931

llvm-svn: 265896
2016-04-10 12:54:23 +00:00
Michael Zuckerman fa7ccc5bcf [Clang][AVX512][BuiltIn] Adding avx512 ( store ) builtin to clang
Differential Revision: http://reviews.llvm.org/D18925

llvm-svn: 265895
2016-04-10 10:51:04 +00:00
Ekaterina Romanova f2ed62027d Add doxygen comments to emmintrin.h's intrinsics. Only around 25% of the intrinsics in this file are documented now. The patches for the rest of the intrisics in this file will be send out later.
The doxygen comments are automatically generated based on Sony's intrinsics document.

I got an OK from Eric Christopher to commit doxygen comments without prior code review upstream. This patch was internally reviewed by Paul Robinson.

llvm-svn: 265844
2016-04-08 20:45:48 +00:00
Justin Lebar 25c36fd61b [CUDA] Tweak math forward declares so we're compatible with libstdc++4.9.
Summary:
See comments in patch; we were assuming that some stdlib math functions
would be defined in namespace std, when in fact the spec says they
should be defined in the global namespace.  libstdc++4.9 became more
conforming and broke us.

This new implementation seems to cover the known knowns.

Reviewers: rsmith

Subscribers: cfe-commits, tra

Differential Revision: http://reviews.llvm.org/D18882

llvm-svn: 265751
2016-04-07 23:55:53 +00:00
Michael Zuckerman 5ae71243c2 Fixing duplicate declaration "_mm256 _mm_set_epi32" in revision 262177
Differential Revision: http://reviews.llvm.org/D17685

llvm-svn: 265677
2016-04-07 14:44:08 +00:00
Yunzhong Gao c293a2688d Add copyright notice to the modulemap file.
The module.modulemap file in the lib/Headers directory was missing the LLVM
copyright notice. This patch adds the copyright notice just like the rest of
the files in this directory.

Differential Revision: http://reviews.llvm.org/D18709

llvm-svn: 265325
2016-04-04 18:46:09 +00:00
Justin Lebar cb28f15fbc [CUDA] Fix typo in __clang_cuda_runtime_wrapper.h.
We're #including the wrong file!

llvm-svn: 265083
2016-04-01 00:25:42 +00:00
Justin Lebar 0cda764430 [CUDA] Add math forward declares to CUDA header wrapper.
Summary:
This is necessary for a future patch which will make all constexpr
functions implicitly host+device.  cmath may declare constexpr
functions, but these we do *not* want to be host+device.  The forward
declares added in this patch prevent this (because the rule will be,
constexpr functions become implicitly host+device unless they're
preceeded by a decl with __device__).

Reviewers: tra

Subscribers: cfe-commits, rnk, rsmith

Differential Revision: http://reviews.llvm.org/D18539

llvm-svn: 264963
2016-03-30 23:30:14 +00:00
Justin Lebar 50e5f184d8 [CUDA] Add missing #undef __DEVICE__ to CUDA shim header.
llvm-svn: 264742
2016-03-29 16:24:23 +00:00
Michael Zuckerman def78750b7 [CLANG][avx512][BUILTIN] Adding fixupimm{pd|ps|sd|ss}
getexp{sd|ss} getmant{sd|ss} kunpck{di|si} loada{pd|ps} loaddqu{di|hi|qi|si} max{sd|ss} min{sd|ss} kmov16 builtins to clang


Differential Revision: http://reviews.llvm.org/D18215

llvm-svn: 264574
2016-03-28 12:23:09 +00:00
Justin Lebar 334535132f [CUDA] Don't define __NVCC__.
Summary:
We decided this makes life too difficult for code authors.  For example,
people may want to detect NVCC and disable variadic templates, which
NVCC does not support, but which we do.

Since people are going to have to change compiler flags *anyway* in
order to compile with clang, if they really want the old behavior, they
can pass -D__NVCC__.

Tested with tensorflow and thrust, no apparent problems.

Reviewers: tra

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D18417

llvm-svn: 264205
2016-03-23 22:42:27 +00:00
John Thompson debce24c90 D18325: Added mm_malloc module export.
llvm-svn: 264092
2016-03-22 20:57:51 +00:00
Daniel Jasper be50836514 Make functions in altivec.h be __inline__. As they are all also marked
__always_inline__, this has likely been meant from the start.

Review: http://reviews.llvm.org/D18015
llvm-svn: 263302
2016-03-11 22:13:28 +00:00
Ekaterina Romanova 13f189da86 Add doxygen comments to avxintrin.h's intrinsics.
Only around 25% of the intrinsics in this file are documented here. The patches for the other half will be sent out later.

The doxygen comments are automatically generated based on Sony's intrinsics document.

I got an OK from Eric Christopher to commit doxygen comments without prior code review upstream.

llvm-svn: 263175
2016-03-11 00:05:54 +00:00
Ekaterina Romanova e2961f71d2 Add doxygen comments to xmmintrin.h's intrinsics.
Only half of the intrinsics in this file is documented here. The patch for the other half will be sent out later.

The doxygen comments are automatically generated based on Sony's intrinsics document.

I got an OK from Eric Christopher to commit doxygen comments without prior code review upstream.

llvm-svn: 263098
2016-03-10 09:37:04 +00:00
Kit Barton fbab158767 [PPC] FE support for generating VSX [negated] absolute value instructions
Includes new built-in, conversion of built-in to target-independent intrinsic
and update in the header file. Tests are also updated. There is a second part in
the backend for which I will post a separate code-review. BACKEND PART SHOULD BE
COMMITTED FIRST.

Phabricator: http://reviews.llvm.org/D17816
llvm-svn: 263051
2016-03-09 19:28:31 +00:00
Michael Zuckerman 10d6f9ac04 Fixing wrong header title name.
Differential Revision: http://reviews.llvm.org/D17917

llvm-svn: 263007
2016-03-09 11:26:45 +00:00
Ekaterina Romanova c8976d58fe Add doxygen comments to bmiintrin.h's intrinsics.
The doxygen comments are automatically generated based on Sony's intrinsics document.

I got an OK from Eric Christopher to commit doxygen comments without prior code review upstream.

llvm-svn: 262895
2016-03-08 01:36:59 +00:00
Michael Zuckerman e71d59fc4f [CLANG][AVX512][BUILTIN] Add builtin vcomi{ss|sd}
Differential Revision: http://reviews.llvm.org/D17919

llvm-svn: 262847
2016-03-07 19:15:00 +00:00
Michael Zuckerman 9f33848f04 [CLANG][AVX512][BUILTIN] Adding new feature flag headed files and new BUILTIN vpermi2varq{i|t}{128|256|512}{mask|maskz}
Differential Revision: http://reviews.llvm.org/D17917

llvm-svn: 262834
2016-03-07 17:04:11 +00:00
Michael Zuckerman 0190c65571 [CLANG][AVX512][BUILTIN] Adding new feature flag header file and new builtin vpmadd52{h|l}uq{128|256|512}{mask|maskz}
Differential Revision: http://reviews.llvm.org/D17915

llvm-svn: 262820
2016-03-07 09:55:55 +00:00
Michael Zuckerman 912be16a0e [CLANG][AVX512][BUILTIN] Adding vpmultishiftqb{128|256|512}
Differential Revision: http://reviews.llvm.org/D17914

llvm-svn: 262817
2016-03-07 08:29:10 +00:00
Michael Zuckerman 0d67e4b5d6 [CLANG][AVX512][BUILTIN] movddup{128|256|512}
Differential Revision: http://reviews.llvm.org/D17826

llvm-svn: 262617
2016-03-03 13:43:05 +00:00
Michael Zuckerman 1ad03e7f01 [CLANG][AVX512][BUILTIN] movdqu{qi|hi} {128|256|512}
Differential Revision: http://reviews.llvm.org/D17814

llvm-svn: 262609
2016-03-03 11:34:52 +00:00
Michael Zuckerman ffbb67a8e2 [CLANG][AVX512][BUILTIN] movdqa{32|64}{load|store|}{128|256|512}
Differential Revision: http://reviews.llvm.org/D17812

llvm-svn: 262598
2016-03-03 09:26:01 +00:00
Michael Zuckerman abbe34bce6 [Clang][AVX512][BUILTIN] Adding PSRL{W|WI}{128|256|512}
Differential Revision: http://reviews.llvm.org/D17754

llvm-svn: 262593
2016-03-03 08:55:20 +00:00
Ekaterina Romanova 4711441e52 This patch adds doxygen comments for all the intrinsincs in the header file tmmintrin.h.
The doxygen comments are automatically generated based on Sony's intrinsics document.

I got an OK from Eric Christopher to commit doxygen comments without prior code review upstream.

llvm-svn: 262565
2016-03-03 00:20:11 +00:00
Michael Zuckerman 3df95e711f [CLANG] [AVX512] [BUILTIN] Adding PSRA{W|WI}{128|256|512}.
Differential Revision: http://reviews.llvm.org/D17706

llvm-svn: 262481
2016-03-02 12:06:06 +00:00
Michael Zuckerman d15c95a793 [CLANG] [AVX512] [BUILTIN] Adding PSRAV
Differential Revision: http://reviews.llvm.org/D17699

llvm-svn: 262471
2016-03-02 09:05:46 +00:00
Ekaterina Romanova c207006bbb This patch adds doxygen comments for the intrinsincs in the header file popcntintrin.h.
The doxygen comments are automatically generated based on Sony's intrinsics documentation.

Differential Revision: http://reviews.llvm.org/D17550 

llvm-svn: 262385
2016-03-01 20:04:57 +00:00
Kit Barton 2b36b15834 [PPC64][VSX] Add short, char, and bool data type for vec_vsx_ld and vec_vsx_st intrinsics
Issue: https://llvm.org/bugs/show_bug.cgi?id=26720

Fix compile error when building ffmpeg for PowerPC64LE because of some
vec_vsx_ld/vec_vsx_st intrinsics are not supported by current clang.

New added intrinsics:

(vector) {signed|unsigned} {short|char} vec_vsx_ld: (total: 8)
bool vec_vsx_ld: (total: 1)
(vector) {signed|unsigned} {short|char} vec_vsx_st: (total: 8)
bool vec_vsx_st: (total: 1)
Total: 18 intrinsics

Phabricator: http://reviews.llvm.org/D17637
llvm-svn: 262359
2016-03-01 18:11:28 +00:00
Michael Zuckerman d176d744af [CLANG][AVX512][BUILTIN] Adding PSRL{DI|QI}{128|256|512} builtin
Differential Revision: http://reviews.llvm.org/D17714

llvm-svn: 262355
2016-03-01 17:49:03 +00:00
Michael Zuckerman 0165e7669c [CLANG][AVX512][BUILTIN] Adding PSRLV builtin
Differential Revision: http://reviews.llvm.org/D17718

llvm-svn: 262326
2016-03-01 13:03:45 +00:00
Michael Zuckerman 1ac360cca4 [CLANG] [AVX512] [BUILTIN] Adding PSRA{Q|D|QI|DI}{128|256|512} builtin
Differential Revision: http://reviews.llvm.org/D17693

llvm-svn: 262321
2016-03-01 11:38:16 +00:00
Logan Chien 3267ca225d Add ARM EHABI-related constants to unwind.h.
Adds a number of constants, defined in the ARM EHABI spec, to the Clang
lib/Headers/unwind.h header. This is prerequisite for landing
http://reviews.llvm.org/D15781, as previously discussed there.

Patch by Timon Van Overveldt.

llvm-svn: 262178
2016-02-28 15:01:42 +00:00
Michael Zuckerman 431b0e18b4 [CLANG] [AVX512] [BUILTIN] Adding PSLL{V|W|Wi}{128|256|512} builtin
Differential Revision: http://reviews.llvm.org/D17685

llvm-svn: 262177
2016-02-28 07:39:34 +00:00
Chris Bieneman 2c6c01a4fc [CMake] Fixing install-clang-headers dependencies to depend on generating the headers.
llvm-svn: 261911
2016-02-25 18:39:19 +00:00
Justin Lebar d7a35492ad [CUDA] Add conversion operators for threadIdx, blockIdx, gridDim, and blockDim to uint3 and dim3.
Summary:
This lets you write, e.g.

  uint3 a = threadIdx;
  uint3 b = blockIdx;
  dim3 c = gridDim;
  dim3 d = blockDim;

which is legal in nvcc, but was not legal in clang.

The fact that e.g. the type of threadIdx is not actually uint3 is still
observable, but now you have to try to observe it.

Reviewers: tra

Subscribers: echristo, cfe-commits

Differential Revision: http://reviews.llvm.org/D17561

llvm-svn: 261777
2016-02-24 21:49:33 +00:00
Justin Lebar c8dae5378b [CUDA] Add hack so code which includes "curand.h" doesn't break.
Summary:
curand.h includes curand_mtgp32_kernel.h.  In host mode, this header
redefines threadIdx and blockDim, giving them their "proper" types of
uint3 and dim3, respectively.

clang has its own plan for these variables -- their types are magic
builtin classes.  So these redefinitions are incompatible.

As a hack, we force-include the offending CUDA header and use #defines
to get the right types for threadIdx and blockDim.

Reviewers: tra

Subscribers: echristo, cfe-commits

Differential Revision: http://reviews.llvm.org/D17562

llvm-svn: 261776
2016-02-24 21:49:31 +00:00
Michael Zuckerman 6c317515e4 [CLANG] [AVX512] [BUILTIN] Adding PSHUF{L|H}W{128|256|512} builtin to clang .
Differential Revision: http://reviews.llvm.org/D17539

llvm-svn: 261755
2016-02-24 17:39:35 +00:00
Michael Zuckerman e98cc7477f [CLANG] [AVX512] [BUILTIN] Adding prorv{d|q}{128|256|512} builtin to clang
Differential Revision: http://reviews.llvm.org/D17512

llvm-svn: 261641
2016-02-23 15:59:47 +00:00
Michael Zuckerman 4924c7a2b5 [CLANG] [AVX512] [BUILTIN] Adding pro{lv|r}{d|q}{128|256|512} builtin to clang
Adding closer to the end of macro }->}) 

Differential Revision: http://reviews.llvm.org/D17506

llvm-svn: 261638
2016-02-23 14:23:53 +00:00
Michael Zuckerman 0231f1649b [CLANG] [AVX512] [BUILTIN] Adding pro{lv|r}{d|q}{128|256|512} builtin to clang
Differential Revision: http://reviews.llvm.org/D17506

llvm-svn: 261635
2016-02-23 13:41:13 +00:00
Michael Zuckerman 477e0a326b [CLANG] [AVX512] [BUILTIN] Adding prol{d|q|w}{128|256|512} builtin to clang .
Fixing problem with the lib/include/avx512vlintrin.h file. 
Adding one more _ to the prefix of _extension__ -> __extension__.

Differential Revision: http://reviews.llvm.org/D16985

llvm-svn: 261518
2016-02-22 09:42:57 +00:00
Michael Zuckerman 38a2727764 [CLANG] [AVX512] [BUILTIN] Adding prol{d|q|w}{128|256|512} builtin to clang .
Differential Revision: http://reviews.llvm.org/D16985

llvm-svn: 261516
2016-02-22 09:05:41 +00:00
Michael Zuckerman 7a33dce4ef [CLANG] [AVX512] [BUILTIN] Adding pmovzx{b|d|w}{w|d|q}{128|256|512} builtin to clang
Differential Revision: http://reviews.llvm.org/D16961

llvm-svn: 261471
2016-02-21 14:00:11 +00:00
David Majnemer 7a0d7d6be9 Remove a duplicate declaration specifier from _ReadBarrier
This fixes PR26675.

llvm-svn: 261388
2016-02-20 00:57:00 +00:00
Michael Zuckerman 7cdb72f7ea [CLANG] [AVX512] [BUILTIN] Adding pmovsx{b|d|w}{w|d|q}{128|256|512} builtin to clang
Differential Revision: http://reviews.llvm.org/D16955

llvm-svn: 261196
2016-02-18 09:09:34 +00:00
Artem Belevich 7f522b7876 Added missing '__'.
llvm-svn: 260719
2016-02-12 20:26:43 +00:00
Eric Christopher 39a84d0b9b Update functions in clang supplied headers to use the compiler reserved
namespace for arguments.

llvm-svn: 260647
2016-02-12 02:22:53 +00:00
Richard Smith 66a7385e27 <float.h>: do not define DECIMAL_DIG in -std=c89 mode; this macro was added in C99.
Patch by Jorge Teixeira!

llvm-svn: 260639
2016-02-12 01:15:33 +00:00
Eric Christopher 0466c7ce23 Use __ before argument names in provided headers.
llvm-svn: 260631
2016-02-12 00:32:23 +00:00
Richard Smith b473e1e473 In C11, provide macros FLT_DECIMAL_DIG, DBL_DECIMAL_DIG, and LDBL_DECIMAL_DIG in <float.h>.
Patch by Jorge Teixeira!

llvm-svn: 260577
2016-02-11 19:57:37 +00:00
Ekaterina Romanova a61946d551 This patch adds doxygen comments for all the intrinsincs in the header file f16cintrin.h. The doxygen comments are automatically generated based on Sony's intrinsics document.
Differential Revision: http://reviews.llvm.org/D17021

llvm-svn: 260333
2016-02-10 00:12:24 +00:00
Ekaterina Romanova d416747803 This patch adds doxygen comments for all the intrinsincs in the header file pmmintrin.h. The doxygen comments are automatically generated based on Sony's intrinsics document.
Differential Revision: http://reviews.llvm.org/D16913

llvm-svn: 260160
2016-02-08 22:35:09 +00:00
Igor Breger 9c2a0bfa13 AVX512: Change builtin function name for scalar intrinsics. Add "mask" to function name to reflect the function behavior.
Differential Revision: http://reviews.llvm.org/D16957

llvm-svn: 260088
2016-02-08 12:36:48 +00:00
Artem Belevich 2aad2b3500 [CUDA] Bug 26497 : Remove wrappers for variants provided by CUDA headers.
... and pull global-scope ones into std namespace with using-declaration.

Differential Revision: http://reviews.llvm.org/D16932

llvm-svn: 259944
2016-02-05 22:54:05 +00:00
Artem Belevich 7b660e2604 [CUDA] added declarations for device-side system calls
...and std:: wrappers for free/malloc.

llvm-svn: 259690
2016-02-03 20:53:58 +00:00
Ekaterina Romanova 0e19cf2dd8 This patch adds doxygen comments for the intrinsincs in the header file __wmmintrin_aes.h.
The doxygen comments are automatically generated based on Sony's intrinsics document.

Differential Revision: http://reviews.llvm.org/D16562

llvm-svn: 259275
2016-01-29 23:59:00 +00:00
Ekaterina Romanova deec50a3d2 This patch adds doxygen comments for the intrinsincs in the header file __wmmintrin_pclmul.h. The doxygen comments are automatically generated based on Sony's intrinsics document.
Differential Revision: http://reviews.llvm.org/D15999

llvm-svn: 259239
2016-01-29 20:37:14 +00:00
Artem Belevich c5f41a34e5 [CUDA] Implemented device-side support functions in <cmath>.
CUDA expects math functions in std:: namespace to work on device side.
In order to make it work with clang without allowing device-side code
generation for functions w/o appropriate target attributes, this patch
provides device-side implementations for <cmath> functions. Most of
them call global-scope math functions provided by CUDA headers. In few
cases we use clang builtins.

Tested out-of tree by compiling and running thrust's unit_tests.
https://github.com/thrust/thrust/tree/master/testing

Differential Revision: http://reviews.llvm.org/D16593

llvm-svn: 258880
2016-01-26 23:37:29 +00:00
Chris Bieneman 2bf68c6c1c Remove autoconf support
Summary:
This patch is provided in preparation for removing autoconf on 1/26. The proposal to remove autoconf on 1/26 was discussed on the llvm-dev thread here: http://lists.llvm.org/pipermail/llvm-dev/2016-January/093875.html

    "This is the way [autoconf] ends
    Not with a bang but a whimper."
    -T.S. Eliot

Reviewers: chandlerc, grosbach, bob.wilson, echristo

Subscribers: klimek, cfe-commits

Differential Revision: http://reviews.llvm.org/D16472

llvm-svn: 258862
2016-01-26 21:30:40 +00:00
Justin Lebar 3039a593db [CUDA] Make printf work.
Summary:
The code in CGCUDACall is largely based on a patch written by Eli
Bendersky:
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20140324/210218.html

That patch implemented an LLVM pass lowering printf to vprintf; this
one does something similar, but in Clang codegen.

Reviewers: echristo

Subscribers: cfe-commits, jhen, tra, majnemer

Differential Revision: http://reviews.llvm.org/D16372

llvm-svn: 258642
2016-01-23 21:28:14 +00:00
Ekaterina Romanova 08d1f2431d 2 missing intrinsics _cvtss_sh and _mm_cvtps_ph were added to the intrinsics header f16intrin.h
Differential Revision: http://reviews.llvm.org/D16177

llvm-svn: 258492
2016-01-22 06:50:50 +00:00
Adam Nemet e708747129 [AVX512] Fix typo in r226298
Hal noticed that the double/float got mixed up on the parameters for
these.

llvm-svn: 258108
2016-01-19 02:02:25 +00:00
Kyle Butt 436ff85b63 [PPC] Add long long/double support for vec_cts, vec_ctu and vec_ctf
Add long long/double support for vec_cts, vec_ctu and vec_ctf.

Similar to this change in GCC:
https://gcc.gnu.org/ml/gcc-patches/2014-08/msg02653.html

Patch by Tim Shen.

llvm-svn: 257135
2016-01-08 02:00:48 +00:00
David Majnemer 30f9bfd574 Reimplement __readeflags and __writeeflags on top of intrinsics
Lean on LLVM to provide this functionality now that it provides the
necessary intrinsics.

llvm-svn: 256686
2016-01-01 06:50:08 +00:00
Asaf Badouh a9d1e18f48 [X86][PKU] add clang intrinsic for {RD|WR}PKRU
Differential Revision: http://reviews.llvm.org/D15837

llvm-svn: 256672
2015-12-31 14:14:07 +00:00
Eric Christopher 7f7d9bea6f Fix up comment in header.
llvm-svn: 256508
2015-12-28 19:07:46 +00:00
Michael Kuperstein 591278c08d [X86] Add missing m64/int64 conversions
Define the 64-bit equivalents of _m_to_int and _m_from_int.

Differential Revision: http://reviews.llvm.org/D15572

llvm-svn: 256122
2015-12-20 12:37:18 +00:00
Michael Kuperstein beae026738 [X86] Add signed aliases for popcnt intrinsics
The Intel manual documents both an unsigned form (_mm_popcnt_u32)
and a signed form (_popcnt32) of the intrinsic. Add the missing signed form.

Differential Revision: http://reviews.llvm.org/D15568

llvm-svn: 256121
2015-12-20 12:35:35 +00:00
Artem Belevich 8e9ba042a6 [CUDA] runtime wrapper header tweaks
* Pull in host-only implementations of few CUDA-specific math functions.
* #nclude <cmath> early to prevent its inclusion from CUDA headers after
  they've messed with __THROW macro.

llvm-svn: 255933
2015-12-17 22:25:22 +00:00
Artem Belevich 7fda3c9ff3 [CUDA] renamed cuda_runtime.h wrapper to __cuda_runtime.h
Currently it's easy to break CUDA compilation by passing
"-isystem /path/to/cuda/include" to compiler which leads to
compiler including real cuda_runtime.h from there instead
of the wrapper we need.

Renaming the wrapper ensures that we can include the wrapper
regardless of user-specified include paths and files.

Differential Revision: http://reviews.llvm.org/D15534

llvm-svn: 255802
2015-12-16 18:51:59 +00:00
Asaf Badouh 5e4248b4e0 [x86][avx512] more changes in intrinsics to be align with gcc format
Differential Revision: http://reviews.llvm.org/D15328

llvm-svn: 255012
2015-12-08 12:34:38 +00:00
Asaf Badouh 3e5111e313 [avx512] rename gcc intrinsics to be align with gcc format
rename the gcc intrinsics suffix : _mask ->_round

Differential Revision: http://reviews.llvm.org/D15284

llvm-svn: 254906
2015-12-07 13:14:22 +00:00
Paul Robinson 941bc91518 Move _mm256_cvtps_ph and _mm256_cvtph_ps to immintrin.h.
This more closely matches their locations as described by Intel
documentation, and lets us remove a pair of redundant typedefs.

Differential Revision: http://reviews.llvm.org/D15127

llvm-svn: 254528
2015-12-02 18:41:52 +00:00
Craig Topper 5ec97a7b9b [X86] Improve codegen for AVX2 gather with an all 1s mask.
Use undefined instead of setzero as the pass through input since its going to be fully overwritten. Use cmpeq of two zero vectors to produce the all 1s vector. Casting -1 to a double and vectorizing causes a constant load of a -1.0 floating point value.

llvm-svn: 254389
2015-12-01 07:12:59 +00:00
Craig Topper e20b8c68ed [X86] _mm256_permutevar8x32_ps should take an integer vector for its shuffle index input.
llvm-svn: 254270
2015-11-29 22:53:32 +00:00
Craig Topper 3a71f35a67 [X86] Remove temporary variables from intrinsic macros. NFC
llvm-svn: 254247
2015-11-29 06:50:33 +00:00
Argyrios Kyrtzidis dcb5653516 [CMake] Add a specific 'install-clang-headers' target.
llvm-svn: 253636
2015-11-20 02:24:03 +00:00
Artem Belevich c29db84419 [CUDA] Added a wrapper header for inclusion of stock CUDA headers.
Header files that come with CUDA are assuming split host/device
compilation and are not usable by clang out of the box.
With a bit of preprocessor magic it's possible to twist them
into something clang can use.

This wrapper always includes CUDA headers exactly the same way during
host and device compilation passes and produces identical preprocessed
content during host and device side compilation for sm_35 GPUs. Device
compilation passes for older GPUs will see a smaller subset of device
functions supported by particular GPU.

The wrapper assumes specific contents of CUDA header files and works
only with CUDA 7.0 and 7.5.

Differential Revision: http://reviews.llvm.org/D13171

llvm-svn: 253388
2015-11-17 22:28:52 +00:00
Hans Wennborg 1acf955a6a bmiintrin.h: Allow using the tzcnt intrinsics for non-BMI targets
The tzcnt intrinsics are used non non-BMI targets by code (e.g. ffmpeg)
that uses it as a potentially faster BSF.

The TZCNT instruction is special in that it's encoded in a
backward-compatible way and behaves as BSF on non-BMI targets.

Differential Revision: http://reviews.llvm.org/D14748

llvm-svn: 253358
2015-11-17 18:46:48 +00:00
Oliver Stannard 7aa90f5735 [ARM,AArch64] Fix __rev16l and __rev16ll intrinsics
These two intrinsics are defined in arm_acle.h.

__rev16l needs to rotate by 16 bits, bit it was actually rotating by 2 bits.
For AArch64, where long is 64 bits, this would still be wrong.

__rev16ll was incorrect, it reversed the bytes in each 32-bit word, rather than
each 16-bit halfword. The correct implementation is to apply __rev16 to the top
and bottom words of the 64-bit value.

For AArch32 targets, these get compiled down to the hardware rev16 instruction
at -O1 and above. For AArch64 targets, the 64-bit ones get compiled to two
32-bit rev16 instructions, because there is not currently a pattern for the
64-bit rev16 instruction.

Differential Revision: http://reviews.llvm.org/D14609

llvm-svn: 253211
2015-11-16 14:58:50 +00:00
Craig Topper fb79b5f273 [X86] Add 'pause' builtin that's already in llvm and use it instead of inline assembly to implement _mm_pause.
llvm-svn: 252712
2015-11-11 08:13:33 +00:00
Craig Topper a5455524c2 [X86] Use __builtin_ia32_paddq and __builtin_ia32_psubq to implement a couple intrinsics that were supposed to operate on MMX registers. Otherwise we end up operating on GPRs. Throw in a test for _mm_mul_su32 while I was there.
llvm-svn: 252711
2015-11-11 08:00:41 +00:00
Craig Topper 880f60b7b3 [X86] Header formatting fixes. NFC
llvm-svn: 252710
2015-11-11 08:00:39 +00:00
Craig Topper d619eaaae4 [X86] Add missing typecasts in intrinsic macros. This should make them more robust against inputs that aren't already the right type.
llvm-svn: 252700
2015-11-11 03:47:10 +00:00
Craig Topper 19744ee6ad [X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts.
llvm-svn: 252697
2015-11-11 02:51:18 +00:00
Craig Topper fd778eebac [X86] Use setzero instead of set1(0) in a few places in intrinsic headers.
llvm-svn: 252587
2015-11-10 05:08:08 +00:00
Craig Topper 7148166785 [X86] Remove temporary variables from macros in x86 intrinsic headers. Prevents duplicate names appearing from multiple macro expansions. NFC
llvm-svn: 252586
2015-11-10 05:08:05 +00:00
Craig Topper 166f8b20a3 [X86] Fix bad intrinsic header comment. NFC.
llvm-svn: 252585
2015-11-10 05:08:00 +00:00
Craig Topper 991d499457 Fix a couple intrinsic header comments. NFC
llvm-svn: 251900
2015-11-03 06:16:31 +00:00
Eric Christopher 99af5b2ea7 Handle target builtin options that are all required rather than
only one of a group of possibilities.

This changes the syntax in the builtin files to represent:

, as the and operator
| as the or operator

The former syntax matches how the backend tablegen files represent
multiple subtarget features being required.

Updated the builtin and intrinsic headers accordingly for the new
syntax.

llvm-svn: 251388
2015-10-27 06:11:03 +00:00
Andrea Di Biagio 8bb12d0a77 [x86] Fix maskload/store intrinsic definitions in avxintrin.h
According to the Intel documentation, the mask operand of a maskload and
maskstore intrinsics is always a vector of packed integer/long integer values.
This patch introduces the following two changes:
 1. It fixes the avx maskload/store intrinsic definitions in avxintrin.h.
 2. It changes BuiltinsX86.def to match the correct gcc definitions for avx
    maskload/store (see D13861 for more details).

Differential Revision: http://reviews.llvm.org/D13861

llvm-svn: 250816
2015-10-20 11:19:54 +00:00
Craig Topper e33f51fa91 [X86] Add fxsr feature name for fxsave/fxrestore builtins.
llvm-svn: 250498
2015-10-16 06:22:36 +00:00
Peter Collingbourne e919b0f9ad Headers: Switch some headers to LF line endings for consistency.
llvm-svn: 250388
2015-10-15 10:33:27 +00:00
Hans Wennborg 4ca00afd7c Intrin.h: implement __emul and __emulu
llvm-svn: 250301
2015-10-14 16:24:28 +00:00
Eric Christopher 525334cf6c Add subtarget feature support for 3dnowa to the 3dnowa intrinsics.
llvm-svn: 250202
2015-10-13 18:40:17 +00:00
Amjad Aboud 2b9b8a5921 [X86] Add XSAVE intrinsic family
Add intrinsics for the
  XSAVE instructions (XSAVE/XSAVE64/XRSTOR/XRSTOR64)
  XSAVEOPT instructions (XSAVEOPT/XSAVEOPT64)
  XSAVEC instructions (XSAVEC/XSAVEC64)
  XSAVES instructions (XSAVES/XSAVES64/XRSTORS/XRSTORS64)

Differential Revision: http://reviews.llvm.org/D13014

llvm-svn: 250158
2015-10-13 12:29:35 +00:00
Ahmed Bougacha 7dfaaf3891 [Headers][X86] Fix stream_load (movntdqa) to accept const*.
Per Intel intrinsics guide:
- _mm256_stream_load_si256 takes `__m256i const *'
- _mm_stream_load_si128 takes `__m128i *', for no good reason.

Let's accept const* for both.

llvm-svn: 249213
2015-10-02 23:29:26 +00:00
Chandler Carruth cbe6411401 Fix the SSE4 byte sign extension in a cleaner way, and more thoroughly
test that our intrinsics behave the same under -fsigned-char and
-funsigned-char.

This further testing uncovered that AVX-2 has a broken cmpgt for 8-bit
elements, and has for a long time. This is fixed in the same way as
SSE4 handles the case.

The other ISA extensions currently work correctly because they use
specific instruction intrinsics. As soon as they are rewritten in terms
of generic IR, they will need to add these special casts. I've added the
necessary testing to catch this however, so we shouldn't have to chase
it down again.

I considered changing the core typedef to be signed, but that seems like
a bad idea. Notably, it would be an ABI break if anyone is reaching into
the innards of the intrinsic headers and passing __v16qi on an API
boundary. I can't be completely confident that this wouldn't happen due
to a macro expanding in a lambda, etc., so it seems much better to leave
it alone. It also matches GCC's behavior exactly.

A fun side note is that for both GCC and Clang, -funsigned-char really
does change the semantics of __v16qi. To observe this, consider:

  % cat x.cc
  #include <smmintrin.h>
  #include <iostream>

  int main() {
    __v16qi a = { 1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
    __v16qi b = _mm_set1_epi8(-1);
    std::cout << (int)(a / b)[0] << ", " << (int)(a / b)[1] << '\n';
  }
  % clang++ -o x x.cc && ./x
  -1, 1
  % clang++ -funsigned-char -o x x.cc && ./x
  0, 1

However, while this may be surprising, both Clang and GCC agree.

Differential Revision: http://reviews.llvm.org/D13324

llvm-svn: 249097
2015-10-01 23:40:12 +00:00
Chandler Carruth 9143378db0 Patch over a really horrible bug in our vector builtins that showed up
recently when we started using direct conversion to model sign
extension. The __v16qi type we use for SSE v16i8 vectors is defined in
terms of 'char' which may or may not be signed! This causes us to
generate pmovsx and pmovzx depending on the setting of -funsigned-char.

This patch just forms an explicitly signed type and uses that to
formulate the sign extension. While this gets the correct behavior
(which we now verify with the enhanced test) this is just the tip of the
ice berg. Now that I know what to look for, I have found errors of this
sort *throughout* our vector code. Fortunately, this is the only
specific place where I know of users actively having their code
miscompiled by Clang due to this, so I'm keeping the fix for those users
minimal and targeted.

I'll be sending a proper email for discussion of how to fix these
systematically, what the implications are, and just how widely broken
this is... From what I can tell, we have never shipped a correct set of
builtin headers for x86 when users rely on -funsigned-char. Oops.

llvm-svn: 248980
2015-10-01 02:21:34 +00:00
Nemanja Ivanovic a0deee530b Forgot to remove a FIXME that has been fixed. NFC.
llvm-svn: 248815
2015-09-29 18:20:59 +00:00
Nemanja Ivanovic 236904ea9e Addition of interfaces the FE to conform to Table A-2 of ELF V2 ABI V1.1
This patch corresponds to review:
http://reviews.llvm.org/D13190

Implemented the following interfaces to conform to ELF V2 ABI version 1.1.

vector signed __int128 vec_adde (vector signed __int128, vector signed __int128, vector signed __int128);
vector unsigned __int128 vec_adde (vector unsigned __int128, vector unsigned __int128, vector unsigned __int128);
vector signed __int128 vec_addec (vector signed __int128, vector signed __int128, vector signed __int128);
vector unsigned __int128 vec_addec (vector unsigned __int128, vector unsigned __int128, vector unsigned __int128);
vector signed int vec_addc(vector signed int __a, vector signed int __b);
vector bool char vec_cmpge (vector signed char __a, vector signed char __b);
vector bool char vec_cmpge (vector unsigned char __a, vector unsigned char __b);
vector bool short vec_cmpge (vector signed short __a, vector signed short __b);
vector bool short vec_cmpge (vector unsigned short __a, vector unsigned short __b);
vector bool int vec_cmpge (vector signed int __a, vector signed int __b);
vector bool int vec_cmpge (vector unsigned int __a, vector unsigned int __b);
vector bool char vec_cmple (vector signed char __a, vector signed char __b);
vector bool char vec_cmple (vector unsigned char __a, vector unsigned char __b);
vector bool short vec_cmple (vector signed short __a, vector signed short __b);
vector bool short vec_cmple (vector unsigned short __a, vector unsigned short __b);
vector bool int vec_cmple (vector signed int __a, vector signed int __b);
vector bool int vec_cmple (vector unsigned int __a, vector unsigned int __b);
vector double vec_double (vector signed long long __a);
vector double vec_double (vector unsigned long long __a);
vector bool char vec_eqv(vector bool char __a, vector bool char __b);
vector bool short vec_eqv(vector bool short __a, vector bool short __b);
vector bool int vec_eqv(vector bool int __a, vector bool int __b);
vector bool long long vec_eqv(vector bool long long __a, vector bool long long __b);
vector signed short vec_madd(vector signed short __a, vector signed short __b, vector signed short __c);
vector signed short vec_madd(vector signed short __a, vector unsigned short __b, vector unsigned short __c);
vector signed short vec_madd(vector unsigned short __a, vector signed short __b, vector signed short __c);
vector unsigned short vec_madd(vector unsigned short __a, vector unsigned short __b, vector unsigned short __c);
vector bool long long vec_mergeh(vector bool long long __a, vector bool long long __b);
vector bool long long vec_mergel(vector bool long long __a, vector bool long long __b);
vector bool char vec_nand(vector bool char __a, vector bool char __b);
vector bool short vec_nand(vector bool short __a, vector bool short __b);
vector bool int vec_nand(vector bool int __a, vector bool int __b);
vector bool long long vec_nand(vector bool long long __a, vector bool long long __b);
vector bool char vec_orc(vector bool char __a, vector bool char __b);
vector bool short vec_orc(vector bool short __a, vector bool short __b);
vector bool int vec_orc(vector bool int __a, vector bool int __b);
vector bool long long vec_orc(vector bool long long __a, vector bool long long __b);
vector signed long long vec_sub(vector signed long long __a, vector signed long long __b);
vector signed long long vec_sub(vector bool long long __a, vector signed long long __b);
vector signed long long vec_sub(vector signed long long __a, vector bool long long __b);
vector unsigned long long vec_sub(vector unsigned long long __a, vector unsigned long long __b);
vector unsigned long long vec_sub(vector bool long long __a, vector unsigned long long __b);
vector unsigned long long vec_sub(vector unsigned long long __V2 ABI V1.1


http://ror float vec_sub(vector float __a, vector float __b);
unsigned char vec_extract(vector bool char __a, int __b);
signed short vec_extract(vector signed short __a, int __b);
unsigned short vec_extract(vector bool short __a, int __b);
signed int vec_extract(vector signed int __a, int __b);
unsigned int vec_extract(vector bool int __a, int __b);
signed long long vec_extract(vector signed long long __a, int __b);
unsigned long long vec_extract(vector unsigned long long __a, int __b);
unsigned long long vec_extract(vector bool long long __a, int __b);
double vec_extract(vector double __a, int __b);
vector bool char vec_insert(unsigned char __a, vector bool char __b, int __c);
vector signed short vec_insert(signed short __a, vector signed short __b, int __c);
vector bool short vec_insert(unsigned short __a, vector bool short __b, int __c);
vector signed int vec_insert(signed int __a, vector signed int __b, int __c);
vector bool int vec_insert(unsigned int __a, vector bool int __b, int __c);
vector signed long long vec_insert(signed long long __a, vector signed long long __b, int __c);
vector unsigned long long vec_insert(unsigned long long __a, vector unsigned long long __b, int __c);
vector bool long long vec_insert(unsigned long long __a, vector bool long long __b, int __c);
vector double vec_insert(double __a, vector double __b, int __c);
vector signed long long vec_splats(signed long long __a);
vector unsigned long long vec_splats(unsigned long long __a);
vector signed __int128 vec_splats(signed __int128 __a);
vector unsigned __int128 vec_splats(unsigned __int128 __a);
vector double vec_splats(double __a);
int vec_all_eq(vector double __a, vector double __b);
int vec_all_ge(vector double __a, vector double __b);
int vec_all_gt(vector double __a, vector double __b);
int vec_all_le(vector double __a, vector double __b);
int vec_all_lt(vector double __a, vector double __b);
int vec_all_nan(vector double __a);
int vec_all_ne(vector double __a, vector double __b);
int vec_all_nge(vector double __a, vector double __b);
int vec_all_ngt(vector double __a, vector double __b);
int vec_any_eq(vector double __a, vector double __b);
int vec_any_ge(vector double __a, vector double __b);
int vec_any_gt(vector double __a, vector double __b);
int vec_any_le(vector double __a, vector double __b);
int vec_any_lt(vector double __a, vector double __b);
int vec_any_ne(vector double __a, vector double __b);
vector unsigned char vec_sbox_be (vector unsigned char);
vector unsigned char vec_cipher_be (vector unsigned char, vector unsigned char);
vector unsigned char vec_cipherlast_be (vector unsigned char, vector unsigned char);
vector unsigned char vec_ncipher_be (vector unsigned char, vector unsigned char);
vector unsigned char vec_ncipherlast_be (vector unsigned char, vector unsigned char);
vector unsigned int vec_shasigma_be (vector unsigned int, const int, const int);
vector unsigned long long vec_shasigma_be (vector unsigned long long, const int, const int);
vector unsigned short vec_pmsum_be (vector unsigned char, vector unsigned char);
vector unsigned int vec_pmsum_be (vector unsigned short, vector unsigned short);
vector unsigned long long vec_pmsum_be (vector unsigned int, vector unsigned int);
vector unsigned __int128 vec_pmsum_be (vector unsigned long long, vector unsigned long long);
vector unsigned char vec_gb (vector unsigned char);
vector unsigned long long vec_bperm (vector unsigned __int128 __a, vector unsigned char __b);

Removed the folowing interfaces either because their signatures have changed
in version 1.1 of the ABI or because they were implemented for ELF V2 ABI but
have actually been deprecated in version 1.1.

vector signed char vec_eqv(vector bool char __a, vector signed char __b);
vector signed char vec_eqv(vector signed char __a, vector bool char __b);
vector unsigned char vec_eqv(vector bool char __a, vector unsigned char __b);
vector unsigned char vec_eqv(vector unsigned char __a, vector bool char __b);
vector signed short vec_eqv(vector bool short __a, vector signed short __b);
vector signed short vec_eqv(vector signed short __a, vector bool short __b);
vector unsigned short vec_eqv(vector bool short __a, vector unsigned short __b);
vector unsigned short vec_eqv(vector unsigned short __a, vector bool short __b);
vector signed int vec_eqv(vector bool int __a, vector signed int __b);
vector signed int vec_eqv(vector signed int __a, vector bool int __b);
vector unsigned int vec_eqv(vector bool int __a, vector unsigned int __b);
vector unsigned int vec_eqv(vector unsigned int __a, vector bool int __b);
vector signed long long vec_eqv(vector bool long long __a, vector signed long long __b);
vector signed long long vec_eqv(vector signed long long __a, vector bool long long __b);
vector unsigned long long vec_eqv(vector bool long long __a, vector unsigned long long __b);
vector unsigned long long vec_eqv(vector unsigned long long __a, vector bool long long __b);
vector float vec_eqv(vector bool int __a, vector float __b);
vector float vec_eqv(vector float __a, vector bool int __b);
vector double vec_eqv(vector bool long long __a, vector double __b);
vector double vec_eqv(vector double __a, vector bool long long __b);
vector unsigned short vec_nand(vector bool short __a, vector unsigned short __b);

llvm-svn: 248813
2015-09-29 18:13:34 +00:00
Nico Weber 1f22a34409 ms Intrin.h: Fix __movsw's and __stosw's inline asm.
Before, clang's internal assembler would reject the inline asm in clang's
Intrin.h.  To make sure this doesn't happen for other Intrin.h functions using
__asm__ blocks, add 32-bit and 64-bit codegen tests for Intrin.h.

Sadly, these tests discovered that __readcr3 and __writecr3 have bad
implementations in 64-bit builds.  This will have to be fixed in a follow-up.

llvm-svn: 248234
2015-09-22 00:46:21 +00:00
Michael Kuperstein a10dff946e [X86] Make f16c intrinsics accessible through emmintrin.h, per Intel docs
Differential Revision: http://reviews.llvm.org/D13015

llvm-svn: 248156
2015-09-21 13:34:47 +00:00
Michael Kuperstein 5c2cb0eee2 [X86] Fix some non-reserved parameter names in intrinsic headers
Differential Revision: http://reviews.llvm.org/D13009

llvm-svn: 248150
2015-09-21 11:45:27 +00:00
Simon Pilgrim 12919f7e49 [X86][SSE] Replace 128-bit SSE41 PMOVSX intrinsics with native IR
128-bit vector integer sign extensions correctly lower to the pmovsx instructions even for debug builds.

This patch removes the builtins and reimplements the _mm_cvtepi*_epi* intrinsics __using builtin_shufflevector (to extract the bottom most subvector) and __builtin_convertvector (to actually perform the sign extension).

Differential Revision: http://reviews.llvm.org/D12835

llvm-svn: 248092
2015-09-19 15:12:38 +00:00
Asaf Badouh 2718051dd7 re-apply r.247881
fixed the tests.

llvm-svn: 247892
2015-09-17 14:53:37 +00:00
Asaf Badouh 8a61250709 revert r.247881 due to tests failures
llvm-svn: 247883
2015-09-17 13:09:33 +00:00
Asaf Badouh a0e5e71ef1 [X86][AVX512DQ] add new intrinsics
convert i64 to FP and vice versa
reduceps & reducepd
rangeps & rangepd
all in their 512bit versions


Differential Revision: http://reviews.llvm.org/D11716

llvm-svn: 247881
2015-09-17 11:56:04 +00:00
Sean Silva e4c3760a9f Clean up trailing whitespace in the builtin headers
llvm-svn: 247498
2015-09-12 02:55:19 +00:00
Simon Pilgrim 5aba9925c0 [X86][SSE] Add _mm_undefined_* intrinsics
Added missing SSE/AVX 'undefined' intrinsics (PR24040):

_mm_undefined_pd, _mm_undefined_ps + _mm_undefined_si128
_mm256_undefined_pd, _mm256_undefined_ps + _mm256_undefined_si256
_mm512_undefined, _mm512_undefined_ps, _mm512_undefined_pd + _mm512_undefined_epi32

Added builtin intrinsicss:

__builtin_ia32_undef128, __builtin_ia32_undef256 + __builtin_ia32_undef512

Differential Revision: http://reviews.llvm.org/D12052

llvm-svn: 246083
2015-08-26 21:17:12 +00:00
Simon Pilgrim fbb8904411 [X86] Remove unnecessary MMX declarations from Intrin.h
As discussed in PR23648 - the intrinsics _m_from_int, _m_to_int and _m_prefetch are defined in mmintrin.h and prfchwintrin.h so we don't need to in Intrin.h

Added tests for _m_from_int and _m_to_int

D11338 already added a test for _m_prefetch

Differential Revision: http://reviews.llvm.org/D12272

llvm-svn: 245975
2015-08-25 21:27:46 +00:00
Michael Kuperstein b62c5bc64d Revert r245923 since it breaks mingw.
llvm-svn: 245929
2015-08-25 11:42:31 +00:00
Michael Kuperstein 2c8f9c2c23 [X86] Expose the various _rot intrinsics on non-MS platforms
_rotl, _rotwl and _lrotl (and their right-shift counterparts) are official x86
intrinsics, and should be supported regardless of environment. This is in contrast
to _rotl8, _rotl16, and _rotl64 which are MS-specific.

Note that the MS documentation for _lrotl is different from the Intel 
documentation. Intel explicitly documents it as a 64-bit rotate, while for MS,
since sizeof(unsigned long) for MSVC is always 4, a 32-bit rotate is implied.

Differential Revision: http://reviews.llvm.org/D12271

llvm-svn: 245923
2015-08-25 07:21:33 +00:00
Ahmed Bougacha 5e354cb547 [Headers][X86] Use __builtin_shufflevector in AVX2 broadcasts.
This lets us optimize them better. We agreed to remove the intrinsics,
instead of combining them later, as, at -O0, we generate the expected
instructions. Plus, it's a nice cleanup.

Differential Revision: http://reviews.llvm.org/D10556

llvm-svn: 245605
2015-08-20 20:27:21 +00:00
Michael Kuperstein d7b9392f59 [X86] Add support for _MM_ALIGN16
Differential Revision: http://reviews.llvm.org/D11753

llvm-svn: 244201
2015-08-06 08:24:38 +00:00
Asaf Badouh c68e347c25 [X86][AVX512VLBW] add pack, cvt, mulhi and madd intrinsics
Differential Revision: http://reviews.llvm.org/D11642

llvm-svn: 243867
2015-08-03 07:51:00 +00:00
Asaf Badouh 73b639f650 [X86][AVX512VLDQ] add reduce/range/cvt intrinsics
add 128 & 256 width intrinsic versions of reduce/range and cvt i64 to FP and vice versa

Differential Revision: http://reviews.llvm.org/D11598

llvm-svn: 243848
2015-08-02 12:43:08 +00:00
Ulrich Weigand ca25643a05 [SystemZ] Add support for vecintrin.h vector built-in functions
This patch adds support for the System Z vector built-in functions.
The API-defined header file has the name vecintrin.h.

The user-level functions are defined in the same style as the clang
version of altivec.h, making heavy use of the __overloadable__ and
__always_inline__ attributes.  Where possible the functions expand to
generic operations rather than specific built-in functions, in the hope
that that form can be optimised better.

Where a built-in routine is specified to require an immediate integer
argument, the __enable_if__ attribute is used to verify the argument is
in fact constant and in the appropriate range.

Based on a patch by Richard Sandiford.

llvm-svn: 243643
2015-07-30 14:10:43 +00:00
Asaf Badouh d6cb100bc2 [X86][AVX512BW] Remove whitespaces
llvm-svn: 243623
2015-07-30 06:52:26 +00:00
Asaf Badouh 1998eb2077 [X86][AVX512BW] add convert i16 to i8 and unpack intrinsics
Differential Revision: http://reviews.llvm.org/D11564

llvm-svn: 243514
2015-07-29 12:34:20 +00:00
Asaf Badouh a6c31703ac [X86][AVX512BW] Replace attributes with __DEFAULT_FN_ATTRS
llvm-svn: 243512
2015-07-29 12:22:19 +00:00
Asaf Badouh 93aa4c808a [X86][AVX512VL] add AVX512VL intrinsics 4 out of 4
Differential Revision: http://reviews.llvm.org/D11526

llvm-svn: 243409
2015-07-28 12:04:40 +00:00
Asaf Badouh b7cf71b63d [X86][AVX512VL] add AVX512VL intrinsics 3 out of 4
http://reviews.llvm.org/D11526

llvm-svn: 243406
2015-07-28 11:14:09 +00:00
Asaf Badouh 78ee5cc8e1 [X86][AVX512VL] add AVX512VL intrinsics 2 out of 4
http://reviews.llvm.org/D11526

llvm-svn: 243402
2015-07-28 10:30:56 +00:00
Asaf Badouh 74da38706e [X86][AVX512VL] add AVX512VL intrinsics 1 out of 4
http://reviews.llvm.org/D11526

llvm-svn: 243394
2015-07-28 08:26:14 +00:00
Simon Pilgrim f81966d04b [X86] Add missing _m_prefetch intrinsic
The 3DNOW/PRFCHW cpu targets define both the PREFETCHW (set cache line modified) and PREFETCH (set cache line exclusive) instructions but only the _m_prefetchw (PREFETCHW) intrinsic is included in the header. This patch adds the missing _m_prefetch intrinsic.

I'm basing this off AMD documentation - the intel docs on the support for PREFETCHW isn't clear whether Silvermont/Broadwell properly support PREFETCH but given that the intrinsic implementation is a default __builtin_prefetch call, it is safe whatever.

Fix for PR23648

Differential Revision: http://reviews.llvm.org/D11338

llvm-svn: 243305
2015-07-27 19:01:52 +00:00
Asaf Badouh f6a58b6dff [X86][AVX512F] Add FP scalar intrinsics
intrinsics for: add/sub/mul/div/min/max in their FP scalar versions

Differential Revision: http://reviews.llvm.org/D11418

llvm-svn: 243009
2015-07-23 12:13:32 +00:00
Asaf Badouh 7d99966e91 [X86][AVX512BW] add madd and maddubs intrinsics
Differential Revision: http://reviews.llvm.org/D11420

llvm-svn: 242986
2015-07-23 07:07:25 +00:00
Asaf Badouh ffeb624483 [X86][AVX512F] add FP arithmetic intrinsics
add/div/mul/sub include rounding versions


Differential Revision: http://reviews.llvm.org/D11354

llvm-svn: 242790
2015-07-21 15:27:28 +00:00
Asaf Badouh d4419ca657 [X86][AVX512BW] add clang intrinsics for pmulhrsw / pmulhuw / pmulhw
also made minor fix in "test_mm512_maskz_permutex2var_epi16"

Differential Revision: http://reviews.llvm.org/D11336

llvm-svn: 242635
2015-07-19 08:47:31 +00:00
David Majnemer 6b8e297089 [Intrin.h] Use compiler builtins to model memory barriers
_ReadBarrier, _WriteBarrier, and _ReadWriteBarrier are essentially
memory barriers of one form or another.  Model these as
atomic_signal_fence(ATOMIC_SEQ_CST).

__faststorefence is a curious intrinsic.  It's single purpose seems to
an alternative to mfence when that instruction is slow.  However, mfence
is not always slow and is, in general, preferable to a 'lock or'
sequence on certain CPUs.  Give the compiler freedom to select the best
sequence to get a fence.

llvm-svn: 242378
2015-07-16 03:13:02 +00:00
Bill Schmidt 8da737a18a [PPC64LE] Fix vec_sld semantics for little endian
The vec_sld interface provides access to the vsldoi instruction.
Unlike most of the vec_* interfaces, we do not attempt to change the
generated code for vec_sld based on the endian mode.  It is too
difficult to correctly infer the desired semantics because of
different element types, and the corrected instruction sequence is
expensive, involving loading a permute control vector and performing a
generalized permute.

For GCC, this was implemented as "Don't touch the vec_sld"
implementation.  When it came time for the LLVM implementation, I did
the same thing.  However, this was hasty and incorrect.  In LLVM's
version of altivec.h, vec_sld was previously defined in terms of the
vec_perm interface.  Because vec_perm semantics are adjusted for
little endian, this means that leaving vec_sld untouched causes it to
generate something different for LE than for BE.  Not good.

This patch adjusts the form of vec_perm that is used for vec_sld and
vec_vsldoi, effectively undoing the modifications so that the same
vsldoi instruction will be generated for both BE and LE.

There is an accompanying back-end patch to take care of some small
ripple effects caused by these changes.

llvm-svn: 242297
2015-07-15 15:45:53 +00:00
Nemanja Ivanovic 6c363ed67a Add missing builtins to altivec.h for ABI compliance (vol. 4)
This patch corresponds to review:
http://reviews.llvm.org/D11184

A number of new interfaces for altivec.h (as mandated by the ABI):
vector float vec_cpsgn(vector float, vector float)
vector double vec_cpsgn(vector double, vector double)
vector double vec_or(vector bool long long, vector double)
vector double vec_or(vector double, vector bool long long)
vector double vec_re(vector double)
vector signed char vec_cntlz(vector signed char)
vector unsigned char vec_cntlz(vector unsigned char)
vector short vec_cntlz(vector short)
vector unsigned short vec_cntlz(vector unsigned short)
vector int vec_cntlz(vector int)
vector unsigned int vec_cntlz(vector unsigned int)
vector signed long long vec_cntlz(vector signed long long)
vector unsigned long long vec_cntlz(vector unsigned long long)
vector signed char vec_nand(vector bool signed char, vector signed char)
vector signed char vec_nand(vector signed char, vector bool signed char)
vector signed char vec_nand(vector signed char, vector signed char)
vector unsigned char vec_nand(vector bool unsigned char, vector unsigned char)
vector unsigned char vec_nand(vector unsigned char, vector bool unsigned char)
vector unsigned char vec_nand(vector unsigned char, vector unsigned char)
vector short vec_nand(vector bool short, vector short)
vector short vec_nand(vector short, vector bool short)
vector short vec_nand(vector short, vector short)
vector unsigned short vec_nand(vector bool unsigned short, vector unsigned short)
vector unsigned short vec_nand(vector unsigned short, vector bool unsigned short)
vector unsigned short vec_nand(vector unsigned short, vector unsigned short)
vector int vec_nand(vector bool int, vector int)
vector int vec_nand(vector int, vector bool int)
vector int vec_nand(vector int, vector int)
vector unsigned int vec_nand(vector bool unsigned int, vector unsigned int)
vector unsigned int vec_nand(vector unsigned int, vector bool unsigned int)
vector unsigned int vec_nand(vector unsigned int, vector unsigned int)
vector signed long long vec_nand(vector bool long long, vector signed long long)
vector signed long long vec_nand(vector signed long long, vector bool long long)
vector signed long long vec_nand(vector signed long long, vector signed long long)
vector unsigned long long vec_nand(vector bool long long, vector unsigned long long)
vector unsigned long long vec_nand(vector unsigned long long, vector bool long long)
vector unsigned long long vec_nand(vector unsigned long long, vector unsigned long long)
vector signed char vec_orc(vector bool signed char, vector signed char)
vector signed char vec_orc(vector signed char, vector bool signed char)
vector signed char vec_orc(vector signed char, vector signed char)
vector unsigned char vec_orc(vector bool unsigned char, vector unsigned char)
vector unsigned char vec_orc(vector unsigned char, vector bool unsigned char)
vector unsigned char vec_orc(vector unsigned char, vector unsigned char)
vector short vec_orc(vector bool short, vector short)
vector short vec_orc(vector short, vector bool short)
vector short vec_orc(vector short, vector short)
vector unsigned short vec_orc(vector bool unsigned short, vector unsigned short)
vector unsigned short vec_orc(vector unsigned short, vector bool unsigned short)
vector unsigned short vec_orc(vector unsigned short, vector unsigned short)
vector int vec_orc(vector bool int, vector int)
vector int vec_orc(vector int, vector bool int)
vector int vec_orc(vector int, vector int)
vector unsigned int vec_orc(vector bool unsigned int, vector unsigned int)
vector unsigned int vec_orc(vector unsigned int, vector bool unsigned int)
vector unsigned int vec_orc(vector unsigned int, vector unsigned int)
vector signed long long vec_orc(vector bool long long, vector signed long long)
vector signed long long vec_orc(vector signed long long, vector bool long long)
vector signed long long vec_orc(vector signed long long, vector signed long long)
vector unsigned long long vec_orc(vector bool long long, vector unsigned long long)
vector unsigned long long vec_orc(vector unsigned long long, vector bool long long)
vector unsigned long long vec_orc(vector unsigned long long, vector unsigned long long)
vector signed char vec_div(vector signed char, vector signed char)
vector unsigned char vec_div(vector unsigned char, vector unsigned char)
vector signed short vec_div(vector signed short, vector signed short)
vector unsigned short vec_div(vector unsigned short, vector unsigned short)
vector signed int vec_div(vector signed int, vector signed int)
vector unsigned int vec_div(vector unsigned int, vector unsigned int)
vector signed long long vec_div(vector signed long long, vector signed long long)
vector unsigned long long vec_div(vector unsigned long long, vector unsigned long long)
vector unsigned char vec_mul(vector unsigned char, vector unsigned char)
vector unsigned int vec_mul(vector unsigned int, vector unsigned int)
vector unsigned long long vec_mul(vector unsigned long long, vector unsigned long long)
vector unsigned short vec_mul(vector unsigned short, vector unsigned short)
vector signed char vec_mul(vector signed char, vector signed char)
vector signed int vec_mul(vector signed int, vector signed int)
vector signed long long vec_mul(vector signed long long, vector signed long long)
vector signed short vec_mul(vector signed short, vector signed short)
vector signed long long vec_mergeh(vector signed long long, vector signed long long)
vector signed long long vec_mergeh(vector signed long long, vector bool long long)
vector signed long long vec_mergeh(vector bool long long, vector signed long long)
vector unsigned long long vec_mergeh(vector unsigned long long, vector unsigned long long)
vector unsigned long long vec_mergeh(vector unsigned long long, vector bool long long)
vector unsigned long long vec_mergeh(vector bool long long, vector unsigned long long)
vector double vec_mergeh(vector double, vector double)
vector double vec_mergeh(vector double, vector bool long long)
vector double vec_mergeh(vector bool long long, vector double)
vector signed long long vec_mergel(vector signed long long, vector signed long long)
vector signed long long vec_mergel(vector signed long long, vector bool long long)
vector signed long long vec_mergel(vector bool long long, vector signed long long)
vector unsigned long long vec_mergel(vector unsigned long long, vector unsigned long long)
vector unsigned long long vec_mergel(vector unsigned long long, vector bool long long)
vector unsigned long long vec_mergel(vector bool long long, vector unsigned long long)
vector double vec_mergel(vector double, vector double)
vector double vec_mergel(vector double, vector bool long long)
vector double vec_mergel(vector bool long long, vector double)
vector signed int vec_pack(vector signed long long, vector signed long long)
vector unsigned int vec_pack(vector unsigned long long, vector unsigned long long)
vector bool int vec_pack(vector bool long long, vector bool long long)

llvm-svn: 242171
2015-07-14 17:50:27 +00:00
Asaf Badouh 1626545667 [x86] add 2 bit to ObjCOrBuiltinID and new intrinsics
add 2 bit to ObjCOrBuiltinID (changed from 11bits to 13bits), see discussion in
Add new intrinsics support that already covered by the BE.
All the intrinsics are covered by tests

Differential Revision: http://reviews.llvm.org/D10893

llvm-svn: 242144
2015-07-14 14:02:45 +00:00
David Majnemer e0b863f4c7 [Intrin.h] Use __ATOMIC_SEQ_CST instead of '5'
No functionality change is intended.

llvm-svn: 242087
2015-07-13 23:39:37 +00:00
David Majnemer 56e466745d [Intrin.h] Make the variable names more consistent
No functionality change intended.

llvm-svn: 242086
2015-07-13 23:38:56 +00:00
David Majnemer 8dadce78ed Intrin.h: Don't invade the program's namespace
The program is permitted to have stuff like '#define x' in it so avoid
using identifiers not reserved for the implementation.

llvm-svn: 242010
2015-07-13 02:53:23 +00:00
David Majnemer 3c8ea5f3f8 Intrin.h: Clean up our atomic intrinsics
Three things:
- The atomic intrinsics mandate memory barriers, let's start emitting
  some.
- We don't need to manually create RMW operations, we can just do
  __atomic_fetch_foo instead of performing __atomic_foo_fetch and
  undoing foo.
- Don't use inline assembly, we don't need it for these intrinsics.

This fixes PR24101.

llvm-svn: 242009
2015-07-13 02:53:19 +00:00
Nemanja Ivanovic 26c3534b84 Add missing builtins to altivec.h for ABI compliance (vol. 3)
This patch corresponds to review:
http://reviews.llvm.org/D10972

Fix for the handling of dependent features that are enabled by default
on some CPU's (such as -mvsx, -mpower8-vector).

Also provides a number of new interfaces or fixes existing ones in
altivec.h.

Changed signatures to conform to ABI:
vector short vec_perm(vector signed short, vector signed short, vector unsigned char)
vector int vec_perm(vector signed int, vector signed int, vector unsigned char)
vector long long vec_perm(vector signed long long, vector signed long long, vector unsigned char)
vector signed char vec_sld(vector signed char, vector signed char, const int)
vector unsigned char vec_sld(vector unsigned char, vector unsigned char, const int)
vector bool char vec_sld(vector bool char, vector bool char, const int)
vector unsigned short vec_sld(vector unsigned short, vector unsigned short, const int)
vector signed short vec_sld(vector signed short, vector signed short, const int)
vector signed int vec_sld(vector signed int, vector signed int, const int)
vector unsigned int vec_sld(vector unsigned int, vector unsigned int, const int)
vector float vec_sld(vector float, vector float, const int)
vector signed char vec_splat(vector signed char, const int)
vector unsigned char vec_splat(vector unsigned char, const int)
vector bool char vec_splat(vector bool char, const int)
vector signed short vec_splat(vector signed short, const int)
vector unsigned short vec_splat(vector unsigned short, const int)
vector bool short vec_splat(vector bool short, const int)
vector pixel vec_splat(vector pixel, const int)
vector signed int vec_splat(vector signed int, const int)
vector unsigned int vec_splat(vector unsigned int, const int)
vector bool int vec_splat(vector bool int, const int)
vector float vec_splat(vector float, const int)

Added a VSX path to:
vector float vec_round(vector float)

Added interfaces:
vector signed char vec_eqv(vector signed char, vector signed char)
vector signed char vec_eqv(vector bool char, vector signed char)
vector signed char vec_eqv(vector signed char, vector bool char)
vector unsigned char vec_eqv(vector unsigned char, vector unsigned char)
vector unsigned char vec_eqv(vector bool char, vector unsigned char)
vector unsigned char vec_eqv(vector unsigned char, vector bool char)
vector signed short vec_eqv(vector signed short, vector signed short)
vector signed short vec_eqv(vector bool short, vector signed short)
vector signed short vec_eqv(vector signed short, vector bool short)
vector unsigned short vec_eqv(vector unsigned short, vector unsigned short)
vector unsigned short vec_eqv(vector bool short, vector unsigned short)
vector unsigned short vec_eqv(vector unsigned short, vector bool short)
vector signed int vec_eqv(vector signed int, vector signed int)
vector signed int vec_eqv(vector bool int, vector signed int)
vector signed int vec_eqv(vector signed int, vector bool int)
vector unsigned int vec_eqv(vector unsigned int, vector unsigned int)
vector unsigned int vec_eqv(vector bool int, vector unsigned int)
vector unsigned int vec_eqv(vector unsigned int, vector bool int)
vector signed long long vec_eqv(vector signed long long, vector signed long long)
vector signed long long vec_eqv(vector bool long long, vector signed long long)
vector signed long long vec_eqv(vector signed long long, vector bool long long)
vector unsigned long long vec_eqv(vector unsigned long long, vector unsigned long long)
vector unsigned long long vec_eqv(vector bool long long, vector unsigned long long)
vector unsigned long long vec_eqv(vector unsigned long long, vector bool long long)
vector float vec_eqv(vector float, vector float)
vector float vec_eqv(vector bool int, vector float)
vector float vec_eqv(vector float, vector bool int)
vector double vec_eqv(vector double, vector double)
vector double vec_eqv(vector bool long long, vector double)
vector double vec_eqv(vector double, vector bool long long)
vector bool long long vec_perm(vector bool long long, vector bool long long, vector unsigned char)
vector double vec_round(vector double)
vector double vec_splat(vector double, const int)
vector bool long long vec_splat(vector bool long long, const int)
vector signed long long vec_splat(vector signed long long, const int)
vector unsigned long long vec_splat(vector unsigned long long,
vector bool int vec_sld(vector bool int, vector bool int, const int)
vector bool short vec_sld(vector bool short, vector bool short, const int)

llvm-svn: 241904
2015-07-10 13:11:34 +00:00