6be291a2cd
Indent properly, no functionality change.
...
llvm-svn: 131082
2011-05-09 08:03:33 +00:00
392445823d
Eliminate an unused line to fix a warning.
...
llvm-svn: 131078
2011-05-08 23:19:04 +00:00
89bd2ae517
Remove an assertion to fix PR9872.
...
It can happen that a live debug variable is the last use of a sub-register, and
the register allocator will pick a larger register class for the virtual
register. If the allocated register doesn't support the sub-register index,
just use %noreg for the debug variables instead of asserting.
In PR9872, a debug variable ends up in the sub_8bit_hi part of a GR32_ABCD
register. The register is split and one part is inflated to GR32 and assigned
%ESI because there are no more normal uses of sub_8bit_hi.
Since %ESI doesn't have that sub-register, substPhysReg asserted. Now it will
simply insert a %noreg instead, and the debug variable will be marked
unavailable in that range.
We don't currently have a way of saying: !"value" is in bits 8-15 of %ESI, I
don't know if DWARF even supports that.
llvm-svn: 131073
2011-05-08 19:21:08 +00:00
d724a590e5
X86: Add a bunch of peeps for add and sub of SETB.
...
"b + ((a < b) ? 1 : 0)" compiles into
cmpl %esi, %edi
adcl $0, %esi
instead of
cmpl %esi, %edi
sbbl %eax, %eax
andl $1, %eax
addl %esi, %eax
This saves a register, a false dependency on %eax
(Intel's CPUs still don't ignore it) and it's shorter.
llvm-svn: 131070
2011-05-08 18:36:07 +00:00
ab39c63538
Don't force relaxation of AdvanceLoc instructions on OS X. gdb is happy with
...
the smaller encoding and this cuts 270336 bytes from a release version of
clang and 1246272 bytes from a debug build.
llvm-svn: 131067
2011-05-08 14:35:21 +00:00
aa2637343c
PR9869: Add explicit destructor declarations to Operator subclasses, to allow
...
compiling Operator.h with gcc 4.6 in C++0x mode.
llvm-svn: 131062
2011-05-08 01:59:22 +00:00
c132174169
Eliminate the ARM sub-register indexes that are not needed by the sources.
...
Tablegen will invent its own names for these indexes, and the register file is a
bit simpler.
llvm-svn: 131059
2011-05-07 21:22:42 +00:00
c8c4ded3c6
Teach TableGen to automatically generate missing SubRegIndex instances.
...
The RegisterInfo.td file should only specify the indexes that sources need to
refer to. The rest is inferred.
llvm-svn: 131058
2011-05-07 21:22:39 +00:00
6dec2aa9b4
Fix comments per Duncan's review.
...
llvm-svn: 131055
2011-05-07 19:23:14 +00:00
af32728a57
The comparision "max(x,y)==x" is equivalent to "x>=y". Since the max is
...
often expressed as "x >= y ? x : y", there is a good chance we can extract
the existing "x >= y" from it and use that as a replacement for "max(x,y)==x".
llvm-svn: 131049
2011-05-07 16:56:49 +00:00
1e3db02bda
Fix the non-MC encoding of pkhbt and pkhtb.
...
Patch by Stephen Hines.
llvm-svn: 131045
2011-05-07 04:37:27 +00:00
58799a35e5
Revert ExecutionEngine patches, they either failed to build or broke unit tests.
...
Please ensure the build is clean and tests are passing when recommitting.
llvm-svn: 131044
2011-05-07 03:12:54 +00:00
bcabcdcedd
Switch Darwin to the generic CIE/FDE printer.
...
llvm-svn: 131031
2011-05-06 22:29:04 +00:00
4c261a2831
ExecutionEngine: delete duplicated files
...
Forgot to `svn rm` these in revisions 131025 / 131029.
llvm-svn: 131030
2011-05-06 22:24:04 +00:00
00dd3d6001
ExecutionEngine: add missing file
...
From revision 131025.
llvm-svn: 131029
2011-05-06 22:20:09 +00:00
cbb7fa68ed
1. Keep lines in 80 columns.
...
2. Remove unused function.
3. Correct indentation.
llvm-svn: 131028
2011-05-06 22:11:29 +00:00
8c0487006e
ExecutionEngine: move createJIT() definition
...
As an ExecutionEngine class function, its definition
really belongs in ExecutionEngine.cpp, not JIT.cpp.
llvm-svn: 131027
2011-05-06 22:07:14 +00:00
ab6bd20da9
ExecutionEngine: push TargetMachine creation into clients
...
In particular, into EngineBuilder. This should only impact
the private API between the EE and EB classes, not external
clients, since JITCtor and MCJITCtor are both protected members.
llvm-svn: 131026
2011-05-06 22:06:22 +00:00
fed7f0b3a0
ExecutionEngine: fix JIT/MCJIT selectTarget() duplication
...
This prepares for making JITCtor/MCJITCtor take a
TargetMachine* directly from clients like EngineBuilder.
llvm-svn: 131025
2011-05-06 22:05:43 +00:00
a5c889982a
Emit a proper error message when register allocators run out of registers.
...
This can't be just an assertion, users can always write impossible inline
assembly. Such an assembly statement should be included in the error message.
llvm-svn: 131024
2011-05-06 21:58:30 +00:00
2e116a4491
Added an assertion, and updated a comment.
...
llvm-svn: 131022
2011-05-06 21:52:52 +00:00
64c9284411
It's valid to take the blockaddress of a different function, so remove this
...
assert in the bitcode writer. No change needed because the ValueEnumerator holds
a whole-module numbering anyhow. Fixes PR9857!
llvm-svn: 131016
2011-05-06 21:09:44 +00:00
d26fc5e013
80 col violations.
...
llvm-svn: 131015
2011-05-06 20:52:23 +00:00
2518f8376d
Make the logic for determining function alignment more explicit. No functionality change.
...
llvm-svn: 131012
2011-05-06 20:34:06 +00:00
7a78f66145
Use array_lengthof. No functional change.
...
llvm-svn: 131008
2011-05-06 19:50:10 +00:00
57c8f58aeb
Iterate backwards over debug locations when splitting them so they can be safely erased.
...
This should unbreak dragonegg-i386-linux and build-self-4-mingw32.
llvm-svn: 131007
2011-05-06 19:31:19 +00:00
59ddb73d47
Improve diagnostics for some parse errors. Not asserting when a user input
...
error is detected is a good thing.
llvm-svn: 131005
2011-05-06 18:47:45 +00:00
763ac0397e
ParseFile() may throw, so extend the try/catch to handle that.
...
llvm-svn: 131004
2011-05-06 18:39:28 +00:00
a335f5aeeb
Move few target-dependant tests to appropriate directories.
...
llvm-svn: 131002
2011-05-06 18:24:46 +00:00
84f9ad9bf2
Typo: Reviewed by Alistair.
...
llvm-svn: 131001
2011-05-06 18:14:32 +00:00
20ce0c0ce0
Pass -disable-cfi to llc.
...
llvm-svn: 130999
2011-05-06 18:01:58 +00:00
f8da028895
Update LiveDebugVariables after live range splitting.
...
After a virtual register is split, update any debug user variables that resided
in the old register. This ensures that the LiveDebugVariables are still correct
after register allocation.
This may create DBG_VALUE instructions that place a user variable in a register
in parts of the function and in a stack slot in other parts. DwarfDebug
currently doesn't support that.
llvm-svn: 130998
2011-05-06 18:00:02 +00:00
c86fe05923
Use TargetMachine hooks to properly print debug variable locations.
...
llvm-svn: 130997
2011-05-06 17:59:59 +00:00
6cc4e4ddd0
Also count identity copies.
...
llvm-svn: 130996
2011-05-06 17:59:57 +00:00
ac893d6898
Pass -disable-cfi.
...
llvm-svn: 130995
2011-05-06 17:44:58 +00:00
aab77fe574
Post-RA scheduler compile time fix. Quadratic computation of DAG node depth.
...
The post-ra scheduler was explicitly updating the depth of a node's
successors after scheduling it, regardless of whether the successor
was ready. This is quadratic for DAGs with transitively redundant
edges. I simply removed the useless update of depth, which is lazilly
computed later.
Fixes <rdar://problem/9044332> compiler takes way too long to build TextInput.
llvm-svn: 130992
2011-05-06 17:09:08 +00:00
17b532728b
Move CompileUnit::getOrCreateNameSpace() and CompileUnit::addPubType() from DwarfDebug.cpp to DwarfCompileUnit.cpp
...
llvm-svn: 130991
2011-05-06 16:57:54 +00:00
705d25a1f4
Nothing else uses this label.
...
llvm-svn: 130989
2011-05-06 15:44:29 +00:00
6e4fa20efb
Yet more dead code.
...
llvm-svn: 130988
2011-05-06 15:31:55 +00:00
d06c2c1b81
Update comments.
...
llvm-svn: 130987
2011-05-06 15:28:56 +00:00
4bfa978ca5
More dead code elimination.
...
llvm-svn: 130985
2011-05-06 15:22:26 +00:00
a716096677
Dead code elimination.
...
llvm-svn: 130984
2011-05-06 14:56:22 +00:00
11d70b6b32
PTX: add PTX 2.3 language target
...
Patch by Wei-Ren Chen
llvm-svn: 130980
2011-05-06 11:40:36 +00:00
a071c82900
Fix PR9820: a read-only call differs from a load in that a load doesn't
...
return the pointer being dereferenced, it returns the pointee, but a call
might return the pointer itself.
llvm-svn: 130979
2011-05-06 10:30:37 +00:00
5401962643
Re-revert r130877; it's apparently causing a regression on 197.parser,
...
possibly related to cbnz formation.
llvm-svn: 130977
2011-05-06 05:23:07 +00:00
a7028848a1
The computation of string length is not that complicated. Fix it, again. :)
...
llvm-svn: 130967
2011-05-05 23:52:18 +00:00
bb237c72a6
Remove DwarfTableException.
...
llvm-svn: 130964
2011-05-05 23:19:54 +00:00
ec0a3a0bbf
Remove the DwarfTable enum.
...
llvm-svn: 130959
2011-05-05 22:14:31 +00:00
1ff74141bf
In debug output, clearly list new instructions without DebugLoc.
...
llvm-svn: 130957
2011-05-05 22:05:57 +00:00
d6141e1db2
Remove little used statistical counter.
...
llvm-svn: 130955
2011-05-05 22:00:08 +00:00
8a20e66926
PR9838: Fix transform introduced in r127064 to not trigger when only one side of the icmp is an exact shift.
...
llvm-svn: 130954
2011-05-05 21:59:18 +00:00
bc8e3f8c45
Move PPC Linux to CFI.
...
llvm-svn: 130951
2011-05-05 21:34:33 +00:00
d58fe3c55e
Fix typo. No functional change.
...
llvm-svn: 130949
2011-05-05 21:27:14 +00:00
59b6bfdbc6
Implement a really simple DwarfSjLjException.
...
llvm-svn: 130947
2011-05-05 20:48:31 +00:00
240c96e2ca
List all exception types in a switch.
...
llvm-svn: 130944
2011-05-05 19:48:34 +00:00
3dc73aae5e
ARM post RA scheduler compile time fix.
...
BuildSchedGraph was quadratic in the number of calls in the basic
block. After this fix, it keeps only a single call at the top of the
DefList so compile time doesn't blow up on large blocks. This reduces
postRA sched time on an external test case from 81s to 0.3s. Although
r130800 (reduced ARM register alias defs) also partially fixes the
issue by reducing the constant overhead of checking call interference
by an order of magnitude.
Fixes <rdar://problem/7662664> very poor compile time with post RA scheduling.
llvm-svn: 130943
2011-05-05 19:32:21 +00:00
24b1c48514
whitespace
...
llvm-svn: 130942
2011-05-05 19:24:06 +00:00
a4982bddf3
Don't produce a __debug_frame.
...
I tested both gdb on a bootstrapped clang and and the gdb testsuite on OS X (snow leopard)
and both are happy using __eh_frame.
llvm-svn: 130937
2011-05-05 18:43:39 +00:00
b93a130120
Many LLVM tests relies on standard output stream be in the binary mode. Which is not always the case (on Windows in particular). The patch adds a test to verify that the standard output stream is actually in the binary mode.
...
llvm-svn: 130936
2011-05-05 18:40:27 +00:00
68b6b0efb0
Allow FastISel of three-register-operand instructions.
...
llvm-svn: 130934
2011-05-05 17:59:04 +00:00
73bc172493
If debug info for inlined function is missing then handle it gracefully.
...
llvm-svn: 130933
2011-05-05 17:54:26 +00:00
f1e2b50a30
PR9848: pandn is not commutative.
...
No test because I can't think of any way to write one that won't break quickly.
llvm-svn: 130932
2011-05-05 17:45:31 +00:00
c5a8c08dba
Add some statistics to the splitting and spilling frameworks.
...
llvm-svn: 130931
2011-05-05 17:22:53 +00:00
441a01a2b8
Avoid extra vreg copies for arguments passed in registers. Specifically, this can make MachineCSE more effective in some cases (especially in small functions). PR8361 / part of rdar://problem/8259436 .
...
llvm-svn: 130928
2011-05-05 16:53:34 +00:00
f118fae233
Fix test to be less sensitive to coalescing.
...
This should unbreak llvm-gcc-i386-linux-selfhost.
llvm-svn: 130927
2011-05-05 16:48:00 +00:00
fd8c6adffb
Small syntax cleanup; we don't need to #define constants in C++. No functionality change intended.
...
llvm-svn: 130926
2011-05-05 16:25:23 +00:00
2311bdfa7b
Minor correction to r130877; fixes PR9846 and hopefully the buildbot failures.
...
llvm-svn: 130925
2011-05-05 16:18:11 +00:00
cd5afc5feb
Minor change: Fix the typo in RegionPass.h and RegionPass.cpp.
...
llvm-svn: 130920
2011-05-05 13:59:38 +00:00
a48b1375df
Remove a flag that would set the ".eh" symbol as .globl. MachO was the only one
...
who used this flag, and it now emits CFI and doesn't emit this anymore. All
other targets left this flag "false".
<rdar://problem/8486371>
llvm-svn: 130918
2011-05-05 06:49:15 +00:00
fdc5d84ba3
llvmc: Make 'true' and 'false' instances of a 'Bool' class.
...
llvm-svn: 130915
2011-05-05 04:25:03 +00:00
67ebd94a5d
llvmc: Make it possible to provide an argument to (join).
...
llvm-svn: 130914
2011-05-05 04:24:58 +00:00
4f9c367f0b
Update the gcov version used slightly, to make it stop causing modern gcov's to
...
crash.
llvm-svn: 130911
2011-05-05 02:46:38 +00:00
baa878ce4a
Remove dead function.
...
llvm-svn: 130903
2011-05-05 00:17:34 +00:00
a3d5d167a8
When the path wasn't emitted by the frontend, discard any path on the source
...
filename.
llvm-svn: 130897
2011-05-05 00:03:30 +00:00
1d3854d583
Disable physical register coalescing by default.
...
Joining physregs is inherently dangerous because it uses a heuristic to avoid
creating invalid code. Linear scan had an emergency spilling mechanism to deal
with those rare cases. The new greedy allocator does not.
The greedy register allocator is much better at taking hints, so this has almost
no impact on code size and quality. The few cases where it matters show up as
unit tests that now have -join-physregs enabled explicitly.
llvm-svn: 130896
2011-05-04 23:59:00 +00:00
ffb798c1c6
Set debug loc for new instructions.
...
llvm-svn: 130895
2011-05-04 23:58:50 +00:00
ac794d46bf
Set debug location for new PHI nodes created in exit block.
...
llvm-svn: 130894
2011-05-04 23:58:22 +00:00
17d4f9bbcc
Prepare remaining tests for -join-physreg going away.
...
llvm-svn: 130893
2011-05-04 23:54:59 +00:00
808dca12f8
Fix X86RegisterInfo::getMatchingSuperRegClass for sub_8bit_hi.
...
It is OK for B to be any GR8_ABCD_H superclass, the returned register class
doesn't have to map surjectively onto B.
llvm-svn: 130892
2011-05-04 23:54:54 +00:00
369bddf5ad
Fix a batch of x86 tests to be coalescer independent.
...
Most of these tests require a single mov instruction that can come either before
or after a 2-addr instruction. -join-physregs changes the behavior, but the
results are equivalent.
llvm-svn: 130891
2011-05-04 23:54:51 +00:00
260c4a9466
Document the automatic alias printing of InstAliases.
...
llvm-svn: 130889
2011-05-04 23:40:14 +00:00
37d44bdd92
Add explicit 'unregister' method to CrashRecoveryConextCleanupRegistrar.
...
llvm-svn: 130885
2011-05-04 23:26:59 +00:00
dd550305e6
Give this test an explicit register allocator, so that it can work even if
...
the default register allocator is changed.
llvm-svn: 130883
2011-05-04 23:14:02 +00:00
2a40131f6b
SjLj EH could produce a machine basic block that legitimately has more than one
...
landing pad as its successor.
SjLj exception handling jumps to the correct landing pad via a switch statement
that's generated right before code-gen. Loosen the constraint in the machine
instruction verifier to allow for this. Note, this isn't the most rigorous check
since we cannot determine where that switch statement came from. But it's
marginally better than turning this check off when SjLj exceptions are used.
<rdar://problem/9187612>
llvm-svn: 130881
2011-05-04 22:54:05 +00:00
306f8db721
Preserve line number information while threading jumps.
...
llvm-svn: 130880
2011-05-04 22:48:19 +00:00
892e9934ba
Create the parent directories to place the .gcda files in if they don't exist.
...
That's kinda weird because the .gcno files are supposed to already be there,
but libgcov does this and somehow Google has managed to depend on it.
llvm-svn: 130879
2011-05-04 22:34:29 +00:00
0fe4608af2
Re-commit r130862 with a minor change to avoid an iterator running off the edge in some cases.
...
Original message:
Teach MachineCSE how to do simple cross-block CSE involving physregs. This allows, for example, eliminating duplicate cmpl's on x86. Part of rdar://problem/8259436 .
llvm-svn: 130877
2011-05-04 22:10:36 +00:00
c7e4fa7c19
Preserve line number info.
...
llvm-svn: 130876
2011-05-04 21:58:58 +00:00
e53ae508ec
This test fails on ARM. The test shouldn't explicitly specify alignment (and alignment 4 is wrong) and requires hard-float.
...
llvm-svn: 130875
2011-05-04 21:57:44 +00:00
1fb95c996b
If builder is initialized using an instruction as insertion point, then use the instruction's debug location as current debug location.
...
llvm-svn: 130874
2011-05-04 21:57:22 +00:00
0daa07eb90
preserve line number info.
...
llvm-svn: 130869
2011-05-04 21:37:05 +00:00
3bd79ba856
Back out r130862; it appears to be breaking bootstrap.
...
llvm-svn: 130867
2011-05-04 20:48:42 +00:00
a16fc2fec0
Teach MachineCSE how to do simple cross-block CSE involving physregs. This allows, for example, eliminating duplicate cmpl's on x86. Part of rdar://problem/8259436 .
...
llvm-svn: 130862
2011-05-04 19:54:24 +00:00
9aa54fef84
Remove an unused variable.
...
llvm-svn: 130860
2011-05-04 19:13:01 +00:00
28a93a49bb
Fix more register and coalescing dependencies.
...
llvm-svn: 130859
2011-05-04 19:02:11 +00:00
d7fd7bfc31
Explicitly request physreg coalesing for a bunch of Thumb2 unit tests.
...
These tests all follow the same pattern:
mov r2, r0
movs r0, #0
$CMP r2, r1
it eq
moveq r0, #1
bx lr
The first 'mov' can be eliminated by rematerializing 'movs r0, #0' below the
test instruction:
$CMP r0, r1
mov.w r0, #0
it eq
moveq r0, #1
bx lr
So far, only physreg coalescing can do that. The register allocators won't yet
split live ranges just to eliminate copies. They can learn, but this particular
problem is not likely to show up in real code. It only appears because r0 is
used for both the function argument and return value.
llvm-svn: 130858
2011-05-04 19:02:07 +00:00
093a94cdae
Implement SystemZRegisterInfo::getMatchingSuperRegClass to enable cross-class joins.
...
llvm-svn: 130857
2011-05-04 19:02:04 +00:00
e7528c45ea
FileCheckize and break dependence on coalescing order.
...
llvm-svn: 130856
2011-05-04 19:02:01 +00:00
067ba3c23c
Explicitly request -join-physregs for some tests that depend on it.
...
llvm-svn: 130855
2011-05-04 19:01:59 +00:00
39ecf816c5
Do not emit location expression size twice.
...
llvm-svn: 130854
2011-05-04 19:00:57 +00:00
2998e6ce46
Fix cmake build.
...
llvm-svn: 130850
2011-05-04 18:46:56 +00:00
3bace5d223
Remove LLVM IR metadata in test case committed in r130847.
...
llvm-svn: 130849
2011-05-04 18:28:36 +00:00
23e8ecf125
Prevent instructions using $gp from being placed between a jalr and the instruction that restores the clobbered $gp.
...
llvm-svn: 130847
2011-05-04 17:54:27 +00:00
a75589171a
Producing a DW_FORM_addr for DW_AT_stmt_list is probably correct, but
...
it is both inefficient and unexpected by dwarfdump. Change to
a DW_FORM_data4.
While in here, change the predicate name to reflect that the position
is not really absolute (it is an offset), just that the linker needs a
relocation.
llvm-svn: 130846
2011-05-04 17:44:06 +00:00
f71fe4333b
Rename -disable-physical-join to -join-physregs and invert it.
...
Physreg joining is still on by default, but I will turn it off shortly.
llvm-svn: 130844
2011-05-04 16:45:05 +00:00
c981f6299e
Tighten up check for empty (i.e. no meaningful debug info) module. This fixes dwarf-die2.c test case from gcc test suite.
...
llvm-svn: 130842
2011-05-04 16:34:02 +00:00
a228785526
Add variations on: max(x,y) >= min(x,z) folds to true. This isn't that common,
...
but according to my super-optimizer there are only two missed simplifications
of -instsimplify kind when compiling bzip2, and this is one of them. It amuses
me to have bzip2 be perfectly optimized as far as instsimplify goes!
llvm-svn: 130840
2011-05-04 16:05:05 +00:00
6d9f061a6b
Emit gcov data files to the directory specified in the metadata produced by the
...
frontend, if applicable.
llvm-svn: 130835
2011-05-04 04:03:04 +00:00
0e5667bc89
Fix crash when not setting GCOV_PREFIX.
...
llvm-svn: 130834
2011-05-04 03:58:45 +00:00
3d57441e56
Remove dead intrinsics.
...
llvm-svn: 130831
2011-05-04 02:40:54 +00:00
1abe296cfd
indvars: Added DisableIVRewrite and WidenIVs.
...
This adds functionality to remove size/zero extension during indvars
without generating a canonical IV and rewriting all IV users. It's
disabled by default so should have no effect on codegen. Work in progress.
llvm-svn: 130829
2011-05-04 02:10:13 +00:00
737aac5107
The system suppression file should catch these, but since they *once again* are
...
not, I'll just add them here and be done with it.
llvm-svn: 130819
2011-05-04 01:03:02 +00:00
f1b401800a
Don't depend on the physreg coalescing order.
...
llvm-svn: 130818
2011-05-04 01:01:47 +00:00
5b5abb4ea1
Don't run this test through -regalloc=basic.
...
The basic allocator is really bad about hinting, so it doesn't eliminate all
copies when physreg joining is disabled.
llvm-svn: 130817
2011-05-04 01:01:44 +00:00
d3b2f44c9d
Fix register-dependent XCore tests
...
llvm-svn: 130816
2011-05-04 01:01:41 +00:00
7f7fc82141
Fix register-dependent test in MSP430.
...
llvm-svn: 130815
2011-05-04 01:01:39 +00:00
839beb4124
Implement MSP430RegisterInfo::getMatchingSuperRegClass to enable cross-class
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coalescing.
llvm-svn: 130814
2011-05-04 01:01:36 +00:00
438dc7e1a7
Remove some random comments that snuck in from somewhere.
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llvm-svn: 130812
2011-05-04 00:48:02 +00:00
f8be385c9b
Mark ultra-super-registers QQQQ as call-clobbered instead of the D sub-registers.
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LiveVariables doesn't understand that clobbering D0 and D1 completely overwrites
Q0, so if Q0 is live-in to a function, its live range will extend beyond a
function call that only clobbers D0 and D1. This shows up in the
ARM/2009-11-01-NeonMoves test case.
LiveVariables should probably implement the much stricter rules for physreg
liveness that RAFast imposes - a physreg is killed by the first use of any
alias.
llvm-svn: 130801
2011-05-03 22:31:24 +00:00
51b35f7bb1
Fix a bunch of ARM tests to be register allocation independent.
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llvm-svn: 130800
2011-05-03 22:31:21 +00:00
38c4e34abb
indvars: Added canExpandBackEdgeTakenCount.
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Only create a canonical IV for backedge taken count if it will
actually be used by LinearFunctionTestReplace. And some related
cleanup, preparing to reduce dependence on canonical IVs.
No significant effect on x86 or arm in the test-suite.
llvm-svn: 130799
2011-05-03 22:24:10 +00:00
543596d57b
Even if the subprogram is going to use AT_specification, emit DW_AT_MIPS_linkage_name. This helps gdb and fixes var-path-expr.exp regression reported by gdb testsuite.
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llvm-svn: 130794
2011-05-03 21:50:34 +00:00
f6daf94ab2
MCDwarf: Don't save Twine to local variable, this is almost never safe to do
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(and should thus never be done).
- Should fix a crash on win32.
llvm-svn: 130793
2011-05-03 21:33:37 +00:00
db0996c822
Replace the "movnt" intrinsics with a native store + nontemporal metadata bit.
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<rdar://problem/8460511>
llvm-svn: 130791
2011-05-03 21:11:17 +00:00
eaa6ed1ad8
Gracefully handle invalid live ranges. Fix PR9831.
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Register coalescing can sometimes create live ranges that end in the middle of a
basic block without any killing instruction. When SplitKit detects this, it will
repair the live range by shrinking it to its uses.
Live range splitting also needs to know about this. When the range shrinks so
much that it becomes allocatable, live range splitting fails because it can't
find a good split point. It is paranoid about making progress, so an allocatable
range is considered an error.
The coalescer should really not be creating these bad live ranges. They appear
when coalescing dead copies.
llvm-svn: 130787
2011-05-03 20:42:13 +00:00
0a9c1246d7
Implement some basic simplifications involving min/max, for example
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max(a,b) >= a -> true. According to my super-optimizer, these are
by far the most common simplifications (of the -instsimplify kind)
that occur in the testsuite and aren't caught by -std-compile-opts.
llvm-svn: 130780
2011-05-03 19:53:10 +00:00
e6ce2053e7
Tidy up. Add missing newline to generated file.
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llvm-svn: 130779
2011-05-03 19:09:56 +00:00
93b5cdc5ab
Make the test less likely to fail with minor changes.
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llvm-svn: 130778
2011-05-03 19:09:32 +00:00
22fc723818
Fix function MipsRegisterInfo::getRegisterNumbering.
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llvm-svn: 130774
2011-05-03 18:41:54 +00:00
c5242b0e78
Remove test for iOS divmod function, since that is disabled for now.
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llvm-svn: 130769
2011-05-03 17:54:49 +00:00
09585e1c5d
Temporarily disable use of divmod compiler-rt functions for iOS.
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llvm-svn: 130766
2011-05-03 17:33:22 +00:00
86c6e7057d
Fold ARM coprocessor intrinsics patterns into the instructions defs whenever
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it's possible.
llvm-svn: 130764
2011-05-03 17:29:29 +00:00
168c9005b5
Add a few ARM coprocessor intrinsics. Testcases included
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llvm-svn: 130763
2011-05-03 17:29:22 +00:00
600c8a2391
Fix a comment.
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llvm-svn: 130761
2011-05-03 17:22:56 +00:00
e02e58528a
If the front end has emitted llvm.dbg.cu and other debug info anchors (clang does it now) then use them directly. This saves one scan of entire module, to collect debug info, which in turns saves few machine cycles at compile time.
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llvm-svn: 130759
2011-05-03 16:45:22 +00:00
09fa69e151
Use llvm.dbg.cu named metadata to collect compile units.
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llvm-svn: 130756
2011-05-03 16:18:28 +00:00
9c373c1c7a
Remove unused variables caught by GCC's -Wunused-but-set-variable.
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llvm-svn: 130755
2011-05-03 16:00:27 +00:00
a51ef94ec1
Pass --disable-cfi to llc.
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llvm-svn: 130754
2011-05-03 15:56:16 +00:00
9973738b65
Add pentium{3,4}m cpus. Patch by Alexander Best!
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llvm-svn: 130749
2011-05-03 03:42:50 +00:00
d2aa241378
xmm0 is an implicit parameter in this and so shouldn't be in the
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string template.
Fixes rdar://8493866
llvm-svn: 130747
2011-05-03 01:28:32 +00:00
6136e94897
Add an unfolded offset field to LSR's Formula record. This is used to
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model constants which can be added to base registers via add-immediate
instructions which don't require an additional register to materialize
the immediate.
llvm-svn: 130743
2011-05-03 00:46:49 +00:00
66fd073974
Other parts of the SelectionDAG framework assume that targets use their pointer type for vector indices. Make the vector unrolling code respect that.
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llvm-svn: 130733
2011-05-02 22:25:45 +00:00
bb35e8ba88
Scanning entire basic block may be too expensive in terms of compile time. Instead, just use whatever location info first non-phi instruction has.
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llvm-svn: 130729
2011-05-02 21:57:00 +00:00
16f7cf6a2f
Handle <def,undef> in the second loop as well.
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llvm-svn: 130718
2011-05-02 20:36:53 +00:00
39b56b4b9f
Apparently the check for direct calls is unnecessary.
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llvm-svn: 130716
2011-05-02 20:16:33 +00:00
6297a715dc
Use the PrintReg adaptor to correctly print live-in registers in debug output.
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llvm-svn: 130715
2011-05-02 20:06:30 +00:00
7dffc8ecf2
Only ignore <undef> use operands, keep the <def,undef> ops.
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Def operands may also have an <undef> flag, but that just means that a
sub-register redef doesn't actually read the super-register. For physical
registers, it has no meaning.
llvm-svn: 130714
2011-05-02 20:06:28 +00:00
75e70e16e0
Pass -disable-cfi to llc.
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llvm-svn: 130713
2011-05-02 19:51:34 +00:00
7219831894
llvmc: Pass -disable-cfi to llc.
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llvm-svn: 130712
2011-05-02 19:45:24 +00:00
f91c5ab341
Fix PR9579: when simplifying a compare to "true" or "false", and it was
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a vector compare, generate a vector result rather than i1 (and crashing).
llvm-svn: 130706
2011-05-02 18:51:41 +00:00
Duncan Sands