Commit Graph

290781 Commits

Author SHA1 Message Date
Lei Huang 716103f1cd [PowerPC] Fix the incorrect iterator inside peephole
Instruction selection can insert nodes into the underlying list after the root
node so iterating will thereby miss it. We should NOT assume that, the root node
is the last element in the DAG nodelist.

Patch by: steven.zhang (Qing Shan Zhang)

Differential Revision: https://reviews.llvm.org/D47437

llvm-svn: 333415
2018-05-29 13:38:56 +00:00
Sander de Smalen 26b9b2a8c3 [AArch64][SVE] Asm: Support for AND, ORR, EOR and BIC instructions.
This patch addresses the following variants:
  - bitmask immediate,         e.g. 'and z0.d, z0.d, #0x6'.
  - unpredicated data vectors, e.g. 'and z0.d, z1.d, z2.d'.
  - predicated data vectors,   e.g. 'and z0.d, p0/m, z0.d, z1.d'.

And also several aliases, such as: 
  - ORN, alias of ORR.
  - EON, alias of EOR.
  - BIC, alias of AND (immediate variant)
  - MOV, alias of ORR (if unpredicated and source register operands are the same)

Reviewers: rengolin, huntergr, fhahn, samparker, SjoerdMeijer, javed.absar

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D47363

llvm-svn: 333414
2018-05-29 13:08:43 +00:00
David Stenberg d45d7eae05 Fix emission of phony dependency targets when adding extra deps
Summary:
This commit fixes a bug where passing extra dependency entries
(using -fdepfile-entry) would result in -MP incorrectly emitting
a phony target for the input file, and no phony target for the
first extra dependency.

The extra dependencies are added first to the filename vector in
DFGImpl. That clashed with the emission of the phony targets, as
the code assumed that the first index always correspond to the
input file.

Reviewers: rsmith, pcc, krasin, bruno, vsapsai

Reviewed By: vsapsai

Subscribers: vsapsai, bruno, cfe-commits

Differential Revision: https://reviews.llvm.org/D44568

llvm-svn: 333413
2018-05-29 13:07:58 +00:00
Jonas Devlieghere f6c870a794 [test] Fix --framework argument passed to dotest.
The framework argument was broken when I removed the generator
expressions upstream.  I replaced $<TARGET_FILE_DIR:liblldb> with
${LLVM_LIBRARY_OUTPUT_INTDIR}) which is not correct.

rdar://40534649

llvm-svn: 333412
2018-05-29 12:30:27 +00:00
Kirill Bobyrev 5a267ed889 [clangd] Minor cleanup
This patch silences few clang-tidy warnings, removes unwanted trailing
whitespace and enforces coding guidelines.

The functionality is not affected since the cleanup is rather straightforward,
all clangd tests are still green.

Reviewers: ioeric, ilya-biryukov

Reviewed By: ioeric

Subscribers: MaskRay, jkorous, cfe-commits

Differential Revision: https://reviews.llvm.org/D47471

llvm-svn: 333411
2018-05-29 11:50:51 +00:00
Luke Geeson 16092ab3c5 [AArch64] added FP16 vcvth intrinsic support
Summary: Change-Id: I0df845749c7689dfc99150ba7c19c7d0dadbd705

Reviewers: javed.absar, SjoerdMeijer

Reviewed By: SjoerdMeijer

Subscribers: llvm-commits, SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D46311

llvm-svn: 333410
2018-05-29 11:40:33 +00:00
Simon Atanasyan a1d69f9e53 [mips] Emit R_MICROMIPS_GPREL16/R_MICROMIPS_SUB/R_MICROMIPS_LO16 / HI16 relocations
Emit R_MICROMIPS_GPREL16/R_MICROMIPS_SUB/R_MICROMIPS_LO16 and
R_MICROMIPS_GPREL16/R_MICROMIPS_SUB/R_MICROMIPS_HI16 chains of
relocations for %lo(%neg(%gp_rel())) and %hi(%neg(%gp_rel()))
expressions in case of microMIPS.

Differential Revision: http://reviews.llvm.org/D47220

llvm-svn: 333409
2018-05-29 11:33:54 +00:00
Sander de Smalen 98686c6b15 [AArch64][SVE] Asm: Support for ADD (immediate) instructions.
This patch adds addsub_imm8_opt_lsl_(i8|i16|i32|i64) operands
that are unsigned values in the range 0 to 255. For element widths of
16 bits or higher it may also be a signed multiple of 256 in the
range 0 to 65280.

Note: This also does some refactoring to reuse convenience function
getShiftedVal<shift>(), and now allows AArch64 scalar 'ADD #-4096' to be
accepted to be mapped to SUB #4096.

Reviewers: rengolin, fhahn, samparker, SjoerdMeijer, javed.absar

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D47310

llvm-svn: 333408
2018-05-29 10:39:49 +00:00
Simon Atanasyan 6be87bce29 [mips] Emit R_MICROMIPS_HIGHER / R_MICROMIPS_HIGHEST relocations
Emit R_MICROMIPS_HIGHER / R_MICROMIPS_HIGHEST relocations for %higher()
and %highest() expressions in case of microMIPS. These relocations do
exactly the same things as R_MIPS_HIGHER / R_MIPS_HIGHEST, but for
consistency it's better to write microMIPS variants.

Differential Revision: http://reviews.llvm.org/D47219

llvm-svn: 333407
2018-05-29 10:27:44 +00:00
Luke Geeson cc09d78297 Test Commit Access - Removed Whitespace
llvm-svn: 333406
2018-05-29 10:12:27 +00:00
Simon Dardis 0fad58cbaf [mips] Correct the predicates for a number of instructions.
Previously, their listed predicates were overridden at the scope level.

Reviewers: atanasyan, abeserminji, smaksimovic

Differential Revision: https://reviews.llvm.org/D46947

llvm-svn: 333405
2018-05-29 09:56:19 +00:00
Simon Atanasyan b2d61fa3d8 [mips] Cleanup the code to reduce diff with the upcoming patches. NFC
llvm-svn: 333404
2018-05-29 09:51:33 +00:00
Simon Atanasyan d408ec4cfa [mips] Escape else-after-return. NFC
llvm-svn: 333403
2018-05-29 09:51:28 +00:00
Simon Atanasyan 3535cb1130 [mips] Stop parsing a .set assignment if the first argument is not an identifier
Before this fix the following code triggers two error messages. The
second one is at least useless:

  test.s:1:9: error: expected identifier after .set
    .set  123, $a0
          ^
  test-set.s:1:9: error: unexpected token, expected comma
    .set  123, $a0
          ^

llvm-svn: 333402
2018-05-29 09:51:22 +00:00
Pavel Labath 0bd19ead89 XFAIL TestMachCore for windows hosts
It's been failing since I enabled the test for non-darwin targets. I
made it reference the same bug as the linux core, as it's likely that
the root cause is the same.

llvm-svn: 333401
2018-05-29 09:22:58 +00:00
Bruce Mitchener 6e82c4d6cc Remove Linux-specific includes for posix/FileSystem.cpp
Summary:
This improves the process of cross-compiling from macOS to Linux
since these files aren't used / needed at all.

Reviewers: clayborg, labath

Subscribers: lldb-commits, krytarowski

Differential Revision: https://reviews.llvm.org/D47420

llvm-svn: 333400
2018-05-29 09:14:40 +00:00
Bruce Mitchener 4ebdee0a59 Typo fixes.
Reviewers: javed.absar

Subscribers: ki.stfu, JDevlieghere, lldb-commits

Differential Revision: https://reviews.llvm.org/D47421

llvm-svn: 333399
2018-05-29 09:10:46 +00:00
Pavel Labath 9c3d1f468a ManualDWARFIndex: Treat DW_TAG_subprogram and DW_TAG_inlined_subroutine the same way
Summary:
We were treating subprograms and inlined subroutines differently when
building the index. The difference was in which indexes were individual
tags inserted (subprograms went to all indexes, where as inlined
subroutines only into the basename and full name indexes).

This seems like an error, because an inlined subroutine can still
represent an C++ or an ObjC method. I don't see anything in the
subprogram branch which should not apply to an inlined subroutine, so I
propose to just treat them identically. This makes searching for an
inlined method behave the same way as for the apple index.

I write an assembly-based test because I did not want to depend on
particular clang inlining behavior (and because I wanted to see how hard
would it be).

Reviewers: clayborg, JDevlieghere

Subscribers: eraman, lldb-commits

Differential Revision: https://reviews.llvm.org/D47368

llvm-svn: 333398
2018-05-29 08:16:22 +00:00
Tim Renouf fa213f797b [AMDGPU] Fixed build warning
Summary:
V2: Use cast instead of extra if.

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D47426

Change-Id: I6ac31da0306f79706960284a7ebd7b9c6237a83a
llvm-svn: 333397
2018-05-29 08:15:37 +00:00
Rafael Stahl df55620c3e Testing commit access with whitespace change.
llvm-svn: 333396
2018-05-29 08:12:15 +00:00
Serge Pavlov 1a095524f2 Reverted commits 333390, 333391 and 333394
Build of shared library LLVMDemangle.so fails due to dependency problem.

llvm-svn: 333395
2018-05-29 07:05:41 +00:00
Serge Pavlov 335fa1eb04 Added library LLVMSupport to dependencies of LLVMDemangle
After r333390 build of LLVMDemangle.so fails due to unresolved
reference `llvm::report_bad_alloc_error`.

llvm-svn: 333394
2018-05-29 06:48:57 +00:00
Craig Topper a34f8731c7 [X86] Disable a DAG combine to allow packed AVX512DQ instructions to be consistently used for i64->float/double conversions.
Summary: We already get this right if the i64 didn't come from a load.

Reviewers: RKSimon

Reviewed By: RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D47439

llvm-svn: 333393
2018-05-29 06:22:45 +00:00
Clement Courbet 07c9ec6f2e [X86][Sched] Add InstRW for CLC on Intel after SNB.
Summary:
After SNB, Intel CPUs can rename CF independently of other EFLAGS,
so the renamer can zero it for free. Note that STC still consumes resources.

To reproduce: `$ llvm-exegesis -mode=uops -opcode-name=CLC`

On SNB:
```
---
key:
  opcode_name:     CLC
  mode:            uops
  config:          ''
cpu_name:        sandybridge
llvm_triple:     x86_64-unknown-linux-gnu
num_repetitions: 10000
measurements:
  - { key: '3', value: 0.0014, debug_string: SBPort0 }
  - { key: '4', value: 0.0013, debug_string: SBPort1 }
  - { key: '5', value: 0.0003, debug_string: SBPort4 }
  - { key: '6', value: 0.0029, debug_string: SBPort5 }
  - { key: '10', value: 0.0003, debug_string: SBPort23 }
error:           ''
info:            'instruction is serial, repeating a random one.
Snippet:
CLC
'
...
```

On HSW:
```
---
key:
  opcode_name:     CLC
  mode:            uops
  config:          ''
cpu_name:        haswell
llvm_triple:     x86_64-unknown-linux-gnu
num_repetitions: 10000
measurements:
  - { key: '3', value: 0.001, debug_string: HWPort0 }
  - { key: '4', value: 0.0009, debug_string: HWPort1 }
  - { key: '5', value: 0.0004, debug_string: HWPort2 }
  - { key: '6', value: 0.0006, debug_string: HWPort3 }
  - { key: '7', value: 0.0002, debug_string: HWPort4 }
  - { key: '8', value: 0.0012, debug_string: HWPort5 }
  - { key: '9', value: 0.0022, debug_string: HWPort6 }
  - { key: '10', value: 0.0001, debug_string: HWPort7 }
error:           ''
info:            'instruction is serial, repeating a random one.
Snippet:
CLC
'
...

```

Reviewers: craig.topper, RKSimon

Subscribers: gchatelet, llvm-commits

Differential Revision: https://reviews.llvm.org/D47362

llvm-svn: 333392
2018-05-29 06:19:39 +00:00
Serge Pavlov edc8d889b9 Added system header cstdlib to MemAlloc.h
Some buildbots fail because they cannot find `std::malloc` and other
allocation functions.

llvm-svn: 333391
2018-05-29 06:03:53 +00:00
Serge Pavlov 0e31285fe8 Use uniform mechanism for OOM errors handling
In r325551 many calls of malloc/calloc/realloc were replaces with calls of
their safe counterparts defined in the namespace llvm. There functions
generate crash if memory cannot be allocated, such behavior facilitates
handling of out of memory errors on Windows.

If the result of *alloc function were checked for success, the function was
not replaced with the safe variant. In these cases the calling function made
the error handling, like:

    T *NewElts = static_cast<T*>(malloc(NewCapacity*sizeof(T)));
    if (NewElts == nullptr)
      report_bad_alloc_error("Allocation of SmallVector element failed.");

Actually knowledge about the function where OOM occurred is useless. Moreover
having a single entry point for OOM handling is convenient for investigation
of memory problems. This change removes custom OOM errors handling and
replaces them with calls to functions `llvm::safe_*alloc`.

Declarations of `safe_*alloc` are moved to a separate include file, to avoid
cyclic dependency in SmallVector.h

Differential Revision: https://reviews.llvm.org/D47440

llvm-svn: 333390
2018-05-29 05:39:08 +00:00
Fangrui Song 74d6a7400c [LangRef] Fix TBAA example
llvm-svn: 333389
2018-05-29 05:38:05 +00:00
Craig Topper 21aeddc3dc [X86] Remove masked vpermi2var/vpermt2var intrinsics and autoupgrade.
We have unmasked intrinsics now and wrap them with a select. This is a net reduction of 36 intrinsics from before the unmasked intrinsics were added.

llvm-svn: 333388
2018-05-29 05:22:05 +00:00
Craig Topper 68a272d501 [X86] Merge the 3 different flavors of masked vpermi2var/vpermt2var builtins to a single version without masking. Use select builtins with appropriate operand instead.
llvm-svn: 333387
2018-05-29 03:26:38 +00:00
Craig Topper 2adc7d956c [X86] Add unmasked vermi2var intrinsics so we can use explicit select instructions for masking in clang.
This will allow us to remove the 3 different flavors of masked intrinsics. I'm leaving the actual intrinsic removal for another patch.

llvm-svn: 333386
2018-05-29 03:26:30 +00:00
Shiva Chen f78fc3842f [RISCV] Add -mrelax/-mno-relax flags to enable/disable RISCV linker relaxation
Differential Revision: https://reviews.llvm.org/D44888

llvm-svn: 333385
2018-05-29 00:44:15 +00:00
Eric Fiselier bd2e949869 LWG 2969 "polymorphic_allocator::construct() shouldn't pass resource()"
Patch from Arthur O'Dwyer.

In the TS, `uses_allocator` construction for `pair` tried to use an allocator
type of `memory_resource*`, which is incorrect because `memory_resource*` is
not an allocator type. LWG 2969 fixed it to use `polymorphic_allocator` as the
allocator type instead.

https://wg21.link/lwg2969

(D47090 included this in `<memory_resource>`; at Eric's request, I've split
this out into its own patch applied to the existing
`<experimental/memory_resource>` instead.)

Reviewed as https://reviews.llvm.org/D47109

llvm-svn: 333384
2018-05-29 00:08:47 +00:00
Craig Topper dcfcfdb0d1 [X86] Converge X86ISD::VPERMV3 and X86ISD::VPERMIV3 to a single opcode.
These do the same thing with the first and second sources swapped. They previously came from separate intrinsics that specified different masking behavior. But we can cover that with isel patterns and a single node.

This is a step towards reducing the number of intrinsics needed.

A bunch of tests change because we are now biased to choosing VPERMT over VPERMI when there is nothing to signal that commuting is beneficial.

llvm-svn: 333383
2018-05-28 19:33:11 +00:00
Craig Topper 6b545182fb [X86] Fix typo in comment. NFC
llvm-svn: 333382
2018-05-28 19:33:06 +00:00
Marshall Clow c58f9b787f Fix up the final bits of breakage due to clang v5 generating bad implicit template deduction guides - specifically for copy-ctors
llvm-svn: 333381
2018-05-28 19:20:21 +00:00
Farhana Aleen eacb1020aa [AMDGPU] Re-enabled 128bit wide-vector generation for local addr space by default.
Summary: Bug reported here https://bugs.freedesktop.org/show_bug.cgi?id=105464 found
         to be resolved by some other fixes.

Author: FarhanaAleen
llvm-svn: 333380
2018-05-28 18:15:11 +00:00
Gor Nishanov 07ac63f89e [coroutines] Pass implicit object parameter to promise ctor (fix BUG37604)
Summary:
Complete the implementation of p0914r1.
Implicit object parameter should be passed to a promise constructor.

Fixes: https://bugs.llvm.org/show_bug.cgi?id=37604

Reviewers: modocache, rsmith, lewissbaker

Reviewed By: modocache

Subscribers: cfe-commits, EricWF

Differential Revision: https://reviews.llvm.org/D47454

llvm-svn: 333379
2018-05-28 18:08:47 +00:00
Fangrui Song afa95ee03d [LLVM-C] [OCaml] Remove LLVMAddBBVectorizePass
Summary: It was fully replaced back in 2014, and the implementation was removed 11 months ago by r306797.

Reviewers: hfinkel, chandlerc, whitequark, deadalnix

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D47436

llvm-svn: 333378
2018-05-28 16:58:10 +00:00
Lei Huang 651be44913 [Power9]Legalize and emit code for HW/Byte vector extract and convert to QP
Implemente patterns to extract HWord and Byte vector elements and convert to
quad-precision.

Differential Revision: https://reviews.llvm.org/D46774

llvm-svn: 333377
2018-05-28 16:43:29 +00:00
Marshall Clow aefe07a4c1 Mark the template deduction tests as UNSUPPORTED on clang 5, because it deduces the wrong type.
llvm-svn: 333376
2018-05-28 15:42:47 +00:00
Mikhail R. Gadelha 8af2e690f3 Introduces --stats-only option to only show changes in statistics.
llvm-svn: 333375
2018-05-28 15:40:39 +00:00
Zaara Syeda 6f3df02fdc [PowerPC] Set isAsmParserOnly=1 for X-form TLS loads/stores
The X-form TLS load/store instructions added for optimizing the initial-exec
sequence in https://reviews.llvm.org/rL327635 fail to assemble. llvm-mc fails
with the error: invalid operand for instruction. This patch adds these
instructions into a block with isAsmParserOnly, similar to how ADD8TLS_ is
currently handled.

Differential Revision: https://reviews.llvm.org/D47382

llvm-svn: 333374
2018-05-28 15:27:58 +00:00
Ilya Biryukov 11f55c37dd [clangd] Remove the outdated comment. NFC
llvm-svn: 333373
2018-05-28 12:43:20 +00:00
Daniel Cederman 2e7fe0edaf [Sparc] Add .uahalf and .uaword directives
Summary:
Adding these makes it easier to assemble the output from GCC which
generates a lot of .uahalf and .uaword directives.

GAS treats .uahalf and .half the same unless the --enforce-aligned-data
flag is used. I could not find a similar flag for LLVM so it seems that
.half does not have any alignment requirement and is treated the same as
.uahalf should be. If that would change later on then the tests in
sparc-directives.s would fail due to bad alignment.

Reviewers: jyknight, asb

Reviewed By: jyknight

Subscribers: fedor.sergeev, jrtc27, llvm-commits

Differential Revision: https://reviews.llvm.org/D47319

llvm-svn: 333372
2018-05-28 12:42:55 +00:00
Ilya Biryukov da0256f2c8 [clangd] Remove accessors for top-level decls from preamble
Summary:
They cause lots of deserialization and are not actually used.
The ParsedAST accessor that previously returned those was renamed from
getTopLevelDecls to getLocalTopLevelDecls in order to avoid
confusion.

This change should considerably improve the speed of findDefinition
and other features that try to find AST nodes, corresponding to the
locations in the source code.

Reviewers: ioeric, sammccall

Reviewed By: sammccall

Subscribers: klimek, mehdi_amini, MaskRay, jkorous, cfe-commits

Differential Revision: https://reviews.llvm.org/D47331

llvm-svn: 333371
2018-05-28 12:23:17 +00:00
Ilya Biryukov 981a35d81e [clangd] Fix leak sanitizers warnings in clangd
The commit includes two changes:
1. Set DisableFree to false when building the ParsedAST.
   This is sane default, since clangd never wants to leak the AST.
2. Make sure CompilerInstance created in code completion is passed to
   the FrontendAction::BeginSourceFile call.
   We have to do this to make sure the memory buffers of remapped
   files are properly freed.

Our tests do not produce any warnings under asan anymore.
The changes are mostly trivial, just moving the code around. So
sending without review.

llvm-svn: 333370
2018-05-28 12:11:37 +00:00
Ilya Biryukov 30b04b1861 [clangd] Workaround the comments crash, reenable the test.
This fix is still quite fragile, the underlying problem is that the
code should not rely on source ranges coming from the preamble to be
correct when reading from the text buffers.
This is probably not possible to achieve in practice, so we would
probably have to keep the contents of old headers around for the
lifetime of the preamble.

llvm-svn: 333369
2018-05-28 09:54:51 +00:00
Joachim Protze 406361330b [OMPT] Rename ompt_wait_id to omp_wait_id
Rename ompt_wait_id to omp_wait_id, as defined in the spec.

Differential Revision: https://reviews.llvm.org/D46530

llvm-svn: 333368
2018-05-28 08:16:08 +00:00
Joachim Protze c5836064bb [OMPT] Rename ompt_frame_t to omp_frame_t
Rename ompt_frame_t to omp_frame_t, as defined in the spec.

Differential Revision: https://reviews.llvm.org/D43568

llvm-svn: 333367
2018-05-28 08:14:58 +00:00
Tobias Grosser 9b9c701020 [ScopInfo] Update Scop::addUserContext() to C++ interface
Summary: This patch updates `Scop::addUserContext()` function to the new C++ interface and replaces the `auto` keyword with explicit type wherever used in this function.

Reviewers: grosser, bollu, philip.pfaffe, chelini, Meinersbur

Reviewed By: grosser

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D47438

llvm-svn: 333366
2018-05-28 07:45:25 +00:00