Commit Graph

1856 Commits

Author SHA1 Message Date
Alex Zinenko bc18624b40 [mlir] vector.type_cast: disallow memrefs with layout in verifier
Summary:
These are not supported by any of the code using `type_cast`. In the general
case, such casting would require memrefs to handle a non-contiguous vector
representation or misaligned vectors (e.g., if the offset of the source memref
is not divisible by vector size, since offset in the target memref is expressed
in the number of elements).

Differential Revision: https://reviews.llvm.org/D76349
2020-03-19 10:15:41 +01:00
Rob Suderman cd1212deff [mlir] Introduced CallOp Dialect Conversion
Summary:
Utility to perform CallOp Dialect conversion, specifically handling cases where
an argument type has changed and the corresponding CallOp needs to be updated.

Differential Revision: https://reviews.llvm.org/D76326
2020-03-18 20:07:38 -07:00
Lei Zhang 73431a492b [mlir][spirv] Consolidate std.constant to spv.constant conversions
This commit merges the DRR pattern for std.constant to spv.constant
conversion into the C++ OpConversionPattern. This allows us to have
remove the DRR pattern file. Along the way, this commit enhanced
std.constant to spv.constant conversion to consider type conversions,
which means converting the underlying attributes if necessary.

Differential Revision: https://reviews.llvm.org/D76246
2020-03-18 20:11:05 -04:00
Lei Zhang ffd4583c6a [mlir][spirv] Change standard op patterns to consider type conversion
Previously we have a few patterns that were written with DRR. DRR
at the moment does not work nicely with dialect conversion framework.
It generates normal RewritePatterns, while the dialect conversion
framework requires ConversionPatterns to take into consideration
the type conversion. So this commit starts to change existing DRR
patterns for standard ops to OpConversionPattern to incorporate the
SPIR-V type conversion. All patterns are converted except the one
for constant ops, which will happen in a subsequent commit.

Differential Revision: https://reviews.llvm.org/D76245
2020-03-18 20:11:05 -04:00
Lei Zhang 9efb4b4023 [mlir][spirv] Make SPIRVTypeConverter target environment aware
Non-32-bit scalar types requires special hardware support that may
not exist on all Vulkan-capable GPUs. This is reflected as non-32-bit
scalar types require special capabilities or extensions to be used.
This commit makes SPIRVTypeConverter target environment aware so
that it can properly convert standard types to what is accepted on
the target environment.

Right now if a scalar type bitwidth is not supported in the target
environment, we use 32-bit unconditionally. This requires Vulkan
runtime to also feed in data with a matched bitwidth and layout,
especially for interface types. The Vulkan runtime can do that by
inspecting the SPIR-V module. Longer term, we might want to introduce
a way to control how such case are handled and explicitly fail
if wanted.

Differential Revision: https://reviews.llvm.org/D76244
2020-03-18 20:11:05 -04:00
Lei Zhang 58df5e6d9a [mlir][spirv] Plumbing target environment into type converter
This commit unifies target environment queries into a new wrapper
class spirv::TargetEnv and shares across various places needing
the functionality. We still create multiple instances of TargetEnv
though given the parent components (type converters, passes,
conversion targets) have different lifetimes.

In the meantime, LowerABIAttributesPass is updated to take into
consideration the target environment, which requires updates to
tests to provide that.

Differential Revision: https://reviews.llvm.org/D76242
2020-03-18 20:11:05 -04:00
Lei Zhang 67e8690e53 [mlir][spirv] Let SPIRVConversionTarget consider type availability
Previously we only consider the version/extension/capability requirement
on the op itself. This commit updates SPIRVConversionTarget to also
take into consideration the values' types when deciding op legality.

Differential Revision: https://reviews.llvm.org/D75876
2020-03-18 20:11:04 -04:00
Lei Zhang 3b35f9d8b5 [mlir][spirv] Use memref memory space for storage class
Previously in SPIRVTypeConverter, we always convert memref types
to StorageBuffer regardless of their memory spaces. This commit
fixes that to let the conversion to look into memory space
properly. For this purpose, a mapping between SPIR-V storage class
and memref memory space is introduced. The mapping is arbitary
decided at the moment and the hope is that we can leverage
string memory space later to be more clear.

Now spv.interface_var_abi cannot contain storage class unless it's
attached to a scalar value, where we need the storage class as side
channel information. Verifications and tests are properly adjusted.

Differential Revision: https://reviews.llvm.org/D76241
2020-03-18 20:11:04 -04:00
Nicolas Vasilache 1e43132209 [mlir][LLVM] Add masked reads and writes.
Summary: These intrinsics will be used to lower vector transfer read/write.

Reviewers: aartbik, tetuante, jsetoain

Reviewed By: aartbik

Subscribers: mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, arpith-jacob, mgester, lucyrfox, liufengdb, Joonsoo, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D75986
2020-03-18 16:19:07 -04:00
River Riddle 4be504a97f [mlir] Add support for detecting single use callables in the Inliner.
Summary: This is somewhat complex(annoying) as it involves directly tracking the uses within each of the callgraph nodes, and updating them as needed during inlining. The benefit of this is that we can have a more exact cost model, enable inlining some otherwise non-inlinable cases, and also ensure that newly dead callables are properly disposed of.

Differential Revision: https://reviews.llvm.org/D75476
2020-03-18 13:10:41 -07:00
River Riddle 3145427dd7 [mlir][NFC] Replace all usages of PatternMatchResult with LogicalResult
This also replaces usages of matchSuccess/matchFailure with success/failure respectively.

Differential Revision: https://reviews.llvm.org/D76313
2020-03-17 20:21:32 -07:00
Nicolas Vasilache 2fae7878d5 [mlir][Vector] Mostly-NFC - Restructure options for lowering to LLVM Matrix Intrinsics
Summary:
This revision restructures the calling of vector transforms to make it more flexible to ask for lowering through LLVM matrix intrinsics.
This also makes sure we bail out in degenerate cases (i.e. 1) in which LLVM complains about not being able to scalarize.

Differential Revision: https://reviews.llvm.org/D76266
2020-03-17 22:58:02 -04:00
Rob Suderman 4d60f47b08 [mlir][NFC] Renamed VectorOps to Vector
Summary: Renamed VectorOps to Vector to avoid the redundant Ops suffix.

Differential Revision: https://reviews.llvm.org/D76317
2020-03-17 15:28:08 -07:00
Rob Suderman 363dd3f394 [mlir][NFC] Rename QuantOps to Quant
Summary:
Renamed QuantOps to Quant to avoid the Ops suffix. All dialects will contain
ops, so the Ops suffix is redundant.

Differential Revision: https://reviews.llvm.org/D76318
2020-03-17 15:16:47 -07:00
Jacques Pienaar 9a65d683e0 [mlir] Add target for Shape dialect
Summary:
Add targets and basic printing/parsing of types in Shape dialect.

Differential Revision: https://reviews.llvm.org/D76321
2020-03-17 14:54:25 -07:00
River Riddle 5267f5e6b4 [mlir] Add a hook to PatternRewriter to allow for patterns to notify why a match failed.
Summary:
This revision adds a new hook, `notifyMatchFailure`, that allows for notifying the rewriter that a match failure is coming with the provided reason. This hook takes as a parameter a callback that fills a `Diagnostic` instance with the reason why the match failed. This allows for the rewriter to decide how this information can be displayed to the end-user, and may completely ignore it if desired(opt mode). For now, DialectConversion is updated to include this information in the debug output.

Differential Revision: https://reviews.llvm.org/D76203
2020-03-17 12:12:21 -07:00
Sagar Jain 76cf14035b [MLIR] Added llvm.fence
This patch adds llvm.fence. I tried not to change the syntax much.

syntax:

LLVM IR
`fence [syncscope("<target-scope>")] <ordering>`

MLIR LLVM Dialect

`llvm.fence [syncscope("<target-scope>")] <ordering>`

example:
LLVM IR: `fence syncscope("agent") seq_cst`
MLIR: `llvm.fence syncscope("agent") seq_cst`

Differential Revision: https://reviews.llvm.org/D75645
2020-03-17 17:53:37 +01:00
Alex Zinenko e119980f3f [mlir] LLVM dialect: move ensureDistinctSuccessors out of std->LLVM conversion
MLIR supports terminators that have the same successor block with different
block operands, which cannot be expressed in the LLVM's phi-notation as the
block identifier is used to tell apart the predecessors. This limitation can be
worked around by branching to a new block instead, with this new block
unconditionally branching to the original successor and forwarding the
argument. Until now, this transformation was performed during the conversion
from the Standard to the LLVM dialect. This does not scale well to multiple
dialects targeting the LLVM dialect as all of them would have to be aware of
this limitation and perform the preparatory transformation. Instead, do it as a
separate pass and run it immediately before the translation.

Differential Revision: https://reviews.llvm.org/D75619
2020-03-17 15:22:14 +01:00
Denis Khalikov bfb2ce0256 [mlir][vulkan-runner] Use C-compatible wrapper emission.
A memref argument is converted into a pointer-to-struct argument
of type `{T*, T*, i64, i64[N], i64[N]}*` in the wrapper function,
where T is the converted element type and N is the memref rank.

Differential Revision: https://reviews.llvm.org/D76059
2020-03-17 07:54:41 -04:00
Uday Bondhugula 332f0b3cd4 Affine expr simplification for add of const multiple of same expression
- Detect "c_1 * expr + c_2 * expr" as (c_1 + c_2) * expr
- subsumes things like 'expr - expr' and "expr * -1 + expr" as 0.
- change AffineConstantExpr ctor to allow default null init

Signed-off-by: Uday Bondhugula <uday@polymagelabs.com>

Differential Revision: https://reviews.llvm.org/D76233
2020-03-17 08:22:17 +05:30
River Riddle 032743e18f [mlir] Add support for the attribute verifiers in the dialect declaration generator.
Summary: This adds bitfields that map to the dialect attribute verifier hooks. This also moves over the Test dialect to have its declaration generated.

Differential Revision: https://reviews.llvm.org/D76254
2020-03-16 18:32:23 -07:00
Uday Bondhugula d811aee5d9 [MLIR][NFC] update/clean up affine PDT, related utils, its test case
- rename vars that had inst suffixes (due to ops earlier being
  known as insts); other renames for better readability
- drop unnecessary matches in test cases
- iterate without block terminator
- comment/doc updates
- instBodySkew -> affineForOpBodySkew

Signed-off-by: Uday Bondhugula <uday@polymagelabs.com>

Differential Revision: https://reviews.llvm.org/D76214
2020-03-17 06:12:16 +05:30
Feng Liu 166f83f436 [QuantOps] Add the quant region definition
Summary:
This regional op in the QuantOps dialect will be used to wrap
high-precision ops into atomic units for quantization. All the values
used by the internal ops are captured explicitly by the op inputs. The
quantization parameters of the inputs and outputs are stored in the
attributes.

Subscribers: jfb, mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, aartbik, Joonsoo, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D75972
2020-03-16 15:44:43 -07:00
Uday Bondhugula c94cfe6ea7 [MLIR] fix parse bound error message
- fix parse error message for affine for op's bounds

Signed-off-by: Uday Bondhugula <uday@polymagelabs.com>

Differential Revision: https://reviews.llvm.org/D76198
2020-03-16 02:57:23 +00:00
Ahmed Taei 18fc42fa33 [mlir][LLVMIR] Add a support for boolean type arguments conversion
Summary:
Otherwise this will fail translating ops with boolean arguments and
added test will fail.

Reviewers: nicolasvasilache, rriddle

Subscribers: mehdi_amini, jpienaar, burmako, shauheen, antiagainst, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, Joonsoo, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76159
2020-03-13 14:40:26 -07:00
Hanhan Wang 92f7e8133a [mlir][Linalg] Implement padding for linalg.conv and lowering to loops.
Summary:
To enable this, two changes are needed:
1) Add an optional attribute `padding` to linalg.conv.
2) Compute if the indices accessing is out of bound in the loops. If so, use the
padding value `0`. Otherwise, use the value derived from load.

In the patch, the padding only works for lowering without other transformations,
e.g., tiling, fusion, etc.

Differential Revision: https://reviews.llvm.org/D75722
2020-03-13 14:35:58 -07:00
Jacques Pienaar b2bb8b6cd6 [mlir] Automatically add DerivedAttribute op interface
Summary: When an operation has derived attributes, add the DerivedAttribute op interface.

Differential Revision: https://reviews.llvm.org/D76144
2020-03-13 14:26:30 -07:00
Nicolas Vasilache bbf3ef8541 [mlir][Vector]Lower vector.contract to llvm.intr.matrix_multiply
Summary:
This revision adds lowering of vector.contract to llvm.intr.matrix_multiply.
Note that there is currently a mismatch between the MLIR vector dialect which
expects row-major layout and the LLVM matrix intrinsics which expect column
major layout.

As a consequence, we currently only match a vector.contract with indexing maps
that express column-major matrix multiplication.
Other cases would require additional transposes and it is better to wait for
LLVM intrinsics to provide a per-operation attribute that would specify which
layout is expected.

A separate integration test, not submitted to MLIR core, has independently
verified that correct execution occurs on a 2x2x2 matrix multiplication.

Differential Revision: https://reviews.llvm.org/D76014
2020-03-13 16:33:23 -04:00
aartbik a213ece30b [mlir] [VectorOps,LinAlg] Remove direct LLVM lowering for vector.broadcast
Summary:
The direct lowering of vector.broadcast into LLVM has been replaced by
progressive lowering into elementary vector ops. This also required a
small refactoring of a llvm.mlir test that used a direct vector.broadcast
operator (just to define a matmul).

Reviewers: nicolasvasilache, andydavis1, rriddle

Reviewed By: nicolasvasilache

Subscribers: mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, liufengdb, Joonsoo, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76143
2020-03-13 11:42:51 -07:00
Chris Lattner 89ecd8c149 Teach the MLIR AsmPrinter to correctly escape asm names that use invalid characters.
Reviewers: rriddle!

Subscribers: mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, liufengdb, Joonsoo, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D75919
2020-03-12 22:36:41 -07:00
Lei Zhang e5c85a5a4f [mlir][spirv] Support querying type extension/capability requirements
Previously we only consider the version/capability/extension requirements
on ops themselves. Some types in SPIR-V also require special extensions
or capabilities to be used. For example, non-32-bit integers/floats
will require different capabilities and/or extensions depending on
where they are used because it may mean special hardware abilities.

This commit adds query methods to SPIR-V type class hierarchy to support
querying extensions and capabilities. We don't go through ODS for
auto-generating such information given that we don't have them in
SPIR-V machine readable grammar and there are just a few types.

Differential Revision: https://reviews.llvm.org/D75875
2020-03-12 19:37:45 -04:00
Lei Zhang 3148f10b17 [mlir][spirv] Use spv.vce in spv.module and wire up (de)serialization
This commits changes the definition of spv.module to use the #spv.vce
attribute for specifying (version, capabilities, extensions) triple
so that we can have better API and custom assembly form. Since now
we have proper modelling of the triple, (de)serialization is wired up
to use them.

With the new UpdateVCEPass, we don't need to manually specify the
required extensions and capabilities anymore when creating a spv.module.
One just need to call UpdateVCEPass before serialization to get the
needed version/extensions/capabilities.

Differential Revision: https://reviews.llvm.org/D75872
2020-03-12 19:37:45 -04:00
Lei Zhang 9414db1090 [mlir][spirv] Add a pass to deduce version/extension/capability
Creates an operation pass that deduces and attaches the minimal version/
capabilities/extensions requirements for spv.module ops.

For each spv.module op, this pass requires a `spv.target_env` attribute on
it or an enclosing module-like op to drive the deduction. The reason is
that an op can be enabled by multiple extensions/capabilities. So we need
to know which one to pick. `spv.target_env` gives the hard limit as for
what the target environment can support; this pass deduces what are
actually needed for a specific spv.module op.

Differential Revision: https://reviews.llvm.org/D75870
2020-03-12 19:37:45 -04:00
Lei Zhang e115a40f50 [mlir][spirv] Use separate attribute for (version, capabilities, extensions)
We also need the (version, capabilities, extensions) triple on the
spv.module op. Thus far we have been using separate 'extensions'
and 'capabilities' attributes there and 'version' is missing. Creating
a separate attribute for the trip allows us to reuse the assembly
form and verification.

Differential Revision: https://reviews.llvm.org/D75868
2020-03-12 19:37:45 -04:00
River Riddle 0ddba0bd59 [mlir][SideEffects] Replace HasNoSideEffect with the memory effect interfaces.
HasNoSideEffect can now be implemented using the MemoryEffectInterface, removing the need to check multiple things for the same information. This also removes an easy foot-gun for users as 'Operation::hasNoSideEffect' would ignore operations that dynamically, or recursively, have no side effects. This also leads to an immediate improvement in some of the existing users, such as DCE, now that they have access to more information.

Differential Revision: https://reviews.llvm.org/D76036
2020-03-12 14:26:15 -07:00
River Riddle 907403f342 [mlir] Add a new `ConstantLike` trait to better identify operations that represent a "constant".
The current mechanism for identifying is a bit hacky and extremely adhoc, i.e. we explicit check 1-result, 0-operand, no side-effect, and always foldable and then assume that this is a constant. Adding a trait adds structure to this, and makes checking for a constant much more efficient as we can guarantee that all of these things have already been verified.

Differential Revision: https://reviews.llvm.org/D76020
2020-03-12 14:26:15 -07:00
River Riddle 7c211cf3af [mlir][NFC] Move the definition of AffineApplyOp to ODS
This has been a long standing cleanup TODO.

Differential Revision: https://reviews.llvm.org/D76019
2020-03-12 14:26:15 -07:00
River Riddle 483f82b146 [mlir][SideEffects][NFC] Move the .td definitions for NoSideEffect/RecursiveSideEffect to SideEffects.td
This matches the location of these traits within the source files.

Differential Revision: https://reviews.llvm.org/D75968
2020-03-12 14:26:15 -07:00
aartbik 078776a679 [mlir] [VectorOps] Progressively lower vector.outerproduct to LLVM
Summary:
This replaces the direct lowering of vector.outerproduct to LLVM with progressive lowering into elementary vectors ops to avoid having the similar lowering logic at several places.

NOTE1: with the new progressive rule, the lowered llvm is slightly more elaborate than with the direct lowering, but the generated assembly is just as optimized; still if we want to stay closer to the original, we should add a "broadcast on extract" to shuffle rewrite (rather than special cases all the lowering steps)

NOTE2: the original outerproduct lowering code should now be removed but some linalg test work directly on vector and contain some dead code, so this requires another CL

Reviewers: nicolasvasilache, andydavis1

Reviewed By: nicolasvasilache, andydavis1

Subscribers: mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, liufengdb, Joonsoo, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D75956
2020-03-12 13:45:42 -07:00
Tim Shen d00f5632f3 [mlir] Add a simplifying wrapper for generateCopy and expose it.
Summary:
affineDataCopyGenerate is a monolithinc function that
combines several steps for good reasons, but it makes customizing
the behaivor even harder. The major two steps by affineDataCopyGenerate are:
a) Identify interesting memrefs and collect their uses.
b) Create new buffers to forward these uses.

Step (a) actually has requires tremendous customization options. One could see
that from the recently added filterMemRef parameter.

This patch adds a function that only does (b), in the hope that (a)
can be directly implemented by the callers. In fact, (a) is quite
simple if the caller has only one buffer to consider, or even one use.

Differential Revision: https://reviews.llvm.org/D75965
2020-03-11 16:22:31 -07:00
River Riddle d2f3e5f204 [mlir] Add support for non-identifier attribute names.
Summary: In some situations the name of the attribute is not representable as a bare-identifier, this revision adds support for those cases by formatting the name as a string instead. This has the added benefit of removing the identifier regex from the verifier.

Differential Revision: https://reviews.llvm.org/D75973
2020-03-11 13:22:33 -07:00
Christian Sigg fc421d7ca3 [MLIR] Remove all-reduce lowering from GPU to NVVM. Use in-dialect lowering instead.
Reviewers: herhut, mravishankar

Reviewed By: herhut

Subscribers: merge_guards_bot, jholewinski, mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, Joonsoo, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D73794
2020-03-11 15:17:54 +01:00
Valentin Clement c7380995f8 [MLIR] Add `and`, `or`, `xor`, `min`, `max` too gpu.all_reduce and the nvvm lowering
Summary:
This patch add some builtin operation for the gpu.all_reduce ops.
- for Integer only: `and`, `or`, `xor`
- for Float and Integer: `min`, `max`

This is useful for higher level dialect like OpenACC or OpenMP that can lower to the GPU dialect.

Differential Revision: https://reviews.llvm.org/D75766
2020-03-11 14:07:04 +01:00
Stephan Herhut f6790a1c63 Revert "[MLIR] Add `and`, `or`, `xor`, `min`, `max` too gpu.all_reduce and the nvvm lowering"
Attribution to original author got lost.
2020-03-11 14:07:04 +01:00
Hanhan Wang c0f4408d76 [mlir] Create a std op instead of chain of ops.
Summary:
1-bit integer is tricky in different dialects sometimes. E.g., there is no
arithmetic instructions on 1-bit integer in SPIR-V, i.e., `spv.IMul %0, %1 : i1`
is not valid. Instead, `spv.LogicalAnd %0, %1 : i1` is valid. Creating the op
directly makes lowering easier because we don't need to match a complicated
pattern like `!(!lhs && !rhs)`. Also, this matches the semantic better.

Also add assertions on inputs.

Differential Revision: https://reviews.llvm.org/D75764
2020-03-10 15:01:44 -07:00
Stephan Herhut 2eff566b07 [MLIR] Add `and`, `or`, `xor`, `min`, `max` too gpu.all_reduce and the nvvm lowering
Summary:
This patch add some builtin operation for the gpu.all_reduce ops.
- for Integer only: `and`, `or`, `xor`
- for Float and Integer: `min`, `max`

This is useful for higher level dialect like OpenACC or OpenMP that can lower to the GPU dialect.

Differential Revision: https://reviews.llvm.org/D75766
2020-03-10 21:09:06 +01:00
Denis Khalikov 1090a83069 [mlir][vulkan-runner] Update mlir-vulkan-runner execution driver.
* Adds GpuLaunchFuncToVulkanLaunchFunc conversion pass.
* Moves a serialization of the `spirv::Module` from LaunchFuncToVulkanCalls pass to newly created pass.
* Updates LaunchFuncToVulkanCalls instrumentation pass, adds `initVulkan` and `deinitVulkan` runtime calls.
* Adds `bindResource` call to bind specifc resource by the given descriptor set and descriptor binding.
* Eliminates static construction and desctruction of `VulkanRuntimeManager`.

Differential Revision: https://reviews.llvm.org/D75192
2020-03-10 15:58:31 -04:00
River Riddle 153720a0a5 [mlir][NFC] Move the interfaces and traits for side effects out of IR/ to Interfaces/
Summary:
Interfaces/ is the designated directory for these types of interfaces, and also removes the need for including them directly in IR/.

Differential Revision: https://reviews.llvm.org/D75886
2020-03-10 12:45:45 -07:00
River Riddle 7ce1e7ab07 [mlir][NFC] Move the operation interfaces out of Analysis/ and into a new Interfaces/ directory.
The interfaces themselves aren't really analyses, they may be used by analyses though. Having them in Analysis can also create cyclic dependencies if an analysis depends on a specific dialect, that also provides one of the interfaces.

Differential Revision: https://reviews.llvm.org/D75867
2020-03-10 12:45:45 -07:00
Nicolas Vasilache 47ec8702cb [mlir][Linalg] Revisit 0-D abstraction
This revision takes advantage of the empty AffineMap to specify the
0-D edge case. This allows removing a bunch of annoying corner cases
that ended up impacting users of Linalg.

Differential Revision: https://reviews.llvm.org/D75831
2020-03-10 15:14:09 -04:00