Commit Graph

345659 Commits

Author SHA1 Message Date
Raphael Isemann 718d94187d Revert "[lldb] Fix string summary of an empty NSPathStore2"
This reverts commit 939ca455e7.

This failed on the debian bot for some reason:
  File "/home/worker/lldb-x86_64-debian/lldb-x86_64-debian/llvm-project/lldb/test/API/functionalities/data-formatter/data-formatter-stl/libstdcpp/string/TestDataFormatterStdString.py", line 67, in test_with_run_command
    "s summary wrong")
AssertionError: 'L"hello world! מזל טוב!\\0!\\0!!!!\\0\\0A\\0\\U0000fffd\\U0000fffd\\U0000fffd\\ [truncated]... != 'L"hello world! מזל טוב!"'
Diff is 2156 characters long. Set self.maxDiff to None to see it. : s summary wrong
2020-03-19 13:08:39 +01:00
Lucas Prates d4ad386ee1 [ARM] Fixing range checks for Neon's vqdmulhq_lane and vqrdmulhq_lane intrinsics
Summary:
The range checks performed for the vqrdmulh_lane and vqrdmulh_lane Neon
intrinsics were incorrectly using their return type as the base type for
the range check performed on their 'lane' argument.

This patch updates those intrisics to use the type of the proper reference
argument to perform the range checks.

Reviewers: jmolloy, t.p.northover, rsmith, olista01, dnsampaio

Reviewed By: dnsampaio

Subscribers: dnsampaio, kristof.beyls, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D74766
2020-03-19 12:08:12 +00:00
Lucas Prates f56550cf7f [ARM] Enabling range checks on Neon intrinsics' lane arguments
Summary:
Range checks were not properly performed in the lane arguments of Neon
intrinsics implemented based on splat operations. Calls to those
intrinsics where translated to `__builtin__shufflevector` calls directly
by the pre-processor through the arm_neon.h macros, missing the chance
for the proper range checks.

This patch enables the range check by introducing an auxiliary splat
instruction in arm_neon.td, delaying the translation to shufflevector
calls to CGBuiltin.cpp in clang after the checks were performed.

Reviewers: jmolloy, t.p.northover, rsmith, olista01, ostannard

Reviewed By: ostannard

Subscribers: ostannard, dnsampaio, danielkiss, kristof.beyls, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D74619
2020-03-19 12:07:23 +00:00
Lucas Prates d42711625a [ARM] Creating 'call_mangled' for Neon intrinsics definitions
Summary:
As multiple versions of the same Neon intrinsic can be created through
the same TableGen definition with the same argument types, the existing
`call` operator is not always able to properly perform overload
resolutions.

As these different intrinsic versions are differentiated later on by the
NeonEmitter through name mangling, this patch introduces a new
`call_mangled` operator to the TableGen definitions, which allows a call
for an otherwise ambiguous intrinsic by matching its mangled name with
the mangled variation of the caller.

Reviewers: jmolloy, t.p.northover, rsmith, olista01, dnsampaio

Reviewed By: dnsampaio

Subscribers: dnsampaio, kristof.beyls, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D74618
2020-03-19 12:05:55 +00:00
Lucas Prates dade859b58 [ARM] Setting missing isLaneQ attribute on Neon Intrisics definitions
Summary:
Some of the `*_laneq` intrinsics defined in arm_neon.td were missing the
setting of the `isLaneQ` attribute. This patch sets the attribute on the
related definitions, as they will be required to properly perform range
checks on their lane arguments.

Reviewers: jmolloy, t.p.northover, rsmith, olista01, dnsampaio

Reviewed By: dnsampaio

Subscribers: dnsampaio, kristof.beyls, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D74616
2020-03-19 12:04:14 +00:00
Lucas Prates 7bf23563f4 Revert "[ARM] Setting missing isLaneQ attribute on Neon Intrisics definitions"
This reverts commit 62ab15ffa3.

Multiple commits were unintentionally squashed into this one. Reverting
so each of them can be pushed properly.
2020-03-19 12:01:13 +00:00
Lucas Prates 62ab15ffa3 [ARM] Setting missing isLaneQ attribute on Neon Intrisics definitions
Summary:
Some of the `*_laneq` intrinsics defined in arm_neon.td were missing the
setting of the `isLaneQ` attribute. This patch sets the attribute on the
related definitions, as they will be required to properly perform range
checks on their lane arguments.

Reviewers: jmolloy, t.p.northover, rsmith, olista01, dnsampaio

Reviewed By: dnsampaio

Subscribers: dnsampaio, kristof.beyls, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D74616
2020-03-19 11:52:41 +00:00
Simon Pilgrim 7ce7f78963 [InstSimplify] Add missing vector ADD+SUB tests to show lack of DemandedElts support 2020-03-19 11:27:27 +00:00
Simon Pilgrim d259e31a17 [InstSimplify] Add missing vector MUL tests to show lack of DemandedElts support 2020-03-19 11:27:27 +00:00
Raphael Isemann 939ca455e7 [lldb] Fix string summary of an empty NSPathStore2
Summary:
Printing a summary for an empty NSPathStore2 string currently prints random bytes behind the empty string pointer from memory (rdar://55575888).

It seems the reason for this is that the SourceSize parameter in the `ReadStringAndDumpToStreamOptions` - which is supposed to contain the string
length - actually uses the length 0 as a magic value for saying "read as much as possible from the buffer" which is clearly wrong for empty strings.

This patch adds another flag that indicates if we have know the string length or not and makes this behaviour dependent on that (which seemingly
was the original purpose of this magic value).

Reviewers: aprantl, JDevlieghere, shafik

Reviewed By: aprantl

Subscribers: christof, abidh, lldb-commits

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D68010
2020-03-19 12:20:35 +01:00
Cullen Rhodes 5ce38fcbac [ValueTypes] Add support for scalable EVTs
Summary:
* Remove a bunch of asserts checking for unsupported scalable types and
  add some more now that they are supported.
* Propagate the scalable flag where necessary.
* Add another `EVT::getExtendedVectorVT` method that takes an
  ElementCount parameter.
* Add `EVT::isExtendedScalableVector` and
  `EVT::getExtendedVectorElementCount` - latter is currently unused.

Reviewers: sdesmalen, efriedma, rengolin, craig.topper, huntergr

Reviewed By: efriedma

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D75672
2020-03-19 11:04:15 +00:00
Georgii Rymar e26e9ba288 [obj2yaml] - Stop dumping an empty sh_info field for SHT_RELA/SHT_REL sections.
`.rela.dyn` is a dynamic relocation section that normally has
no value in `sh_info` field.

The existent `elf-reladyn-section-shinfo.yaml` which tests this piece has issues:

1) It does not check the case when we have more than one `SHT_REL[A]`
   section with `sh_info == 0` in the object. Because of this it did not catch the issue.
   Currently we print an excessive "Info" field:

```
  - Name:            .rela.dyn
    Type:            SHT_RELA
    EntSize:         0x0000000000000018
  - Name:            .rel.dyn
    Type:            SHT_REL
    EntSize:         0x0000000000000010
    Info:            ' [1]'
```

2) It seems can be more generic. I've added a `rel-rela-section.yaml` instead.

Differential revision: https://reviews.llvm.org/D76281
2020-03-19 14:00:21 +03:00
Adrian Kuegel 4a7f2032a3 Revert "CFGDiff: Simplify/common the begin/end implementations to use a common range helper"
This reverts commit 79a7ed92a9.
This breaks the asan buildbot.
2020-03-19 11:25:10 +01:00
Cullen Rhodes 5c296df0c0 [ValueTypes] Add EVT::isFixedLengthVector
Summary:
Related to D75672, this patch adds EVT::isFixedLengthVector to determine
if the underlying vector type is of fixed length.

An assert is introduced in EVT::getVectorNumElements that triggers for
types that aren't fixed length. This is currently guarded by a flag
added D75297 that is off by default and has been renamed to the more
generic ENABLE_STRICT_FIXED_SIZE_VECTORS.

Ideally we want to get rid of getVectorNumElements but a quick grep
shows there are >350 uses in lib/CodeGen and 75 in lib/Target/AArch64
alone. All of these probably aren't EVT::getVectorNumElements (some may
be the MVT equivalent), but there are many places to fixup and having
the assert on by default would make the SVE upstreaming effort
difficult.

Reviewers: sdesmalen, efriedma, ctetreau, huntergr, rengolin

Reviewed By: efriedma

Subscribers: mgorny, kristof.beyls, hiraditya, danielkiss, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76376
2020-03-19 10:08:17 +00:00
Uday Bondhugula 6e0aaafbc7 [MLIR][NFC] fix RankedTensorType doc comment
Ranked tensor types can have shape dimension size 0

Signed-off-by: Uday Bondhugula <uday@polymagelabs.com>

Differential Revision: https://reviews.llvm.org/D76405
2020-03-19 15:32:13 +05:30
LLVM GN Syncbot 1d5560c363 [gn build] Port 733b319948 2020-03-19 09:52:27 +00:00
Simon Moll 733b319948 [VP,Integer,#1] Vector-predicated integer intrinsics
Summary:
This patch adds IR intrinsics for vector-predicated integer arithmetic.

It is subpatch #1 of the [integer
slice](https://reviews.llvm.org/D57504#1732277) of
[LLVM-VP](https://reviews.llvm.org/D57504).  LLVM-VP is a larger effort to bring
native vector predication to LLVM.

Reviewed By: andrew.w.kaylor

Differential Revision: https://reviews.llvm.org/D69891
2020-03-19 10:51:47 +01:00
Georgii Rymar bb7d2b1780 [LLD][ELF] - Disambiguate "=fillexp" with a primary expression to allow =0x90 /DISCARD/
Fixes https://bugs.llvm.org/show_bug.cgi?id=44903

It is about the following case:

```
SECTIONS {
  .foo : { *(.foo) } =0x90909090
  /DISCARD/ : { *(.bar) }
}
```

Here while parsing the fill expression we treated the
"/" of "/DISCARD/" as operator.

With this change, suggested by Fangrui Song, we do
not allow expressions with operators (e.g. "0x1100 + 0x22")
that are not wrapped into round brackets. It should not
be an issue for users, but helps to resolve parsing ambiguity.

Differential revision: https://reviews.llvm.org/D74687
2020-03-19 12:49:25 +03:00
Sander de Smalen 981f0802b3 [SVE] Generate overloaded functions for ACLE intrinsics.
The SVE ACLE allows using a short-form for the intrinsics, e.g.
the following two declarations generate the same code:

  svuint32_t svld1(svbool_t, uint32_t const *);
  svuint32_t svld1_u32(svbool_t, uint32_t const *);

using the attribute:
  __clang_arm_builtin_alias

so that any call to svld1(svbool_t, uint32_t const *) will
map to __builtin_sve_svld1_u32.

Reviewers: SjoerdMeijer, miyuki, efriedma, simon_tatham, rengolin

Reviewed By: SjoerdMeijer

Tags: #clang

Differential Revision: https://reviews.llvm.org/D75861
2020-03-19 09:36:23 +00:00
Florian Hahn 8a36594a7e [SCCP] Use constant ranges for binary operators.
If one of the operands of a binary operator is a constant range, we can
use ConstantRange::binaryOp to approximate the result.

We still handle single element constant ranges as we did previously,
with ConstantExpr::get(), because ConstantRange::binaryOp still gives
worse results in a few cases for single element ranges.

Also note that we bail out early if any of the operands is still unknown.

Reviewers: davide, efriedma, mssimpso

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D71936
2020-03-19 09:35:48 +00:00
Chen Zheng d8fcdcdf68 [Reassociate] add testcases for more than 1 pairs - NFC 2020-03-19 05:21:24 -04:00
Alex Zinenko bc18624b40 [mlir] vector.type_cast: disallow memrefs with layout in verifier
Summary:
These are not supported by any of the code using `type_cast`. In the general
case, such casting would require memrefs to handle a non-contiguous vector
representation or misaligned vectors (e.g., if the offset of the source memref
is not divisible by vector size, since offset in the target memref is expressed
in the number of elements).

Differential Revision: https://reviews.llvm.org/D76349
2020-03-19 10:15:41 +01:00
Haojian Wu 4b0f1e12c2 [AST] Add a flag indicating if any subexpression had errors
The only subexpression that is considered an error now is TypoExpr, but
we plan to add expressions with errors to improve editor tooling on broken
code. We intend to use the same mechanism to guard against spurious
diagnostics on those as well.

See the follow-up revision for an actual usage of the flag.

Original patch from Ilya.

Reviewers: sammccall

Reviewed By: sammccall

Tags: #clang

Differential Revision: https://reviews.llvm.org/D65591
2020-03-19 08:56:10 +01:00
Jason Molenda 5d881dd8a8 Update so debugserver can be built on macos again with xcodebuild. 2020-03-18 21:46:20 -07:00
Yaxun (Sam) Liu e778db6d72 recommit b58f6bb120
Add a test for UsedDeclVisitor

This test is reduced from mlir/lib/Transforms/AffineDataCopyGeneration.cpp
to make sure there is no assertion due to UsedDeclVisitor.
2020-03-19 00:26:38 -04:00
River Riddle 2c1ba63ede [mlir] Change missed usage PatternMatchResult to LogicalResult 2020-03-18 21:22:24 -07:00
Chen Zheng 3f85134d71 [PowerPC] implement target hook isProfitableToHoist
On Powerpc fma is faster than fadd + fmul for some types,
(PPCTargetLowering::isFMAFasterThanFMulAndFAdd). we should implement target
hook isProfitableToHoist to prevent simplifyCFGpass from breaking fma
pattern by hoisting fmul to predecessor block.

Reviewed By: nemanjai

Differential Revision: https://reviews.llvm.org/D76207
2020-03-19 00:17:25 -04:00
Yaxun (Sam) Liu f528df8e26 Revert "Add a test for UsedDeclVisitor"
This reverts commit b58f6bb120.
2020-03-19 00:15:47 -04:00
Yaxun (Sam) Liu b58f6bb120 Add a test for UsedDeclVisitor
This test is reduced from mlir/lib/Transforms/AffineDataCopyGeneration.cpp
to make sure there is no assertion due to UsedDeclVisitor.
2020-03-19 00:05:10 -04:00
Huihui Zhang 2ea5495759 [InstCombine][SVE] Fix InstCombiner::visitAllocaInst for scalable vector.
Summary:
DataLayout::getTypeAllocSize() return TypeSize. For cases where scalable
property doesn't matter (check for zero-sized alloca), we should explicitly
call getKnownMinSize() to avoid implicit type conversion to uint64_t, which is
invalid for scalable vector type.

Reviewers: sdesmalen, efriedma, spatel, apazos

Reviewed By: efriedma

Subscribers: tschuett, hiraditya, rkruppe, psnobl, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76386
2020-03-18 20:57:14 -07:00
David Blaikie 79a7ed92a9 CFGDiff: Simplify/common the begin/end implementations to use a common range helper
(would be nice to revisit the CFG traits and change them to use ranges
rather than begin/end - if anyone wants to do that refactor)

Also use more auto because writing the names of range utilty iterators
isn't helping readability here - they're sort of implementation details
for the most part, especially once you nest a few different filtering
and adapting iterators.
2020-03-18 20:56:11 -07:00
Fred Riss 59918d3793 [lldb/testsuite] Make TestObjCIvarStripped.py working with codesigning
This test was stripping a binary generated by Makefile.rules which is
potentially codesigned. Stripping invalidates the code signature, so
we might need to re-sign after stripping.
2020-03-18 20:52:28 -07:00
Fred Riss acd641c19d [lldb/testsuite] Slightly rework TestHiddenIvars.py
The test was stripping the binaries from the Python
code. Unfortunately, if running on darwin embedded in a context that
requires code signing, the stripping was invalidating the signature,
thus breaking the test.

This patch moves the stripping to the Makefile and resigns the
stripped binaries if required.
2020-03-18 20:52:28 -07:00
Fred Riss 71db787c45 [lldb/testsuite] Rewrite TestThreadLocal.py
It was an inline test before. Clang stopped emitting line information
for the TLS initialization and the inline test didn't have a way to
break before it anymore.

This rewrites the test as a full-fldeged python test and improves the
checking of the error case to verify that the failure we are looking
for is related to the TLS setup not being complete.
2020-03-18 20:52:28 -07:00
Fred Riss 127b9d9d77 [lldb/testsuite] Apply @skipIfDarwinEmbedded to part of TestHWBreakMultiThread
The comment in the test wrongfully claimed that we support hardware
breakpoints on darwin for arm64, but we never did.
2020-03-18 20:52:28 -07:00
Fred Riss c182be211a [lldb/testsuite] Tweak TestBreakpointLocations.py to pass for arm64
The test checks that we correctly set the right number of breakpoints
when breaking into an `always_inline` function. The line of this
funstion selected for this test was the return statement, but with
recent compiler, this return statement doesn't necessarily exist after
inlining, even at O0.

Switch the breakpoint to a different line of the inline function.
2020-03-18 20:52:28 -07:00
Fred Riss 52b2bae777 [lldb/testsuite] Skip TestEmptyStdModule.py if using a remote platform
The test runs `platform select host`, so it make no sense to run it
when remote debugging.
2020-03-18 20:52:28 -07:00
Chen Zheng aacf022cd5 [PowerPC] add IR level isFMAFasterThanFMulAndFAdd - NFC
And also refactor legacy MIR level isFMAFasterThanFMulAndFAdd.

Reviewed By: steven.zhang

Differential Revision: https://reviews.llvm.org/D76265
2020-03-18 23:24:40 -04:00
Rob Suderman cd1212deff [mlir] Introduced CallOp Dialect Conversion
Summary:
Utility to perform CallOp Dialect conversion, specifically handling cases where
an argument type has changed and the corresponding CallOp needs to be updated.

Differential Revision: https://reviews.llvm.org/D76326
2020-03-18 20:07:38 -07:00
Geoffrey Martin-Noble b72e13c242 [MLIR] Deduplicate dialect registration by ClassID
Summary:
With the move towards dialect registration that does not depend only use
static initialization, we are running into more cases where the dialects
are registered by different methods. For example, TensorFlow still uses
static initialization to register all MLIR core dialects, which prevents
explicit registration of any of them when linking it in. We ran into this
issue in https://github.com/google/iree/pull/982.

To address potential issues with conflicts from non-standard
allocators passed to registerDialectAllocator, made this method
private. Now all dialects can only be registered with their
constructor.

Similarly deduplicates DialectHooks for consistency and makes their
registration follow the same pattern.

Differential Revision: https://reviews.llvm.org/D76329
2020-03-18 19:52:27 -07:00
Davide Italiano f0ca0a2538 [AppleObjCRuntimeV2] Rewrite GetClassDescriptor, reducing indentation.
I'm going to modify this function to account for lazily allocated
class names in the Obj-C runtime, but first I need to understand
what it does.
2020-03-18 19:23:58 -07:00
Yaxun (Sam) Liu 62201763c5 Fix crash in check-mlir due to 08ab8c9af4 2020-03-18 21:50:00 -04:00
Lei Zhang 73431a492b [mlir][spirv] Consolidate std.constant to spv.constant conversions
This commit merges the DRR pattern for std.constant to spv.constant
conversion into the C++ OpConversionPattern. This allows us to have
remove the DRR pattern file. Along the way, this commit enhanced
std.constant to spv.constant conversion to consider type conversions,
which means converting the underlying attributes if necessary.

Differential Revision: https://reviews.llvm.org/D76246
2020-03-18 20:11:05 -04:00
Lei Zhang ffd4583c6a [mlir][spirv] Change standard op patterns to consider type conversion
Previously we have a few patterns that were written with DRR. DRR
at the moment does not work nicely with dialect conversion framework.
It generates normal RewritePatterns, while the dialect conversion
framework requires ConversionPatterns to take into consideration
the type conversion. So this commit starts to change existing DRR
patterns for standard ops to OpConversionPattern to incorporate the
SPIR-V type conversion. All patterns are converted except the one
for constant ops, which will happen in a subsequent commit.

Differential Revision: https://reviews.llvm.org/D76245
2020-03-18 20:11:05 -04:00
Lei Zhang 9efb4b4023 [mlir][spirv] Make SPIRVTypeConverter target environment aware
Non-32-bit scalar types requires special hardware support that may
not exist on all Vulkan-capable GPUs. This is reflected as non-32-bit
scalar types require special capabilities or extensions to be used.
This commit makes SPIRVTypeConverter target environment aware so
that it can properly convert standard types to what is accepted on
the target environment.

Right now if a scalar type bitwidth is not supported in the target
environment, we use 32-bit unconditionally. This requires Vulkan
runtime to also feed in data with a matched bitwidth and layout,
especially for interface types. The Vulkan runtime can do that by
inspecting the SPIR-V module. Longer term, we might want to introduce
a way to control how such case are handled and explicitly fail
if wanted.

Differential Revision: https://reviews.llvm.org/D76244
2020-03-18 20:11:05 -04:00
Lei Zhang f741b8eabe [mlir][spirv] Move type checks from dialect class to type hierarchy
Types should be checked with the type hierarchy. This should result in
better responsibility division and API surface.

Differential Revision: https://reviews.llvm.org/D76243
2020-03-18 20:11:05 -04:00
Lei Zhang 58df5e6d9a [mlir][spirv] Plumbing target environment into type converter
This commit unifies target environment queries into a new wrapper
class spirv::TargetEnv and shares across various places needing
the functionality. We still create multiple instances of TargetEnv
though given the parent components (type converters, passes,
conversion targets) have different lifetimes.

In the meantime, LowerABIAttributesPass is updated to take into
consideration the target environment, which requires updates to
tests to provide that.

Differential Revision: https://reviews.llvm.org/D76242
2020-03-18 20:11:05 -04:00
Lei Zhang 67e8690e53 [mlir][spirv] Let SPIRVConversionTarget consider type availability
Previously we only consider the version/extension/capability requirement
on the op itself. This commit updates SPIRVConversionTarget to also
take into consideration the values' types when deciding op legality.

Differential Revision: https://reviews.llvm.org/D75876
2020-03-18 20:11:04 -04:00
Lei Zhang 3b35f9d8b5 [mlir][spirv] Use memref memory space for storage class
Previously in SPIRVTypeConverter, we always convert memref types
to StorageBuffer regardless of their memory spaces. This commit
fixes that to let the conversion to look into memory space
properly. For this purpose, a mapping between SPIR-V storage class
and memref memory space is introduced. The mapping is arbitary
decided at the moment and the hope is that we can leverage
string memory space later to be more clear.

Now spv.interface_var_abi cannot contain storage class unless it's
attached to a scalar value, where we need the storage class as side
channel information. Verifications and tests are properly adjusted.

Differential Revision: https://reviews.llvm.org/D76241
2020-03-18 20:11:04 -04:00
Craig Topper c69a4d6bef [SelectionDAG] When splitting gathers/scatters in type legalization, set MMO size to UnknownSize
Gather/scatter don't access one memory location, they access multiple disjoint locations. So using a fixed size isn't accurate. But we don't have a way to represent the true behavior so just use UnknownSize.

Previously we "split" the memory VT and use that size for the MMO of each half. But the memory VT is scalar so splitting usually just returned the original scalar VT, but on 32-bit X86 if the scalar VT was i64 it probably returned i32?

Differential Revision: https://reviews.llvm.org/D76388
2020-03-18 16:07:15 -07:00