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19585 Commits

Author SHA1 Message Date
Nate Begeman 70d9c5c340 Add a testcase for load short -> uint, which is currently emitted as a 
zextload + sign_extend_inreg rather than a sextload.

llvm-svn: 22852
 2005-08-18 03:11:44 +00:00
Nate Begeman 4bfb4a215d Add a bunch more simple nodes. 
llvm-svn: 22851
 2005-08-18 03:04:18 +00:00
Nate Begeman 457367f14c Add a couple more nodes that are easy to handle 
llvm-svn: 22850
 2005-08-18 00:53:47 +00:00
Nate Begeman 74d5529b88 Be fruitful and multiply! 
llvm-svn: 22849
 2005-08-18 00:21:41 +00:00
Jim Laskey 04160c6d8d Better version of isIntImmediate. 
llvm-svn: 22848
 2005-08-18 00:15:15 +00:00
Jim Laskey 2a1f2df82a messed up 
llvm-svn: 22847
 2005-08-17 23:57:24 +00:00
Jim Laskey 5e56202916 include/llvm/Support/MathExtras.h 
llvm-svn: 22846
 2005-08-17 23:54:12 +00:00
Nate Begeman 3fcf47d8f0 Teach the DAG->DAG ISel about FNEG, and how it can be used to invert 
several of the PowerPC opcodes that come in both negated and non-negated
forms.

llvm-svn: 22845
 2005-08-17 23:46:35 +00:00
Nate Begeman cc0132b2dc Add two new methods isTargetOpcode() which returns true if the node type 
is greater than the range of building selection dag node types, and
getTargetOpcode(), which returns the node opcode less the value of
isd::builtin_op_end, which specifies the end of the builtin types.

llvm-svn: 22844
 2005-08-17 23:44:54 +00:00
Chris Lattner ea7dfd53d6 Fix Transforms/LoopStrengthReduce/2005-08-17-OutOfLoopVariant.ll, a crash 
on 177.mesa

llvm-svn: 22843
 2005-08-17 21:22:41 +00:00
Chris Lattner 9b2efaf9c8 new testcase distilled from mesa 
llvm-svn: 22842
 2005-08-17 21:21:47 +00:00
Jim Laskey d66e616545 Move the code dependency for MathExtras.h from SelectionDAGNodes.h. 
Added some class dividers in SelectionDAG.cpp.

llvm-svn: 22841
 2005-08-17 20:08:02 +00:00
Jim Laskey 8ad8f71447 Move code dependency for MathExtras.h out of Constants.h. 
llvm-svn: 22840
 2005-08-17 20:06:22 +00:00
Jim Laskey 17e7599ecb Promote dependency for MathExtras.h out of Constants.h. 
llvm-svn: 22839
 2005-08-17 20:04:34 +00:00
Jim Laskey b74c666186 Culling out use of unions for converting FP to bits and vice versa. 
llvm-svn: 22838
 2005-08-17 19:34:49 +00:00
Chris Lattner c6aa80668e add a beta option for turning on dag->dag isel 
llvm-svn: 22837
 2005-08-17 19:33:30 +00:00
Chris Lattner 43ff01e2e6 initial hack at a dag->dag instruction selector. This is obviously woefully 
incomplete, but it is a start.  It handles basic argument/retval stuff, immediates,
add and sub.

llvm-svn: 22836
 2005-08-17 19:33:03 +00:00
Chris Lattner f61cce952b add prototype, remove dead proto 
llvm-svn: 22835
 2005-08-17 19:32:03 +00:00
Chris Lattner ab0de9d7fc Fix a bug in RemoveDeadNodes where it would crash when its "optional" 
argument is not specified.

Implement ReplaceAllUsesWith.

llvm-svn: 22834
 2005-08-17 19:00:20 +00:00
Chris Lattner 1c911aea08 add ReplaceAllUsesWith, and a helper to implemented it 
llvm-svn: 22833
 2005-08-17 18:59:17 +00:00
Chris Lattner 06d63f429f Make removeUser more efficient, add a matching addUser. 
Fix the setOperands methods I added to update use/def information correctly.

llvm-svn: 22832
 2005-08-17 18:58:38 +00:00
Jim Laskey 686d6a1cb2 Switched to using BitsToDouble for int_to_float to avoid aliasing problem. 
llvm-svn: 22831
 2005-08-17 17:42:52 +00:00
Jim Laskey adc9c0c559 Added support for converting raw bits to FP, and FP to raw bits. The intent 
is to avoid the distraction of the union declarations.

llvm-svn: 22830
 2005-08-17 17:27:47 +00:00
Chris Lattner 33900811ee Fix some bugs in the alpha backend, some of which I introduced yesterday, 
and some that were preexisting.  All alpha regtests pass now.

llvm-svn: 22829
 2005-08-17 17:08:24 +00:00
Jim Laskey 898ba557d0 Change hex float constants for the sake of VC++. 
llvm-svn: 22828
 2005-08-17 09:44:59 +00:00
Chris Lattner 0381c73c4d This was moved to the .cpp file 
llvm-svn: 22827
 2005-08-17 06:46:50 +00:00
Chris Lattner c9950c11a9 Add a new beta option for critical edge splitting, to avoid a problem that 
Nate noticed in yacr2 (and I know occurs in other places as well).

This is still rough, as the critical edge blocks are not intelligently placed
but is added to get some idea to see if this improves performance.

llvm-svn: 22825
 2005-08-17 06:37:43 +00:00
Chris Lattner 2bf7cb5213 Use a new helper to split critical edges, making the code simpler. 
Do not claim to not change the CFG.  We do change the cfg to split critical
edges.  This isn't causing us a problem now, but could likely do so in the
future.

llvm-svn: 22824
 2005-08-17 06:35:16 +00:00
Chris Lattner 79f8b62607 add a helper 
llvm-svn: 22823
 2005-08-17 06:34:37 +00:00
Chris Lattner ba28c2733f Fix a regression on X86, where FP values can be promoted too. 
llvm-svn: 22822
 2005-08-17 06:06:25 +00:00
Misha Brukman 5fbf58a7b0 Fix grammar 
llvm-svn: 22821
 2005-08-17 02:38:56 +00:00
Chris Lattner 40f909ad04 make sure to remove a node from the use list of its operands when we replace 
it.

llvm-svn: 22820
 2005-08-17 01:54:00 +00:00
Chris Lattner 63f774ec6e Fix a few small typos I noticed when converting this over to the DAG->DAG 
selector.  Also, there is no difference between addSImm and addImm, so just
use addImm, folding some branches.

llvm-svn: 22819
 2005-08-17 01:25:14 +00:00
Jim Laskey 9828f26cf1 Removed UINT_TO_FP and SINT_TO_FP from ISel outright. 
llvm-svn: 22818
 2005-08-17 01:14:38 +00:00
Andrew Lenharth 73370ba5fd thinko. Should fix s4addl.ll regression 
llvm-svn: 22817
 2005-08-17 00:47:24 +00:00
Jim Laskey 5909c8b10a Remove ISel code generation for UINT_TO_FP and SINT_TO_FP. Now asserts if 
marked as legal.

llvm-svn: 22816
 2005-08-17 00:41:40 +00:00
Jim Laskey 6267b2c97c Make UINT_TO_FP and SINT_TO_FP use generic expansion. 
llvm-svn: 22815
 2005-08-17 00:40:22 +00:00
Jim Laskey f2516a9180 Added generic code expansion for [signed|unsigned] i32 to [f32|f64] casts in the 
legalizer.  PowerPC now uses this expansion instead of ISel version.

Example:

// signed integer to double conversion
double f1(signed x) {
  return (double)x;
}

// unsigned integer to double conversion
double f2(unsigned x) {
  return (double)x;
}

// signed integer to float conversion
float f3(signed x) {
  return (float)x;
}

// unsigned integer to float conversion
float f4(unsigned x) {
  return (float)x;
}


Byte Code:

internal fastcc double %_Z2f1i(int %x) {
entry:
        %tmp.1 = cast int %x to double          ; <double> [#uses=1]
        ret double %tmp.1
}

internal fastcc double %_Z2f2j(uint %x) {
entry:
        %tmp.1 = cast uint %x to double         ; <double> [#uses=1]
        ret double %tmp.1
}

internal fastcc float %_Z2f3i(int %x) {
entry:
        %tmp.1 = cast int %x to float           ; <float> [#uses=1]
        ret float %tmp.1
}

internal fastcc float %_Z2f4j(uint %x) {
entry:
        %tmp.1 = cast uint %x to float          ; <float> [#uses=1]
        ret float %tmp.1
}

internal fastcc double %_Z2g1i(int %x) {
entry:
        %buffer = alloca [2 x uint]             ; <[2 x uint]*> [#uses=3]
        %tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0                ; <uint*> [#uses=1]
        store uint 1127219200, uint* %tmp.0
        %tmp.2 = cast int %x to uint            ; <uint> [#uses=1]
        %tmp.3 = xor uint %tmp.2, 2147483648            ; <uint> [#uses=1]
        %tmp.5 = getelementptr [2 x uint]* %buffer, int 0, int 1                ; <uint*> [#uses=1]
        store uint %tmp.3, uint* %tmp.5
        %tmp.9 = cast [2 x uint]* %buffer to double*            ; <double*> [#uses=1]
        %tmp.10 = load double* %tmp.9           ; <double> [#uses=1]
        %tmp.13 = load double* cast (long* %signed_bias to double*)             ; <double> [#uses=1]
        %tmp.14 = sub double %tmp.10, %tmp.13           ; <double> [#uses=1]
        ret double %tmp.14
}

internal fastcc double %_Z2g2j(uint %x) {
entry:
        %buffer = alloca [2 x uint]             ; <[2 x uint]*> [#uses=3]
        %tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0                ; <uint*> [#uses=1]
        store uint 1127219200, uint* %tmp.0
        %tmp.1 = getelementptr [2 x uint]* %buffer, int 0, int 1                ; <uint*> [#uses=1]
        store uint %x, uint* %tmp.1
        %tmp.4 = cast [2 x uint]* %buffer to double*            ; <double*> [#uses=1]
        %tmp.5 = load double* %tmp.4            ; <double> [#uses=1]
        %tmp.8 = load double* cast (long* %unsigned_bias to double*)            ; <double> [#uses=1]
        %tmp.9 = sub double %tmp.5, %tmp.8              ; <double> [#uses=1]
        ret double %tmp.9
}

internal fastcc float %_Z2g3i(int %x) {
entry:
        %buffer = alloca [2 x uint]             ; <[2 x uint]*> [#uses=3]
        %tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0                ; <uint*> [#uses=1]
        store uint 1127219200, uint* %tmp.0
        %tmp.2 = cast int %x to uint            ; <uint> [#uses=1]
        %tmp.3 = xor uint %tmp.2, 2147483648            ; <uint> [#uses=1]
        %tmp.5 = getelementptr [2 x uint]* %buffer, int 0, int 1                ; <uint*> [#uses=1]
        store uint %tmp.3, uint* %tmp.5
        %tmp.9 = cast [2 x uint]* %buffer to double*            ; <double*> [#uses=1]
        %tmp.10 = load double* %tmp.9           ; <double> [#uses=1]
        %tmp.13 = load double* cast (long* %signed_bias to double*)             ; <double> [#uses=1]
        %tmp.14 = sub double %tmp.10, %tmp.13           ; <double> [#uses=1]
        %tmp.16 = cast double %tmp.14 to float          ; <float> [#uses=1]
        ret float %tmp.16
}

internal fastcc float %_Z2g4j(uint %x) {
entry:
        %buffer = alloca [2 x uint]             ; <[2 x uint]*> [#uses=3]
        %tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0                ; <uint*> [#uses=1]
        store uint 1127219200, uint* %tmp.0
        %tmp.1 = getelementptr [2 x uint]* %buffer, int 0, int 1                ; <uint*> [#uses=1]
        store uint %x, uint* %tmp.1
        %tmp.4 = cast [2 x uint]* %buffer to double*            ; <double*> [#uses=1]
        %tmp.5 = load double* %tmp.4            ; <double> [#uses=1]
        %tmp.8 = load double* cast (long* %unsigned_bias to double*)            ; <double> [#uses=1]
        %tmp.9 = sub double %tmp.5, %tmp.8              ; <double> [#uses=1]
        %tmp.11 = cast double %tmp.9 to float           ; <float> [#uses=1]
        ret float %tmp.11
}


PowerPC Code:

        .machine ppc970


        .const
        .align  2
.CPIl1__Z2f1i_0:                                        ; float 0x4330000080000000
        .long   1501560836      ; float 4.5036e+15
        .text
        .align  2
        .globl  l1__Z2f1i
l1__Z2f1i:
.LBBl1__Z2f1i_0:        ; entry
        xoris r2, r3, 32768
        stw r2, -4(r1)
        lis r2, 17200
        stw r2, -8(r1)
        lfd f0, -8(r1)
        lis r2, ha16(.CPIl1__Z2f1i_0)
        lfs f1, lo16(.CPIl1__Z2f1i_0)(r2)
        fsub f1, f0, f1
        blr


        .const
        .align  2
.CPIl2__Z2f2j_0:                                        ; float 0x4330000000000000
        .long   1501560832      ; float 4.5036e+15
        .text
        .align  2
        .globl  l2__Z2f2j
l2__Z2f2j:
.LBBl2__Z2f2j_0:        ; entry
        stw r3, -4(r1)
        lis r2, 17200
        stw r2, -8(r1)
        lfd f0, -8(r1)
        lis r2, ha16(.CPIl2__Z2f2j_0)
        lfs f1, lo16(.CPIl2__Z2f2j_0)(r2)
        fsub f1, f0, f1
        blr


        .const
        .align  2
.CPIl3__Z2f3i_0:                                        ; float 0x4330000080000000
        .long   1501560836      ; float 4.5036e+15
        .text
        .align  2
        .globl  l3__Z2f3i
l3__Z2f3i:
.LBBl3__Z2f3i_0:        ; entry
        xoris r2, r3, 32768
        stw r2, -4(r1)
        lis r2, 17200
        stw r2, -8(r1)
        lfd f0, -8(r1)
        lis r2, ha16(.CPIl3__Z2f3i_0)
        lfs f1, lo16(.CPIl3__Z2f3i_0)(r2)
        fsub f0, f0, f1
        frsp f1, f0
        blr


        .const
        .align  2
.CPIl4__Z2f4j_0:                                        ; float 0x4330000000000000
        .long   1501560832      ; float 4.5036e+15
        .text
        .align  2
        .globl  l4__Z2f4j
l4__Z2f4j:
.LBBl4__Z2f4j_0:        ; entry
        stw r3, -4(r1)
        lis r2, 17200
        stw r2, -8(r1)
        lfd f0, -8(r1)
        lis r2, ha16(.CPIl4__Z2f4j_0)
        lfs f1, lo16(.CPIl4__Z2f4j_0)(r2)
        fsub f0, f0, f1
        frsp f1, f0
        blr

llvm-svn: 22814
 2005-08-17 00:39:29 +00:00
Chris Lattner 0d2456e1f0 add a new TargetConstant node 
llvm-svn: 22813
 2005-08-17 00:34:06 +00:00
Chris Lattner 12214cf577 add some helper methods, and a new TargetConstant node, which is not 
subjected to folding.

llvm-svn: 22812
 2005-08-17 00:33:30 +00:00
Nate Begeman 784c8068a7 Implement a couple improvements: 
Remove dead code in ISD::Constant handling
Add support for add long, imm16

We now codegen 'long long foo(long long a) { return ++a; }'
as:
addic r4, r4, 1
addze r3, r3
blr

instead of:
li r2, 1
li r5, 0
addc r2, r4, r2
adde r3, r3, r5
blr

llvm-svn: 22811
 2005-08-17 00:20:08 +00:00
Chris Lattner 2111aae8c1 remove a dead enum value, making a comment above correct again 
llvm-svn: 22810
 2005-08-16 22:04:58 +00:00
Chris Lattner 5a1d5e30e2 This is a dummy, it doesn't matter what the ValueType is 
llvm-svn: 22809
 2005-08-16 21:59:52 +00:00
Chris Lattner 79f5ebc7b9 updates for changes in nodes 
llvm-svn: 22808
 2005-08-16 21:58:15 +00:00
Chris Lattner 7c76278242 update the backends to work with the new CopyFromReg/CopyToReg/ImplicitDef nodes 
llvm-svn: 22807
 2005-08-16 21:56:37 +00:00
Chris Lattner 33182325f5 Eliminate the RegSDNode class, which 3 nodes (CopyFromReg/CopyToReg/ImplicitDef) 
used to tack a register number onto the node.

Instead of doing this, make a new node, RegisterSDNode, which is a leaf
containing a register number.  These three operations just become normal
DAG nodes now, instead of requiring special handling.

Note that with this change, it is no longer correct to make illegal
CopyFromReg/CopyToReg nodes.  The legalizer will not touch them, and this
is bad, so don't do it. :)

llvm-svn: 22806
 2005-08-16 21:55:35 +00:00
Nate Begeman 371e49515d Implement BR_CC and BRTWOWAY_CC. This allows the removal of a rather nasty 
fixme from the PowerPC backend.  Emit slightly better code for legalizing
select_cc.

llvm-svn: 22805
 2005-08-16 19:49:35 +00:00
Chris Lattner bc89226527 Allow passing a dag into dump and getOperationName. If one is available 
when printing a node, use it to render target operations with their
target instruction name instead of "<<unknown>>".

llvm-svn: 22804
 2005-08-16 18:33:07 +00:00
Chris Lattner 577af48731 allow passing a dag into getOperationName and dump 
llvm-svn: 22803
 2005-08-16 18:32:18 +00:00
Chris Lattner 7e57d18b79 Use a extant helper to do this. 
llvm-svn: 22802
 2005-08-16 18:31:23 +00:00