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1349 Commits

Author SHA1 Message Date
Reid Spencer 2230144a75 Make an assert comment match the tested assertion. 
llvm-svn: 31686
 2006-11-11 20:07:59 +00:00
Evan Cheng 979bbf48d5 Add methods to add implicit def use operands to a MI. 
llvm-svn: 31675
 2006-11-11 10:20:02 +00:00
Chris Lattner a0a8003f59 disallow preinc of a frameindex. This is not profitable and causes 2-addr 
pass to explode.  This fixes a bunch of llc-beta failures on ppc last night.

llvm-svn: 31661
 2006-11-11 01:00:15 +00:00
Chris Lattner eabc15c1d8 reduce indentation by using early exits. No functionality change. 
llvm-svn: 31660
 2006-11-11 00:56:29 +00:00
Chris Lattner ffad2166e1 move big chunks of code out-of-line, no functionality change. 
llvm-svn: 31658
 2006-11-11 00:39:41 +00:00
Chris Lattner 4eac5f59e6 Fix a dag combiner bug exposed by my recent instcombine patch. This fixes 
CodeGen/Generic/2006-11-10-DAGCombineMiscompile.ll and PPC gsm/toast

llvm-svn: 31644
 2006-11-10 21:37:15 +00:00
Evan Cheng 8c9c6d71ed Add implicit def / use operands to MachineInstr. 
llvm-svn: 31633
 2006-11-10 08:43:01 +00:00
Evan Cheng 13440b025c When forming a pre-indexed store, make sure ptr isn't the same or is a pred of value being stored. It would cause a cycle. 
llvm-svn: 31631
 2006-11-10 08:28:11 +00:00
Chris Lattner d5e604dbb2 commentate 
llvm-svn: 31627
 2006-11-10 04:41:34 +00:00
Evan Cheng 6878378390 Don't attempt expensive pre-/post- indexed dag combine if target does not support them. 
llvm-svn: 31598
 2006-11-09 19:10:46 +00:00
Evan Cheng d550248f2c Add a mechanism to specify whether a target supports a particular indexed load / store. 
llvm-svn: 31597
 2006-11-09 18:56:43 +00:00
Evan Cheng c034f14fbe Rename ISD::MemOpAddrMode to ISD::MemIndexedMode 
llvm-svn: 31596
 2006-11-09 18:44:21 +00:00
Evan Cheng b15000736c Rename ISD::MemOpAddrMode to ISD::MemIndexedMode 
llvm-svn: 31595
 2006-11-09 17:55:04 +00:00
Evan Cheng b58e06bc9e getPostIndexedAddressParts change: passes in load/store instead of its loaded / stored VT. 
llvm-svn: 31584
 2006-11-09 04:29:46 +00:00
Evan Cheng 85e54223cd Match more post-indexed ops. 
llvm-svn: 31569
 2006-11-08 20:27:27 +00:00
Jim Laskey 61feeb90f9 Remove redundant <cmath>. 
llvm-svn: 31561
 2006-11-08 19:16:44 +00:00
Evan Cheng 0303cb9b33 - When performing pre-/post- indexed load/store transformation, do not worry 
about whether the new base ptr would be live below the load/store. Let two
  address pass split it back to non-indexed ops.
- Minor tweaks / fixes.

llvm-svn: 31544
 2006-11-08 08:30:28 +00:00
Evan Cheng 6072435756 Fixed a minor bug preventing some pre-indexed load / store transformation. 
llvm-svn: 31543
 2006-11-08 06:56:05 +00:00
Reid Spencer fdff938a7e For PR950: 
This patch converts the old SHR instruction into two instructions,
AShr (Arithmetic) and LShr (Logical). The Shr instructions now are not
dependent on the sign of their operands.

llvm-svn: 31542
 2006-11-08 06:47:33 +00:00
Evan Cheng d48f7dd250 Fix a obscure post-indexed load / store dag combine bug. 
llvm-svn: 31537
 2006-11-08 02:38:55 +00:00
Evan Cheng 60c6846d21 Add post-indexed load / store transformations. 
llvm-svn: 31498
 2006-11-07 09:03:05 +00:00
Chris Lattner 94c231f453 Fix PR988 and CodeGen/Generic/2006-11-06-MemIntrinsicExpand.ll. 
The low part goes in the first operand of expandop, not the second one.

llvm-svn: 31487
 2006-11-07 04:11:44 +00:00
Evan Cheng f24d15f969 Remove dead code; added a missing null ptr check. 
llvm-svn: 31478
 2006-11-06 21:33:46 +00:00
Evan Cheng eb99bd736a Add comment. 
llvm-svn: 31473
 2006-11-06 08:14:30 +00:00
Jeff Cohen 7d6f3db3e2 Unbreak VC++ build. 
llvm-svn: 31464
 2006-11-05 19:31:28 +00:00
Evan Cheng 33157700d9 Added pre-indexed store support. 
llvm-svn: 31459
 2006-11-05 09:31:14 +00:00
Evan Cheng 1a1e23eff7 Added getIndexedStore. 
llvm-svn: 31458
 2006-11-05 09:30:09 +00:00
Evan Cheng fd2c5dd806 Changes to use operand constraints to process two-address instructions. 
llvm-svn: 31453
 2006-11-04 09:44:31 +00:00
Evan Cheng 9456dd8b81 Fix comments. 
llvm-svn: 31414
 2006-11-03 07:31:32 +00:00
Evan Cheng 1dfd26a151 Rename 
llvm-svn: 31413
 2006-11-03 07:21:16 +00:00
Reid Spencer 52f958741a Remove dead variable. Fix 80 column violations. 
llvm-svn: 31412
 2006-11-03 03:30:34 +00:00
Evan Cheng 357017f4a9 Added DAG combiner transformation to generate pre-indexed loads. 
llvm-svn: 31410
 2006-11-03 03:06:21 +00:00
Evan Cheng c176f038b9 Added isPredecessor. 
llvm-svn: 31409
 2006-11-03 03:05:24 +00:00
Chris Lattner cd7b92251d silence warning 
llvm-svn: 31397
 2006-11-03 01:28:29 +00:00
Reid Spencer de46e48420 For PR786: 
Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting
fall out by removing unused variables. Remaining warnings have to do with
unused functions (I didn't want to delete code without review) and unused
variables in generated code. Maintainers should clean up the remaining
issues when they see them. All changes pass DejaGnu tests and Olden.

llvm-svn: 31380
 2006-11-02 20:25:50 +00:00
Reid Spencer 7eb55b395f For PR950: 
Replace the REM instruction with UREM, SREM and FREM.

llvm-svn: 31369
 2006-11-02 01:53:59 +00:00
Chris Lattner 55402d4403 Allow the getRegForInlineAsmConstraint method to return a register class with 
no fixes physreg.  Treat this as permission to use any register in the register
class.  When this happens and it is safe, allow the llvm register allcoator to
allocate the register instead of doing it at isel time.  This eliminates a ton
of copies around common inline asms.  For example:

int test2(int Y, int X) {
  asm("foo %0, %1" : "=r"(X): "r"(X));
  return X;
}

now compiles to:

_test2:
        foo r3, r4
        blr

instead of:

_test2:
        mr r2, r4
        foo r2, r2
        mr r3, r2
        blr

GCC produces:

_test2:
        foo r4, r4
        mr r3,r4
        blr

llvm-svn: 31366
 2006-11-02 01:41:49 +00:00
Evan Cheng 1359196c4e Clean up. 
llvm-svn: 31359
 2006-11-01 22:39:30 +00:00
Evan Cheng 47218fab42 CopyFromReg starts a live range so its use should not be considered a floater. 
llvm-svn: 31356
 2006-11-01 22:17:06 +00:00
Evan Cheng 415f365e5c Print jumptable index. 
llvm-svn: 31340
 2006-11-01 04:48:30 +00:00
Chris Lattner fe43befeda Compile CodeGen/PowerPC/fp-branch.ll to: 
_intcoord_cond_next55:
LBB1_3: ;cond_next55
        lis r2, ha16(LCPI1_0)
        lfs f0, lo16(LCPI1_0)(r2)
        fcmpu cr0, f1, f0
        blt cr0, LBB1_2 ;cond_next62.exitStub
LBB1_1: ;bb72.exitStub
        li r3, 1
        blr
LBB1_2: ;cond_next62.exitStub
        li r3, 0
        blr

instead of:

_intcoord_cond_next55:
LBB1_3: ;cond_next55
        lis r2, ha16(LCPI1_0)
        lfs f0, lo16(LCPI1_0)(r2)
        fcmpu cr0, f1, f0
        bge cr0, LBB1_1 ;bb72.exitStub
LBB1_4: ;cond_next55
        lis r2, ha16(LCPI1_0)
        lfs f0, lo16(LCPI1_0)(r2)
        fcmpu cr0, f1, f0
        bnu cr0, LBB1_2 ;cond_next62.exitStub
LBB1_1: ;bb72.exitStub
        li r3, 1
        blr
LBB1_2: ;cond_next62.exitStub
        li r3, 0
        blr

llvm-svn: 31330
 2006-10-31 23:06:00 +00:00
Chris Lattner 427301fdae look through isunordered to inline it into branch blocks. 
llvm-svn: 31328
 2006-10-31 22:37:42 +00:00
Chris Lattner 1fd360e13a handle global address constant sdnodes 
llvm-svn: 31323
 2006-10-31 20:01:56 +00:00
Chris Lattner 6f043b90ea TargetLowering::isOperandValidForConstraint 
llvm-svn: 31319
 2006-10-31 19:41:18 +00:00
Chris Lattner 8c6949e5b2 Change the prototype for TargetLowering::isOperandValidForConstraint 
llvm-svn: 31318
 2006-10-31 19:40:43 +00:00
Chris Lattner 968f803928 Turn an assert into an error message. This is commonly triggered when 
we don't support a specific constraint yet.  When this happens, print the
unsupported constraint.

llvm-svn: 31310
 2006-10-31 07:33:13 +00:00
Evan Cheng e6d584765f Fix a typo which can break jumptables. 
llvm-svn: 31305
 2006-10-31 02:31:00 +00:00
Evan Cheng 84a28d4e76 Lower jumptable to BR_JT. The legalizer can lower it to a BRIND or let the target custom lower it. 
llvm-svn: 31293
 2006-10-30 08:00:44 +00:00
Evan Cheng c3e695137d Added a new SDNode type: BR_JT for jumptable branch. 
llvm-svn: 31292
 2006-10-30 07:59:36 +00:00
Chris Lattner e60ae823e8 fix Generic/2006-10-29-Crash.ll 
llvm-svn: 31281
 2006-10-29 21:01:20 +00:00