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3055 Commits

Author SHA1 Message Date
Reid Spencer 2230144a75 Make an assert comment match the tested assertion. 
llvm-svn: 31686
 2006-11-11 20:07:59 +00:00
Evan Cheng 979bbf48d5 Add methods to add implicit def use operands to a MI. 
llvm-svn: 31675
 2006-11-11 10:20:02 +00:00
Chris Lattner a0a8003f59 disallow preinc of a frameindex. This is not profitable and causes 2-addr 
pass to explode.  This fixes a bunch of llc-beta failures on ppc last night.

llvm-svn: 31661
 2006-11-11 01:00:15 +00:00
Chris Lattner eabc15c1d8 reduce indentation by using early exits. No functionality change. 
llvm-svn: 31660
 2006-11-11 00:56:29 +00:00
Chris Lattner ffad2166e1 move big chunks of code out-of-line, no functionality change. 
llvm-svn: 31658
 2006-11-11 00:39:41 +00:00
Chris Lattner 4eac5f59e6 Fix a dag combiner bug exposed by my recent instcombine patch. This fixes 
CodeGen/Generic/2006-11-10-DAGCombineMiscompile.ll and PPC gsm/toast

llvm-svn: 31644
 2006-11-10 21:37:15 +00:00
Evan Cheng 8c9c6d71ed Add implicit def / use operands to MachineInstr. 
llvm-svn: 31633
 2006-11-10 08:43:01 +00:00
Evan Cheng 13440b025c When forming a pre-indexed store, make sure ptr isn't the same or is a pred of value being stored. It would cause a cycle. 
llvm-svn: 31631
 2006-11-10 08:28:11 +00:00
Chris Lattner d5e604dbb2 commentate 
llvm-svn: 31627
 2006-11-10 04:41:34 +00:00
Evan Cheng 6878378390 Don't attempt expensive pre-/post- indexed dag combine if target does not support them. 
llvm-svn: 31598
 2006-11-09 19:10:46 +00:00
Evan Cheng d550248f2c Add a mechanism to specify whether a target supports a particular indexed load / store. 
llvm-svn: 31597
 2006-11-09 18:56:43 +00:00
Evan Cheng c034f14fbe Rename ISD::MemOpAddrMode to ISD::MemIndexedMode 
llvm-svn: 31596
 2006-11-09 18:44:21 +00:00
Evan Cheng b15000736c Rename ISD::MemOpAddrMode to ISD::MemIndexedMode 
llvm-svn: 31595
 2006-11-09 17:55:04 +00:00
Jim Laskey f1606b80f1 Allows debugging llc self hosted. 
llvm-svn: 31594
 2006-11-09 16:32:26 +00:00
Jim Laskey 97f89b11b3 Merging dwarf info to a single compile unit. 
llvm-svn: 31593
 2006-11-09 14:52:14 +00:00
Evan Cheng b58e06bc9e getPostIndexedAddressParts change: passes in load/store instead of its loaded / stored VT. 
llvm-svn: 31584
 2006-11-09 04:29:46 +00:00
Evan Cheng 1698c2999c Remove M_2_ADDR_FLAG. 
llvm-svn: 31583
 2006-11-09 02:22:54 +00:00
Evan Cheng 85e54223cd Match more post-indexed ops. 
llvm-svn: 31569
 2006-11-08 20:27:27 +00:00
Jim Laskey 61feeb90f9 Remove redundant <cmath>. 
llvm-svn: 31561
 2006-11-08 19:16:44 +00:00
Jim Laskey 62bbc9ef58 Now can re-enable debug label folding. 
llvm-svn: 31549
 2006-11-08 14:17:45 +00:00
Evan Cheng 0303cb9b33 - When performing pre-/post- indexed load/store transformation, do not worry 
about whether the new base ptr would be live below the load/store. Let two
  address pass split it back to non-indexed ops.
- Minor tweaks / fixes.

llvm-svn: 31544
 2006-11-08 08:30:28 +00:00
Evan Cheng 6072435756 Fixed a minor bug preventing some pre-indexed load / store transformation. 
llvm-svn: 31543
 2006-11-08 06:56:05 +00:00
Reid Spencer fdff938a7e For PR950: 
This patch converts the old SHR instruction into two instructions,
AShr (Arithmetic) and LShr (Logical). The Shr instructions now are not
dependent on the sign of their operands.

llvm-svn: 31542
 2006-11-08 06:47:33 +00:00
Evan Cheng d48f7dd250 Fix a obscure post-indexed load / store dag combine bug. 
llvm-svn: 31537
 2006-11-08 02:38:55 +00:00
Chris Lattner bf3b57f221 optimize single MBB loops better. In particular, produce: 
LBB1_57:        #bb207.i
        movl 72(%esp), %ecx
        movb (%ecx,%eax), %cl
        movl 80(%esp), %edx
        movb %cl, 1(%edx,%eax)
        incl %eax
        cmpl $143, %eax
        jne LBB1_57     #bb207.i
        jmp LBB1_64     #cond_next255.i

intead of:

LBB1_57:        #bb207.i
        movl 72(%esp), %ecx
        movb (%ecx,%eax), %cl
        movl 80(%esp), %edx
        movb %cl, 1(%edx,%eax)
        incl %eax
        cmpl $143, %eax
        je LBB1_64      #cond_next255.i
        jmp LBB1_57     #bb207.i

This eliminates a branch per iteration of the loop.  This hurted PPC
particularly, because the extra branch meant another dispatch group for each
iteration of the loop.

llvm-svn: 31530
 2006-11-08 01:03:21 +00:00
Jim Laskey 21d4d895ca Accidently reran commit. 
llvm-svn: 31516
 2006-11-07 21:58:55 +00:00
Jim Laskey a919ba9abd Missed a label map, reverting till covered. 
llvm-svn: 31514
 2006-11-07 21:37:31 +00:00
Jim Laskey 21ce53b94e Missed a label map, reverting till covered. 
llvm-svn: 31512
 2006-11-07 20:53:05 +00:00
Jim Laskey 6ea4fae838 1. Add a pass to fold debug label instructions so a debug info client can detect 
empty ranges.

2. Reorg how MachineDebugInfo maintains changes to debug labels.

3. Have dwarf writer use debug label info to simplify scopes and source line
coorespondence.

4. Revert the merging of compile units until I can get the bugs ironed out.

llvm-svn: 31507
 2006-11-07 19:33:46 +00:00
Chris Lattner b18177bfab Enable improved spilling costs by default. This speeds up viterbi on x86 
by 40%, FreeBench/fourinarow by 20%, and many other programs 10-25%.

On PPC, this speeds up fourinarow by 18%, and probably other things as well.

llvm-svn: 31504
 2006-11-07 18:04:58 +00:00
Jim Laskey 6a9342166b Use correct value for float HUGH_VAL. 
llvm-svn: 31500
 2006-11-07 12:25:45 +00:00
Evan Cheng 60c6846d21 Add post-indexed load / store transformations. 
llvm-svn: 31498
 2006-11-07 09:03:05 +00:00
Chris Lattner 01d039cc44 Add a new llcbeta option. This speeds up viterbi from 12.34 to 8.76s on 
X86.  If happy, I'll enable this by default.

llvm-svn: 31493
 2006-11-07 07:18:40 +00:00
Reid Spencer 78c84a0328 Unbreak X86/ELF Debugging. Somehow this line got lost in Jim's cleanup. 
llvm-svn: 31492
 2006-11-07 06:36:36 +00:00
Chris Lattner 94c231f453 Fix PR988 and CodeGen/Generic/2006-11-06-MemIntrinsicExpand.ll. 
The low part goes in the first operand of expandop, not the second one.

llvm-svn: 31487
 2006-11-07 04:11:44 +00:00
Evan Cheng f24d15f969 Remove dead code; added a missing null ptr check. 
llvm-svn: 31478
 2006-11-06 21:33:46 +00:00
Jim Laskey 235aeef9e1 Tab interferes with uniqueness. 
NOTE: There doesn't seem to be consistency for whether a leading tab
is present in a section heading.

llvm-svn: 31475
 2006-11-06 16:23:59 +00:00
Jim Laskey f39064c2de D'oh - reversed logic. 
llvm-svn: 31474
 2006-11-06 13:20:29 +00:00
Evan Cheng eb99bd736a Add comment. 
llvm-svn: 31473
 2006-11-06 08:14:30 +00:00
Jeff Cohen 7d6f3db3e2 Unbreak VC++ build. 
llvm-svn: 31464
 2006-11-05 19:31:28 +00:00
Evan Cheng 33157700d9 Added pre-indexed store support. 
llvm-svn: 31459
 2006-11-05 09:31:14 +00:00
Evan Cheng 1a1e23eff7 Added getIndexedStore. 
llvm-svn: 31458
 2006-11-05 09:30:09 +00:00
Jim Laskey 01c55a50b1 Live local variables are being dropped because the begin or end labels marking 
their scope are being deleted.  Workaround is to widen scope to full function.

llvm-svn: 31454
 2006-11-04 10:48:07 +00:00
Evan Cheng fd2c5dd806 Changes to use operand constraints to process two-address instructions. 
llvm-svn: 31453
 2006-11-04 09:44:31 +00:00
Evan Cheng 51733ed4a3 Fixed some spiller bugs exposed by the recent two-address code changes. Now 
there may be other def(s) apart from the use&def two-address operand. We need
to check if the register reuse for a use&def operand may conflicts with another
def. Provide a mean to recover from the conflict if it is detected when the
defs are processed later.

llvm-svn: 31439
 2006-11-04 00:21:55 +00:00
Chris Lattner bb3ea2a437 this will work better 
llvm-svn: 31419
 2006-11-03 19:15:55 +00:00
Chris Lattner a35f8c16c4 Fix the build on xcode < 2.4 
llvm-svn: 31417
 2006-11-03 19:13:59 +00:00
Evan Cheng 9456dd8b81 Fix comments. 
llvm-svn: 31414
 2006-11-03 07:31:32 +00:00
Evan Cheng 1dfd26a151 Rename 
llvm-svn: 31413
 2006-11-03 07:21:16 +00:00
Reid Spencer 52f958741a Remove dead variable. Fix 80 column violations. 
llvm-svn: 31412
 2006-11-03 03:30:34 +00:00