1f78296869
AVX512: Implemented encoding, intrinsics and DAG lowering for VMOVDDUP instructions.
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Differential Revision: http://reviews.llvm.org/D14702
llvm-svn: 253548
2015-11-19 08:26:56 +00:00
24cab0fa06
AVX512: Implemented encoding and intrinsics for VMOVSHDUP/VMOVSLDUP instructions.
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Differential Revision: http://reviews.llvm.org/D14322
llvm-svn: 253185
2015-11-16 07:22:00 +00:00
3ff8ef9eb7
Revert r253160.
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It broke layering violation. Reproducible with BUILD_SHARED_LIBS=ON.
llvm-svn: 253163
2015-11-15 12:19:11 +00:00
aa40ddd3ba
AVX512: Implemented encoding and intrinsics for VMOVSHDUP/VMOVSLDUP instructions.
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Differential Revision: http://reviews.llvm.org/D14322
llvm-svn: 253160
2015-11-15 07:23:13 +00:00
b6b27af46a
AVX512 : Implemented encoding and DAG lowering for VMOVHPS/PD and VMOVLPS/PD instructions.
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Differential Revision: http://reviews.llvm.org/D14492
llvm-svn: 252592
2015-11-10 07:09:07 +00:00
21296d230a
AVX512: Implemented encoding and intrinsics for VPBROADCASTB/W/D/Q instructions.
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Differential Revision: http://reviews.llvm.org/D13884
llvm-svn: 250819
2015-10-20 11:56:42 +00:00
defab3c1ef
AVX512: vpextrb/w/d/q and vpinsrb/w/d/q implementation.
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This instructions doesn't have intrincis.
Added tests for lowering and encoding.
Differential Revision: http://reviews.llvm.org/D12317
llvm-svn: 249688
2015-10-08 12:55:01 +00:00
d2c3599c5f
[X86][AVX512VLBW] add support in byte shift and SAD
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add byte shift left/right
add SAD - compute sum of absolute differences
Differential Revision: http://reviews.llvm.org/D12479
llvm-svn: 246654
2015-09-02 14:21:54 +00:00
a6297c701e
AVX512: Implemented encoding and intrinsics for vshufps/d.
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Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D11709
llvm-svn: 246640
2015-09-02 10:50:58 +00:00
2ae0fe3ac3
AVX512: Implemented encoding and intrinsics for vpalignr
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Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D12270
llvm-svn: 246428
2015-08-31 11:14:02 +00:00
87e6397fb1
AVX : Fix ISA disabling in case AVX512VL , some instructions should be disabled only if AVX512BW and AVX512VL present.
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Tests added.
Differential Revision: http://reviews.llvm.org/D11414
llvm-svn: 242987
2015-07-23 07:11:14 +00:00
096e8b0995
AVX : Fix ISA disabling in case AVX512VL , some instructions should be disabled only if AVX512BW present.
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Tests added.
Differential Revision: http://reviews.llvm.org/D11122
llvm-svn: 242270
2015-07-15 07:08:10 +00:00
Igor Breger