Commit Graph

140924 Commits

Author SHA1 Message Date
Adam Nemet 544220fc0b [opt-viewer] Don't fail with remarks without debug location
llvm-svn: 286861
2016-11-14 18:38:48 +00:00
Changpeng Fang 8236fe103f AMDGPU/SI: Support data types other than V4f32 in image intrinsics
Summary:
  Extend image intrinsics to support data types of V1F32 and V2F32.

  TODO: we should define a mapping table to change the opcode for data type of V2F32 but just one channel is active,
  even though such case should be very rare.

Reviewers:
  tstellarAMD

Differential Revision:
  http://reviews.llvm.org/D26472

llvm-svn: 286860
2016-11-14 18:33:18 +00:00
Zvi Rackover 35bb7fdadc [X86] Adding reproducer for pr30981
llvm-svn: 286855
2016-11-14 18:10:44 +00:00
Zachary Turner c316ddcd81 [PDB] Add documentation for the DBI Stream.
Differential Revision: https://reviews.llvm.org/D26552

llvm-svn: 286853
2016-11-14 17:59:28 +00:00
Zachary Turner 32e1edecba [PDB] Add documentation for the PDB Stream.
https://reviews.llvm.org/D26516

llvm-svn: 286852
2016-11-14 17:59:21 +00:00
Bob Wilson d7bef6972d Use _Unwind_Backtrace on Apple platforms.
Darwin's backtrace() function does not work with sigaltstack (which was
enabled when available with r270395) — it does a sanity check to make
sure that the current frame pointer is within the expected stack area
(which it is not when using an alternate stack) and gives up otherwise.
The alternative of _Unwind_Backtrace seems to work fine on macOS, so use
that when backtrace() fails. Note that we then use backtrace_symbols_fd()
with the addresses from _Unwind_Backtrace, but I’ve tested that and it
also seems to work fine. rdar://problem/28646552

llvm-svn: 286851
2016-11-14 17:56:18 +00:00
Adrian Prantl 1f9ac96cb1 Typo
llvm-svn: 286845
2016-11-14 17:26:32 +00:00
Teresa Johnson 3624bdf60a Restore "[ThinLTO] Prevent exporting of locals used/defined in module level asm"
This restores the rest of r286297 (part was restored in r286475).
Specifically, it restores the part requiring adding a dependency from
the Analysis to Object library (downstream use changed to correctly
model split BitReader vs BitWriter libraries).

Original description of this part of patch follows:

Module level asm may also contain defs of values. We need to prevent
export of any refs to local values defined in module level asm (e.g. a
ref in normal IR), since that also requires renaming/promotion of the
local. To do that, the summary index builder looks at all values in the
module level asm string that are not marked Weak or Global, which is
exactly the set of locals that are defined. A summary is created for
each of these local defs and flagged as NoRename.

This required adding handling to the BitcodeWriter to look at GV
declarations to see if they have a summary (rather than skipping them
all).

Finally, added an assert to IRObjectFile::CollectAsmUndefinedRefs to
ensure that an MCAsmParser is available, otherwise the module asm parse
would silently fail. Initialized the asm parser in the opt tool for use
in testing this fix.

Fixes PR30610.

llvm-svn: 286844
2016-11-14 17:12:32 +00:00
Sumanth Gundapaneni d428cf8b5f [Hexagon] Remove unsafe load instructions that affect Stack Slot Coloring
The Stack slot coloring pass removes a store that is followed by a load
that deal with the same stack slot. The function isLoadFromStackSlot
is supposed to consider the loads that have no side-effects. This
patch fixed the issue by removing the unsafe loads from this function
Eg:
%vreg0<def> = L2_loadruh_io <fi#15>, 0
S2_storeri_io <fi#15>, 0, %vreg0

In this case, we load an unsigned extended half word and store this in to
the same stack slot. The Stack slot coloring pass considers safe to remove
the store. This patch marked all the non-vector byte and half word loads as
unsafe.

llvm-svn: 286843
2016-11-14 17:11:00 +00:00
Stephan Bergmann 06c31f6061 Handle non-inlined clang::Type::getAs specializations in extract_symbols.py
The existing logic was to discard any symbols representing function template
instantiations, as the definitions were assumed to be inline. But there are
three explicit specializations of clang::Type::getAs that are only defined in
Clang's lib/AST/Type.cpp, and at least the plugin used by the LibreOffice build
(https://wiki.documentfoundation.org/Development/Clang_plugins) uses those
functions.

Differential Revision: https://reviews.llvm.org/D26455

llvm-svn: 286841
2016-11-14 17:07:09 +00:00
Teresa Johnson d5033a4576 [ThinLTO] Make inline assembly handling more efficient in summary
Summary:
The change in r285513 to prevent exporting of locals used in
inline asm added all locals in the llvm.used set to the reference
set of functions containing inline asm. Since these locals were marked
NoRename, this automatically prevented importing of the function.

Unfortunately, this caused an explosion in the summary reference lists
in some cases. In my particular example, it happened for a large protocol
buffer generated C++ file, where many of the generated functions
contained an inline asm call. It was exacerbated when doing a ThinLTO
PGO instrumentation build, where the PGO instrumentation included
thousands of private __profd_* values that were added to llvm.used.

We really only need to include a single llvm.used local (NoRename) value
in the reference list of a function containing inline asm to block it
being imported. However, it seems cleaner to add a flag to the summary
that explicitly describes this situation, which is what this patch does.

Reviewers: mehdi_amini

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D26402

llvm-svn: 286840
2016-11-14 16:40:19 +00:00
Simon Pilgrim 779da8e5ea [CostModel][X86] Added mul costs for vXi8 vectors
More realistic v16i8/v32i8/v64i8 MUL costs - we have to extend to vXi16, use PMULLW and then truncate the result

llvm-svn: 286838
2016-11-14 15:54:24 +00:00
Simon Pilgrim 27fed8e5d6 [X86][AVX] Fixed v16i16/v32i8 ADD/SUB costs on AVX1 subtargets
Add explicit v16i16/v32i8 ADD/SUB costs, matching the costs of v4i64/v8i32 - they were missing for some reason.

This has side effects on the LV max bandwidth tests (AVX1 now prefers 128-bit vectors vs AVX2 which still prefers 256-bit)

llvm-svn: 286832
2016-11-14 14:45:16 +00:00
Sean Fertile adda5b2d2b [PPC] add intrinsics for vec extract exp/significand and vec test data class.
Differential Revision: https://reviews.llvm.org/D26272

llvm-svn: 286829
2016-11-14 14:42:37 +00:00
Aaron Ballman c78f5d4194 Reverting r285406, which was a temporary workaround to get one of the documentation bots upgraded to something newer than GCC 4.7. This restores the check for GCC 4.8.
llvm-svn: 286822
2016-11-14 13:33:51 +00:00
Renato Golin 199b6b941d Revert "llvm-strings: support printing the filename"
Also,

Revert "test: remove the archive before modifying it"
Revert "test: explicitly use gnu format"

This reverts commits r286778, r286729 and r286767, as they are randomly failing
on many bots (AArch64, x86_64).

llvm-svn: 286820
2016-11-14 13:09:24 +00:00
Simon Pilgrim 475b40dab8 Remove redundant condition (PR28352) NFCI.
We were already testing is the op was not a leaf, so need to then test if it was a leaf (added it to the assert instead).

llvm-svn: 286817
2016-11-14 12:00:46 +00:00
James Molloy 6df8f27c95 [InlineCost] Remove skew when calculating call costs
When calculating the cost of a call instruction we were applying a heuristic penalty as well as the cost of the instruction itself.

However, when calculating the benefit from inlining we weren't discounting the equivalent penalty for the call instruction that would be removed! This caused skew in the calculation and meant we wouldn't inline in the following, trivial case:

  int g() {
    h();
  }
  int f() {
    g();
  }

llvm-svn: 286814
2016-11-14 11:14:41 +00:00
Simon Pilgrim 3d8482a88d Remove redundant condition (PR28800) NFCI.
'A || (!A && B)' is equivalent to 'A || B':

(LoopCycle > DefCycle) || (LoopCycle <= DefCycle && LoopStage <= DefStage)
-->
(LoopCycle > DefCycle) || (LoopStage <= DefStage)

llvm-svn: 286811
2016-11-14 10:40:23 +00:00
Diana Picus bda7276120 GlobalISel: Fix indentation. NFC
llvm-svn: 286808
2016-11-14 10:25:43 +00:00
Pablo Barrio 7ce2c5ecaf [JumpThreading] Prevent non-deterministic use lists
Summary:
Unfolding selects was previously done with the help of a vector
of pointers that was then sorted to be able to remove duplicates.
As this sorting depends on the memory addresses, it was
non-deterministic. A SetVector is used now so that duplicates are
removed without the need of sorting first.

Reviewers: mgrang, efriedma

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D26450

llvm-svn: 286807
2016-11-14 10:24:26 +00:00
Diana Picus a92d49dabf GlobalISel: Fix typos. NFC
llvm-svn: 286806
2016-11-14 10:22:18 +00:00
Eric Fiselier c79c9d8536 Add explicit (void) cast to unused unique_ptr::release() results
Summary:
This patch adds explicit `(void)` casts to discarded `release()` calls to suppress -Wunused-result.

This patch fixes *all* warnings are generated as a result of [applying `[[nodiscard]]`  within libc++](https://reviews.llvm.org/D26596).
Similar fixes were applied to Clang in r286796.

Reviewers: chandlerc, dberris

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D26598

llvm-svn: 286797
2016-11-14 07:26:17 +00:00
Saleem Abdulrasool d6da74f22b Demangle: only demangle mangled symbols
Only attempt to demangle symbols which have the itanium C++ prefix of `_Z`.
This ensures that we do not treat any symbol name as a managled named.  We would
previously treat a C function `f` as a mangled name and decode that to `float`
incorrectly.

While it is easy to add tests for this, Mehdi recommended against introducing
tests for the demangler as libc++abi should cover the testing.

llvm-svn: 286795
2016-11-14 04:54:47 +00:00
Craig Topper 8f85ad1755 [AVX-512] Add suffixless aliases for EVEX encoded vcvtsi2ss/vcvtsi2sd/vcvtusi2ss/vcvtusi2sd. This matches the VEX behavior.
Fixes another problem from PR28850.

llvm-svn: 286790
2016-11-14 02:46:58 +00:00
Craig Topper b8596e4d1d [X86] Cleanup 'x' and 'y' mnemonic suffixes for vcvtpd2dq/vcvttpd2dq/vcvtpd2ps and similar instructions.
-Don't print the 'x' suffix for the 128-bit reg/mem VEX encoded instructions in Intel syntax. This is consistent with the EVEX versions.
-Don't print the 'y' suffix for the 256-bit reg/reg VEX encoded instructions in Intel or AT&T syntax. This is consistent with the EVEX versions.
-Allow the 'x' and 'y' suffixes to be used for the reg/mem forms when we're assembling using Intel syntax.
-Allow the 'x' and 'y' suffixes on the reg/reg EVEX encoded instructions in Intel or AT&T syntax. This is consistent with what VEX was already allowing.

This should fix at least some of PR28850.

llvm-svn: 286787
2016-11-14 01:53:29 +00:00
Craig Topper 353e59b6d6 [AVX-512] Remove and autoupgrade masked dword/qword variable shift intrinsics to the new unmasked versions and selects.
llvm-svn: 286786
2016-11-14 01:53:22 +00:00
Sanjoy Das dbc58d0015 [LangRef] Drop misleading anecdote
`shl nsw i8 1, i8 8` is poison, but `mul i8 1, i8 128` is not.

This was discussed previously here:
http://lists.llvm.org/pipermail/llvm-dev/2015-April/084195.html.  From
the discussion, it was not clear which semantics we want for `shl`, but
for now at least make the language reference more accurate.

llvm-svn: 286785
2016-11-13 23:40:40 +00:00
Saleem Abdulrasool 25d7683fe7 test: remove the archive before modifying it
The archive may already exist when not doing a clean test run.  The dirty state
can cause a test failure.  Remove the archive first.

llvm-svn: 286778
2016-11-13 20:43:41 +00:00
Saleem Abdulrasool 7091820a96 llvm-cxxfilt: support reading from stdin
`c++filt` when given no arguments runs as a REPL, decoding each line as a
decorated name.  Unify the test structure to be more uniform, with the tests for
llvm-cxxfilt living under test/tools/llvm-cxxfilt.

llvm-svn: 286777
2016-11-13 20:43:38 +00:00
Sanjay Patel cfcc42bdc2 [ValueTracking] recognize even more variants of smin/smax
Similar to:
https://reviews.llvm.org/rL285499
https://reviews.llvm.org/rL286318

We can't minimally expose this in IR tests because we don't have min/max intrinsics,
but the difference is visible in codegen because SelectionDAGBuilder::visitSelect() 
uses matchSelectPattern().

We're not canonicalizing these patterns in IR (yet), so I don't expect there to be any
regressions as noted here:
http://lists.llvm.org/pipermail/llvm-dev/2016-November/106868.html

llvm-svn: 286776
2016-11-13 20:04:52 +00:00
Craig Topper ba13703bb3 [AVX-512] Fix a disassembler failure for AVX-512 vcmpss/vcmpsd with an immediate larger than 32. Fix the same bug with VLX vcmpps/vcmppd.
Fixes PR24941.

llvm-svn: 286775
2016-11-13 19:58:18 +00:00
Saleem Abdulrasool 6ac46b42ac test: synchronise lit substitutions
llvm-strings was added to the test dependencies without updating the lit
substitutions.  Synchronise the list.

llvm-svn: 286773
2016-11-13 19:37:00 +00:00
Sanjay Patel 819f096f09 [ValueTracking] move min/max matching to helper function; NFCI
llvm-svn: 286772
2016-11-13 19:30:19 +00:00
Craig Topper 987dad2bc3 [X86][IR] Reduce the number of full string comparisons in the code that autoupgrades masked shift intrinsics.
llvm-svn: 286768
2016-11-13 19:09:56 +00:00
Saleem Abdulrasool 8b9be8fd41 llvm-strings: support printing the filename
This adds support for the `-f` or `--print-file-name` option for strings.

llvm-svn: 286767
2016-11-13 19:07:48 +00:00
Matt Arsenault dc45274d54 AMDGPU: Implement SGPR spilling with scalar stores
nThis avoids the nasty problems caused by using
memory instructions that read the exec mask while
spilling / restoring registers used for control flow
masking, but only for VI when these were added.

This always uses the scalar stores when enabled currently,
but it may be better to still try to spill to a VGPR
and use this on the fallback memory path.

The cache also needs to be flushed before wave termination
if a scalar store is used.

llvm-svn: 286766
2016-11-13 18:20:54 +00:00
Igor Breger e2399f9e0e revert commit r286761, some builds failed on Win platforms
llvm-svn: 286765
2016-11-13 15:48:11 +00:00
Simon Pilgrim 055c09c1c0 [X86][SSE] Add zero lower 32-bits test case for PR30845
llvm-svn: 286764
2016-11-13 15:32:11 +00:00
Simon Pilgrim 8f7c56125e [X86][AVX512] Add masked VPMOZX test case for PR26762
llvm-svn: 286763
2016-11-13 15:16:43 +00:00
Simon Pilgrim ce59a536f7 [X86][SSE] Add additional test case for PR30845
llvm-svn: 286762
2016-11-13 14:57:52 +00:00
Ayman Musa c09b3769ae [X86][AVX512] Removing llvm x86 intrinsics for _mm_mask_move_{ss|sd} intrinsics.
Differential Revision: https://reviews.llvm.org/D26128

llvm-svn: 286761
2016-11-13 14:51:25 +00:00
Ayman Musa 46af8f9c6f [X86][AVX512] Add patterns for all variants of VMOVSS/VMOVSD instructions.
Differential Revision: https://reviews.llvm.org/D26022

llvm-svn: 286758
2016-11-13 14:29:32 +00:00
Craig Topper b4173a5a70 [InstCombine][AVX-512] Teach InstCombineCalls to handle the new unmasked AVX-512 variable shift intrinsics.
llvm-svn: 286755
2016-11-13 07:26:19 +00:00
Craig Topper 43e97649a1 [AVX-512] Add unmasked intrinsics for variable shifts of dwords and qwords.
These will be used to replace the masked intrinsics so that InstCombineCalls can optimize the AVX-512 variable shifts the same way it does for AVX2.

llvm-svn: 286754
2016-11-13 07:26:15 +00:00
Konstantin Zhuravlyov f86e4b7266 [AMDGPU] Add f16 support (VI+)
Differential Revision: https://reviews.llvm.org/D25975

llvm-svn: 286753
2016-11-13 07:01:11 +00:00
Peter Collingbourne d9445c49ad Bitcode: Change module reader functions to return an llvm::Expected.
Differential Revision: https://reviews.llvm.org/D26562

llvm-svn: 286752
2016-11-13 07:00:17 +00:00
Peter Collingbourne 8dff03911c Analysis: Simplify the ScalarEvolution::getGEPExpr() interface. NFCI.
All existing callers were manually extracting information out of an existing
GEP instruction and passing it to getGEPExpr(). Simplify the interface by
changing it to take a GEPOperator instead.

llvm-svn: 286751
2016-11-13 06:59:50 +00:00
Peter Collingbourne 9ef5a8c501 Bitcode: More precise casting. NFCI.
llvm-svn: 286750
2016-11-13 06:59:28 +00:00
Peter Collingbourne 9d5fd4db81 IR: Change the Type::get{Array,Vector,Pointer}ElementType() functions to perform the correct type assertion.
Previously we were only asserting that the type was a sequential type.

llvm-svn: 286749
2016-11-13 06:58:45 +00:00
Craig Topper 706d897d8a [AVX-512] Move masked shift intrinsics tests to the autoupgrade test file. These missed being moved in r286725.
llvm-svn: 286746
2016-11-13 03:42:27 +00:00
Craig Topper 8b831cbb2a [InstCombine][AVX-512] Expand vector shift handling to work on the AVX-512 shift by immediate and shift by single value.
This does not include support for the AVX-512 variable shifts. That will be coming in a future patch.

llvm-svn: 286739
2016-11-13 01:51:55 +00:00
Sanjay Patel a1b8c10bf6 [x86] add smin/smax with zero tests
These are vector tests corresponding to the discussion at:
http://lists.llvm.org/pipermail/llvm-dev/2016-November/106868.html

Apart from the lack of min/max matching, the and/andn difference 
shows a lack of DAG-level canonicalization.

llvm-svn: 286737
2016-11-13 00:32:39 +00:00
Simon Pilgrim 6e09afa9d0 [X86][SSE] Add test case for PR30845
llvm-svn: 286734
2016-11-12 23:44:58 +00:00
Lang Hames 79c6f7a0c5 [ORC] Remove the 'const' qualifier from the member function wrapper, make the
lambda in wrapHandler mutable to allow it to pass the handler through as a
non-const value.

llvm-svn: 286732
2016-11-12 23:12:41 +00:00
Saleem Abdulrasool 43400b4c06 test: explicitly use gnu format
This should fix the Darwin buildbots.

llvm-svn: 286729
2016-11-12 19:03:08 +00:00
Saleem Abdulrasool be3a2919f4 llvm-strings: trivialise logic until we support more options
Until we have handling for ignoring unloaded sections, simplify the logic to
the point of triviality.  This fixes the scanning of archives, particularly when
embedded in archives.

llvm-svn: 286727
2016-11-12 18:37:04 +00:00
Craig Topper da6a63db1c [AVX-512] Remove the remaining masked shift by immediate or by single value. Autoupgrade them to recently introduced unmasked versions and a select.
After this I'll add the unmasked intrinsics to InstCombineCalls to finish making our handling of these types of shuffles consistent between AVX-512 and the legacy intrinsics.

llvm-svn: 286725
2016-11-12 18:04:46 +00:00
Zachary Turner 17412b03b2 [Support] Add StringRef::find_lower and contains_lower.
Differential Revision: https://reviews.llvm.org/D25299

llvm-svn: 286724
2016-11-12 17:17:12 +00:00
Michal Gorny a583be4e52 [OCaml] Clear cross-target test deps when building out-of-tree
Clear cross-target test dependencies when using LLVM_OCAML_OUT_OF_TREE,
in order to make it possible to run check-llvm-bindings-ocaml without
rebuilding the whole LLVM.

Differential Revision: https://reviews.llvm.org/D26580

llvm-svn: 286720
2016-11-12 14:58:30 +00:00
Sylvestre Ledru 8b59bb4da7 As we released 3.9, from the 4.0 release notes, points to version 3.9 instead of 3.8
llvm-svn: 286719
2016-11-12 10:39:09 +00:00
Craig Topper 9d25c5e2fa [AVX-512] Add unmasked version of shift by immediate and shift by single element in XMM.
Summary:
This is the first step towards being able to add the avx512 shift by immediate intrinsics to InstCombineCalls where we aleady support the sse2 and avx2 intrinsics. We need to the unmasked versions so we can avoid having to teach InstCombineCalls that it would need to insert selects sometimes. Instead we'll just add the selects around the new instrinsics in the frontend.

This change should also enable the shift by i32 intrinsics to take a non-constant shift value just like the avx2 and sse intrinsics. This will enable us to fix PR30691 once we update clang.

Next I'll switch clang to use the new builtins. Then we'll come back to the backend and remove/autoupgrade the old intrinsics. Then I'll work on the same series for variable shifts.

Reviewers: RKSimon, zvi, delena

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D26333

llvm-svn: 286711
2016-11-12 05:28:24 +00:00
Craig Topper b0f480c380 CODE_OWNERS: Take ownership of the X86 backend.
llvm-svn: 286710
2016-11-12 05:16:06 +00:00
Craig Topper 5cb13062d2 [AVX-512] Add support for lowering shuffles to VALIGND/VALIGNQ
Summary: VALIGND and VALIGNQ are similar to PALIGNR but instead of working on a 128-bit lane they work on the entire vector register. This change leverages the shuffle rotate detection code used for PALIGNR to detect these cases.

Reviewers: delena, RKSimon

Subscribers: Farhana, llvm-commits

Differential Revision: https://reviews.llvm.org/D26297

llvm-svn: 286709
2016-11-12 05:05:27 +00:00
Saleem Abdulrasool c1f8e1f35c build: add a dependency on llvm-strings
Since we now have tests for llvm-strings, add a dependency on the tool.

llvm-svn: 286707
2016-11-12 03:45:21 +00:00
Saleem Abdulrasool 2729786fff llvm-strings: ensure that the last string is correctly printed
We would ignore the last string that appeared if the file ended with a printable
character.  Ensure that we get the last string.

llvm-svn: 286706
2016-11-12 03:39:21 +00:00
whitequark 4dcf92a27e [OCaml] Adapt to the new attribute C API.
llvm-svn: 286705
2016-11-12 03:38:30 +00:00
whitequark ce9bb1097d [C API] Fix several null pointer dereferences.
llvm-svn: 286704
2016-11-12 03:38:23 +00:00
Kostya Serebryany 047485ef69 [libFuzzer] one more trophy
llvm-svn: 286703
2016-11-12 02:55:45 +00:00
Kostya Serebryany 53c894d257 [libFuzzer] use a valid ASCII string for a dummy seed corpus
llvm-svn: 286702
2016-11-12 02:27:21 +00:00
Lang Hames 03418af046 [ORC] Add a WrappedHandlerReturn type to map handler return types onto error
return types.

This class allows user provided handlers to return either error-wrapped types
or plain types. In the latter case, the plain type is wrapped with a success
value of Error or Expected<T> type to fit it into the rest of the serialization
machinery.

This patch allows us to remove the RPC unit-test workaround added in r286646.

llvm-svn: 286701
2016-11-12 02:19:31 +00:00
Mehdi Amini fbd2685c89 Improve `git llvm push` to suggest `git pull` when applying patch fails
Differential Revision: https://reviews.llvm.org/D26565

llvm-svn: 286695
2016-11-12 01:17:59 +00:00
Zachary Turner eced115aac One more set of changes to fix formatv() on linux.
llvm-svn: 286692
2016-11-12 00:35:58 +00:00
Zachary Turner f269973b2c Add missing #include.
llvm-svn: 286691
2016-11-12 00:30:37 +00:00
Zachary Turner a6f1678872 Fix another problem with formatv().
llvm-svn: 286690
2016-11-12 00:28:10 +00:00
Kostya Serebryany fc1c405f98 [libFuzzer] use less stack
llvm-svn: 286689
2016-11-12 00:24:35 +00:00
Rui Ueyama a8a68a993e Remove extra semicolon.
llvm-svn: 286688
2016-11-12 00:23:32 +00:00
Tom Stellard b4c8e8e30b AMDGPU/SI: Promote i16 = fp_[us]int f32 for VI
Summary: This fixes a regression caused by r286464.

Reviewers: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, llvm-commits, tony-tye

Differential Revision: https://reviews.llvm.org/D26570

llvm-svn: 286687
2016-11-12 00:19:11 +00:00
Zachary Turner 2f94a7a1fa Try to fix build after llvm::formatv() patch.
llvm-svn: 286686
2016-11-12 00:18:42 +00:00
Zachary Turner 804d50286d Fix -Werror build with clang-cl.
llvm-svn: 286683
2016-11-11 23:58:11 +00:00
Zachary Turner 11db2642fb [Support] Introduce llvm::formatv() function.
This introduces a new type-safe general purpose formatting
library.  It provides compile-time type safety, does not require
a format specifier (since the type is deduced), and provides
mechanisms for extending the format capability to user defined
types, and overriding the formatting behavior for existing types.

This patch additionally adds documentation for the API to the
LLVM programmer's manual.

Mailing List Thread:
http://lists.llvm.org/pipermail/llvm-dev/2016-October/105836.html

Differential Revision: https://reviews.llvm.org/D25587

llvm-svn: 286682
2016-11-11 23:57:40 +00:00
Rui Ueyama f7c9c3234c Define DbiStreamBuilder::addSectionContribs.
This patch defines a new function to add a SectionContribs stream
to a PDB file. Unlike SectionMap, SectionContribs contains a list
of input sections as opposed to output sections.

Note that this patch needs improving because currently we do not
set Module field in SectionContribs entries. In a follow-up patch,
I'll add Modules and then fix it after that.

Differential Revision: https://reviews.llvm.org/D26210

llvm-svn: 286677
2016-11-11 23:41:13 +00:00
Tom Stellard 9fdbec870c AMDGPU/SI: Fix visit order assumption in SIFixSGPRCopies
Summary:
This pass was assuming that when a PHI instruction defined a register
used by another PHI instruction that the defining insstruction would
be legalized before the using instruction.

This assumption was causing the pass to not legalize some PHI nodes
within divergent flow-control.

This fixes a bug that was uncovered by r285762.

Reviewers: nhaehnle, arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, tony-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D26303

llvm-svn: 286676
2016-11-11 23:35:42 +00:00
Richard Trieu d420224dac Print correct directory in merge script.
When providing the project directory to the merge script, print it out in the
commit instructions instead of the default project directory.

llvm-svn: 286675
2016-11-11 23:26:28 +00:00
Sanjay Patel 84ae943f0d [InstCombine] use dyn_cast rather isa+cast; NFC
Follow-up to r286664 cleanup as suggested by Eli. Thanks!

llvm-svn: 286671
2016-11-11 23:20:01 +00:00
Sanjay Patel 8e68394376 [InstCombine] update test to use FileCheck; NFC
llvm-svn: 286668
2016-11-11 23:12:46 +00:00
Kostya Serebryany 235679181b [libFuzzer] do not initialize parts of TracePC -- let them be initialized by the linker. Add no-msan attribute to the memcmp hook.
llvm-svn: 286665
2016-11-11 23:06:53 +00:00
Sanjay Patel cb2199b2f3 [InstCombine] clean up foldSelectOpOp(); NFC
llvm-svn: 286664
2016-11-11 23:01:20 +00:00
Anna Zaks 3c43737832 [tsan][llvm] Implement the function attribute to disable TSan checking at run time
This implements a function annotation that disables TSan checking for the
function at run time. The benefit over attribute((no_sanitize("thread")))
is that the accesses within the callees will also be suppressed.

The motivation for this attribute is a guarantee given by the objective C
language that the calls to the reference count decrement and object
deallocation will be synchronized. To model this properly, we would need
to intercept all ref count decrement calls (which are very common in ObjC
due to use of ARC) and also every single message send. Instead, we propose
to just ignore all accesses made from within dealloc at run time. The main
downside is that this still does not introduce any synchronization, which
means we might still report false positives if the code that relies on this
synchronization is not executed from within dealloc. However, we have not seen
this in practice so far and think these cases will be very rare.

Differential Revision: https://reviews.llvm.org/D25858

llvm-svn: 286663
2016-11-11 23:01:02 +00:00
Adam Nemet 9bfbf8bbdf [LV] Stop saying "use -Rpass-analysis=loop-vectorize"
This is PR28376.

Unfortunately given the current structure of optimization diagnostics we
lack the capability to tell whether the user has
passed -Rpass-analysis=loop-vectorize since this is local to the
front-end (BackendConsumer::OptimizationRemarkHandler).

So rather than printing this even if the user has already
passed -Rpass-analysis, this patch just punts and stops recommending
this option.  I don't think that getting this right is worth the
complexity.

Differential Revision: https://reviews.llvm.org/D26563

llvm-svn: 286662
2016-11-11 22:51:46 +00:00
Lang Hames 720a20a26b [RPC] Add const qualifier to MemberFnWrapper to make buildbots happy.
This is a temporary fix: The right solution is to make sure addHandler can
support mutable lambdas. I'll add that in a follow-up patch.

llvm-svn: 286661
2016-11-11 22:50:16 +00:00
Rui Ueyama 96a905f7ba Fix typo in comment.
llvm-svn: 286657
2016-11-11 22:41:47 +00:00
Matthias Braun c94ca916f5 Revert "(origin/master, origin/HEAD) MachineScheduler/ScheduleDAG: Add support to skipping a node."
Revert accidentally committed change.

This reverts commit r286655.

llvm-svn: 286656
2016-11-11 22:39:50 +00:00
Matthias Braun 66ee0bfced MachineScheduler/ScheduleDAG: Add support to skipping a node.
The DAG mutators in the scheduler cannot really remove DAG nodes as
additional anlysis information such as ScheduleDAGToplogicalSort are
already computed at this point and rely on a fixed number of DAG nodes.

Alleviate the missing removal with a new flag: Setting the new skip
flag on a node ignores it during scheduling.

llvm-svn: 286655
2016-11-11 22:37:34 +00:00
Matthias Braun 40639885f5 ScheduleDAGInstrs: Move VRegUses to ScheduleDAGMILive; NFCI
Push VRegUses/collectVRegUses() down the class hierarchy towards its
only user ScheduleDAGMILive.

NFCI: The initialization of the map happens at a later point but that
should not matter.

This is in preparation to allow DAG mutators to merge nodes, which
relies on this map getting computed later.

llvm-svn: 286654
2016-11-11 22:37:31 +00:00
Matthias Braun 69f1d123b2 MachineScheduler: Dump EntrySU/ExitSU if possible
llvm-svn: 286653
2016-11-11 22:37:28 +00:00
Matthias Braun 636a5972a9 ScheduleDAG: Identify EntrySU/ExitSU when dumping node ids
llvm-svn: 286652
2016-11-11 22:37:26 +00:00
Erik Eckstein c1d52e5c53 FunctionComparator: don't rely on argument evaluation order.
This is a follow-up on the recent refactoring of the FunctionMerge pass.
It should fix a fail of the new FunctionComparator unittest whe compiling with MSVC.

llvm-svn: 286648
2016-11-11 22:21:39 +00:00
Mehdi Amini 3ccc39ef7c Fix static initialization order fiasco in MCTests
Reported by Kostya on llvm-dev, uncovered by an ASAN bot

llvm-svn: 286647
2016-11-11 22:18:42 +00:00
Lang Hames a31a3dae9f [ORC] Temporarily fix the RPCUtils unit test by explicitly specifying a handler
return type.

This should be fixed permanently by having the RPCUtils header recognize the
ErrorSuccess type. I'll commit that in a follow up patch.

llvm-svn: 286646
2016-11-11 22:16:10 +00:00
Piotr Padlewski db8d7c8c2f NFC ProgrammersManual fix
llvm-svn: 286645
2016-11-11 22:12:15 +00:00
Adrian Prantl 622bddb6e0 Simplify code and address review comments (NFC)
llvm-svn: 286644
2016-11-11 22:09:25 +00:00
Lang Hames d8ec15184e [Orc] Update the BuildingAJIT Chapter 5 server class for the recent RPC changes.
llvm-svn: 286642
2016-11-11 21:55:25 +00:00
Adrian Prantl 6cb849e2f0 Fix a reference-to-temporary introduced in r286607.
llvm-svn: 286640
2016-11-11 21:48:09 +00:00
Lang Hames 1f2bf2d3e1 [ORC] Re-apply 286620 with fixes for the ErrorSuccess class.
llvm-svn: 286639
2016-11-11 21:42:09 +00:00
Nemanja Ivanovic ec4b0c360f [PowerPC] Add remaining vector permute builtins in altivec.h - LLVM portion
This patch corresponds to review:
https://reviews.llvm.org/D26480

Adds all the intrinsics used for various permute builtins that will
be added to altivec.h.

llvm-svn: 286638
2016-11-11 21:42:01 +00:00
Evgeniy Stepanov 1fe189d795 [cfi] Fix weak functions handling.
When a function pointer is replaced with a jumptable pointer, special
case is needed to preserve the semantics of extern_weak functions.
Since a jumptable entry can not be extern_weak, we emulate that
behaviour by replacing all references to F (the extern_weak function)
with the following expression: F != nullptr ? JumpTablePtr : nullptr.

Extra special care is needed for global initializers, since most (or
probably all) backends can not lower an initializer that includes
this kind of constant expression. Initializers like that are replaced
with a global constructor (i.e. a runtime initializer).

llvm-svn: 286636
2016-11-11 21:39:26 +00:00
Erik Eckstein 4d6fb72aa9 Make the FunctionComparator of the MergeFunctions pass a stand-alone utility.
This is pure refactoring. NFC.

This change moves the FunctionComparator (together with the GlobalNumberState
utility) in to a separate file so that it can be used by other passes.
For example, the SwiftMergeFunctions pass in the Swift compiler:
https://github.com/apple/swift/blob/master/lib/LLVMPasses/LLVMMergeFunctions.cpp

Details of the change:

*) The big part is just moving code out of MergeFunctions.cpp into FunctionComparator.h/cpp
*) Make FunctionComparator member functions protected (instead of private)
   so that a derived comparator class can use them.

Following refactoring helps to share code between the base FunctionComparator
class and a derived class:

*) Add a beginCompare() function
*) Move some basic function property comparisons into a separate function compareSignature()
*) Do the GEP comparison inside cmpOperations() which now has a new
   needToCmpOperands reference parameter

https://reviews.llvm.org/D25385

llvm-svn: 286632
2016-11-11 21:15:13 +00:00
Rui Ueyama 9a2a1d27a5 Fix -Wpessimizing-move warning.
llvm-svn: 286629
2016-11-11 20:39:02 +00:00
Vyacheslav Klochkov f1a12fe0f5 Fixed the lost FastMathFlags for FCmp operations in SLPVectorizer.
Reviewer: Michael Zolotukhin.
Differential Revision: https://reviews.llvm.org/D26543

llvm-svn: 286626
2016-11-11 19:55:29 +00:00
Chad Rosier 8ade03463e [AArch64] Update a FIXME comment to reflect current state. NFC.
llvm-svn: 286625
2016-11-11 19:52:45 +00:00
Peter Collingbourne 6de481a378 Bitcode: Change getModuleSummaryIndex() to return an llvm::Expected.
Differential Revision: https://reviews.llvm.org/D26539

llvm-svn: 286624
2016-11-11 19:50:39 +00:00
Peter Collingbourne cd513a41c1 Bitcode: Clean up error handling for certain bitcode query functions.
The functions getBitcodeTargetTriple(), isBitcodeContainingObjCCategory(),
getBitcodeProducerString() and hasGlobalValueSummary() now return errors
via their return value rather than via the diagnostic handler.

To make this work, re-implement these functions using non-member functions
so that they can be used without the LLVMContext required by BitcodeReader.

Differential Revision: https://reviews.llvm.org/D26532

llvm-svn: 286623
2016-11-11 19:50:24 +00:00
Peter Collingbourne c0032b7178 Bitcode: Prepare to move bitcode readers to free functions.
Make initStream() a free function, and change BitcodeReaderBase ctor to take
a BitstreamCursor.

llvm-svn: 286622
2016-11-11 19:50:10 +00:00
Lang Hames 4f734f254e [ORC] Revert r286620 while I investigate a bot failure.
llvm-svn: 286621
2016-11-11 19:46:46 +00:00
Lang Hames ae1fdddbc4 [ORC] Refactor the ORC RPC utilities to add some new features.
(1) Add support for function key negotiation.

The previous version of the RPC required both sides to maintain the same
enumeration for functions in the API. This means that any version skew between
the client and server would result in communication failure.

With this version of the patch functions (and serializable types) are defined
with string names, and the derived function signature strings are used to
negotiate the actual function keys (which are used for efficient call
serialization). This allows clients to connect to any server that supports a
superset of the API (based on the function signatures it supports).

(2) Add a callAsync primitive.

The callAsync primitive can be used to install a return value handler that will
run as soon as the RPC function's return value is sent back from the remote.

(3) Launch policies for RPC function handlers.

The new addHandler method, which installs handlers for RPC functions, takes two
arguments: (1) the handler itself, and (2) an optional "launch policy". When the
RPC function is called, the launch policy (if present) is invoked to actually
launch the handler. This allows the handler to be spawned on a background
thread, or added to a work list. If no launch policy is used, the handler is run
on the server thread itself. This should only be used for short-running
handlers, or entirely synchronous RPC APIs.

(4) Zero cost cross type serialization.

You can now define serialization from any type to a different "wire" type. For
example, this allows you to call an RPC function that's defined to take a
std::string while passing a StringRef argument. If a serializer from StringRef
to std::string has been defined for the channel type this will be used to
serialize the argument without having to construct a std::string instance.

This allows buffer reference types to be used as arguments to RPC calls without
requiring a copy of the buffer to be made.

llvm-svn: 286620
2016-11-11 19:42:44 +00:00
Sanjay Patel da0149dd74 [InstCombine] add tests to show size-increasing select transforms
llvm-svn: 286619
2016-11-11 19:37:54 +00:00
Chad Rosier 811e76dbcd [AArch64] Add test to show narrow zero store merging is disabled with strict align. NFC.
llvm-svn: 286617
2016-11-11 19:25:48 +00:00
Geoff Berry 25fa4999ff [AArch64] Fix bugs in isel lowering replaceSplatVectorStore.
Summary:
Fix off-by-one indexing error in loop checking that inserted value was a
splat vector.

Add code to check that INSERT_VECTOR_ELT nodes constructing the splat
vector have the expected constant index values.

Reviewers: t.p.northover, jmolloy, mcrosier

Subscribers: aemerson, llvm-commits, rengolin

Differential Revision: https://reviews.llvm.org/D26409

llvm-svn: 286616
2016-11-11 19:25:20 +00:00
Reid Kleckner ec80354873 [sancov] Don't instrument MSVC CRT stdio config helpers
They get called before initialization, which is a problem for winasan.

Test coming in compiler-rt.

llvm-svn: 286615
2016-11-11 19:18:45 +00:00
Evgeniy Stepanov f48ffab554 [cfi] Implement cfi-icall using inline assembly.
The current implementation is emitting a global constant that happens
to evaluate to the same bytes + relocation as a jump instruction on
X86. This does not work for PIE executables and shared libraries
though, because we end up with a wrong relocation type. And it has no
chance of working on ARM/AArch64 which use different relocation types
for jump instructions (R_ARM_JUMP24) that is never generated for
data.

This change replaces the constant with module-level inline assembly
followed by a hidden declaration of the jump table. Works fine for
ARM/AArch64, but has some drawbacks.
* Extra symbols are added to the static symbol table, which inflate
the size of the unstripped binary a little. Stripped binaries are not
affected. This happens because jump table declarations must be
external (because their body is in the inline asm).
* Original functions that were anonymous are now named
<original name>.cfi, and it affects symbolization sometimes. This is
necessary because the only user of these functions is the (inline
asm) jump table, so they had to be added to @llvm.used, which does
not allow unnamed functions.

llvm-svn: 286611
2016-11-11 18:49:09 +00:00
Adrian Prantl 6285f5b441 Fix comments according to the LLVM coding guidelines.
llvm-svn: 286610
2016-11-11 18:22:51 +00:00
Adrian Prantl 554fd99dd5 Revert "Use private linkage for MergedGlobals variables" on Darwin.
This is a partial revert of r244615 (http://reviews.llvm.org/D11942),
which caused a major regression in debug info quality.

Turning the artificial __MergedGlobal symbols into private symbols
(l__MergedGlobal) means that the linker will not include them in the
symbol table of the final executable. Without a symbol table entry
dsymutil is not be able to process the debug info for any of the
merged globals and thus drops the debug info for all of them.

This patch is enabling the old behavior for all MachO targets while
leaving all other targets unaffected.

rdar://problem/29160481
https://reviews.llvm.org/D26531

llvm-svn: 286607
2016-11-11 17:50:09 +00:00
Chad Rosier d6e85ce3c3 [AArch64] Remove lots of redundant code. NFC.
llvm-svn: 286606
2016-11-11 17:49:34 +00:00
Sanjay Patel d1bf4340ef [InstCombine] fix formatting of FoldOpIntoSelect(); NFCI
llvm-svn: 286604
2016-11-11 17:42:16 +00:00
Greg Clayton 04c19286a1 Fixed issues found by Paul Robinson with my patch for:
https://reviews.llvm.org/D26526

- Fixed DW_FORM_strp to be correctly sized and extracted for DWARF64
- Added some missing strp variants as well
- Fixed comment typo

llvm-svn: 286603
2016-11-11 17:38:14 +00:00
Chad Rosier 31ee813068 [AArch64] Early return and minor renaming/refactoring to ease code review. NFC.
llvm-svn: 286601
2016-11-11 17:07:37 +00:00
Greg Clayton e50b286c9e Fix windows buildbot where warnings are errors. We had a switch statement where all enumerations were handled, but some compilers don't recognize this. Simplify the logic so that all compilers will know a return value is returned in all cases.
llvm-svn: 286600
2016-11-11 16:55:31 +00:00
Greg Clayton 82f12b149f Clean up DWARFFormValue by reducing duplicated code and removing DWARFFormValue::getFixedFormSizes()
In preparation for a follow on patch that improves DWARF parsing speed, clean up DWARFFormValue so that we have can get the fixed byte size of a form value given a DWARFUnit or given the version, address byte size and dwarf32/64.

This patch cleans up code so that everyone is using one of the new DWARFFormValue functions:

static Optional<uint8_t> DWARFFormValue::getFixedByteSize(dwarf::Form Form, const DWARFUnit *U = nullptr);
static Optional<uint8_t> DWARFFormValue::getFixedByteSize(dwarf::Form Form, uint16_t Version, uint8_t AddrSize, bool Dwarf32);

This patch changes DWARFFormValue::skipValue() to rely on the output of DWARFFormValue::getFixedByteSize(...) instead of duplicating the code in each function. This will reduce the number of changes we need to make to DWARF to fewer places in DWARFFormValue when we add support for new form.

This patch also starts to support DWARF64 so that we can get correct byte sizes for forms that vary according the DWARF 32/64.

To reduce the code duplication a new FormSizeHelper pure virtual class was created that can be created as a FormSizeHelperDWARFUnit when you have a DWARFUnit, or FormSizeHelperManual where you manually specify the DWARF version, address byte size and DWARF32/DWARF64. There is now a single implementation of a function that gets the fixed byte size (instead of two where one took a DWARFUnit and one took the DWARF version, address byte size and DWARFFormat enum) and one function to skip the form values.

https://reviews.llvm.org/D26526

llvm-svn: 286597
2016-11-11 16:21:37 +00:00
Nemanja Ivanovic 2efc3cb968 [PowerPC] Add vector conversion builtins to altivec.h - LLVM portion
This patch corresponds to review:
https://reviews.llvm.org/D26307

Adds all the intrinsics used for various conversion builtins that will
be added to altivec.h. These are type conversions between various types of
vectors.

llvm-svn: 286596
2016-11-11 14:41:19 +00:00
NAKAMURA Takumi 8c140e0479 llvm-strings: Fix r286556 to add required libraries.
llvm-svn: 286594
2016-11-11 14:17:37 +00:00
John Brawn 3e0edbf269 Fix test/tools/gold/X86/thinlto_funcimport.ll on non-X86 hosts
Pass -m elf_x86_64 to gold, as is done in other tests.

llvm-svn: 286593
2016-11-11 14:12:15 +00:00
Chad Rosier 10c7aaaee9 [AArch64] Enable merging of adjacent zero stores for all subtargets.
This optimization merges adjacent zero stores into a wider store.

e.g.,

strh wzr, [x0]
strh wzr, [x0, #2]
; becomes
str wzr, [x0]

e.g.,

str wzr, [x0]
str wzr, [x0, #4]
; becomes
str xzr, [x0]

Previously, this was only enabled for Kryo and Cortex-A57.

Differential Revision: https://reviews.llvm.org/D26396

llvm-svn: 286592
2016-11-11 14:10:12 +00:00
Sam Kolton ce0aba74c1 [AMDGPU] TargetStreamer: Fix .note section name
llvm-svn: 286591
2016-11-11 13:41:52 +00:00
Ulrich Weigand a0e7325023 [SystemZ] Support CL(G)T instructions
This adds support for the compare logical and trap (memory)
instructions that were added as part of the miscellaneous
instruction extensions feature with zEC12.

llvm-svn: 286587
2016-11-11 12:48:26 +00:00
Ulrich Weigand 92c2c672e5 [SystemZ] Support load-and-zero-rightmost-byte facility
This adds support for the LZRF/LZRG/LLZRGF instructions that were
added on z13, and uses them for code generation were appropriate.

SystemZDAGToDAGISel::tryRISBGZero is updated again to prefer LLZRGF
over RISBG where both would be possible.

llvm-svn: 286586
2016-11-11 12:46:28 +00:00
Ulrich Weigand 5dc7b67c62 [SystemZ] Use LLGT(R) instructions
This adds support for the 31-to-64-bit zero extension instructions
LLGT and LLGTR and uses them for code generation where appropriate.

Since this operation can also be performed via RISBG, we have to
update SystemZDAGToDAGISel::tryRISBGZero so that we prefer LLGT
over RISBG in case both are possible.  The patch includes some
simplification to the tryRISBGZero code; this is not intended
to cause any (further) functional change in codegen.

llvm-svn: 286585
2016-11-11 12:43:51 +00:00
Simon Pilgrim 807f9cf243 [SelectionDAG] Add support for vector demandedelts in BSWAP opcodes
llvm-svn: 286582
2016-11-11 11:51:29 +00:00
Simon Pilgrim 08dedfc589 [X86] Add knownbits vector BSWAP test
In preparation for demandedelts support

llvm-svn: 286579
2016-11-11 11:33:21 +00:00
Simon Pilgrim 813721e98a [SelectionDAG] Add support for vector demandedelts in UREM/SREM opcodes
llvm-svn: 286578
2016-11-11 11:23:43 +00:00
Simon Pilgrim 8bc531d349 [X86] Add knownbits vector UREM/SREM tests
In preparation for demandedelts support

llvm-svn: 286577
2016-11-11 11:11:40 +00:00
Simon Pilgrim 0652227814 [SelectionDAG] Add support for vector demandedelts in UDIV opcodes
llvm-svn: 286576
2016-11-11 10:47:24 +00:00
Simon Pilgrim da1a43e861 [X86] Add knownbits vector UDIV test
In preparation for demandedelts support

llvm-svn: 286575
2016-11-11 10:39:15 +00:00
Diana Picus 22274934f4 [ARM] Add plumbing for GlobalISel
Add GlobalISel skeleton, up to the point where we can select a ret void.

llvm-svn: 286573
2016-11-11 08:27:37 +00:00
Adam Nemet a6adab268d [opt-viewer] Make it work in the absence of hotness information
In this case the index page is sorted by the source location.

llvm-svn: 286572
2016-11-11 06:11:56 +00:00
Mehdi Amini 48f296059d Fix gold plugin after Error API changes
llvm-svn: 286571
2016-11-11 06:04:30 +00:00
Teresa Johnson 5923864597 Fix examples files to reflect header split in r286566.
I missed these files in examples/

llvm-svn: 286570
2016-11-11 06:02:04 +00:00
Teresa Johnson e5de162e09 Add missing file from r286566
Add the new BitcodeWriter.h header, which was missed in my r286566
commit, and should fix all the bot failures.

llvm-svn: 286569
2016-11-11 05:46:30 +00:00
Teresa Johnson ad17679abd Split Bitcode/ReaderWriter.h into separate reader and writer headers
Summary:
Split ReaderWriter.h which contains the APIs into both the BitReader and
BitWriter libraries into BitcodeReader.h and BitcodeWriter.h.

This is to address Chandler's concern about sharing the same API header
between multiple libraries (BitReader and BitWriter). That concern is
why we create a single bitcode library in our downstream build of clang,
which led to r286297 being reverted as it added a dependency that
created a cycle only when there is a single bitcode library (not two as
in upstream).

Reviewers: mehdi_amini

Subscribers: dlj, mehdi_amini, llvm-commits

Differential Revision: https://reviews.llvm.org/D26502

llvm-svn: 286566
2016-11-11 05:34:58 +00:00
Mandeep Singh Grang e25e6da917 [opt-viewer] PEPify opt-viewer.py
Reviewers: anemet

Subscribers: fhahn

Differential Revision: https://reviews.llvm.org/D26535

llvm-svn: 286564
2016-11-11 04:51:27 +00:00
Mehdi Amini 2aad046165 Fix build failure, update llvm-strings for the new Error API
llvm-svn: 286563
2016-11-11 04:50:18 +00:00
Mehdi Amini c1edf566b9 Prevent at compile time converting from Error::success() to Expected<T>
This would trigger an assertion at runtime otherwise.

Differential Revision: https://reviews.llvm.org/D26482

llvm-svn: 286562
2016-11-11 04:29:25 +00:00
Mehdi Amini 41af43092c Make the Error class constructor protected
This is forcing to use Error::success(), which is in a wide majority
of cases a lot more readable.

Differential Revision: https://reviews.llvm.org/D26481

llvm-svn: 286561
2016-11-11 04:28:40 +00:00
Mehdi Amini e8e98dcb74 CMake: make LLVM_OPTIMIZED_TABLEGEN friendly with LLVM_EXTERNAL_CLANG_SOURCE_DIR
This is need because of clang-tblgen

Differential Revision: https://reviews.llvm.org/D26483

llvm-svn: 286560
2016-11-11 04:27:59 +00:00
Davide Italiano 0970ddb242 [ADT/MathExtras] Make buildbot happy again.
llvm-svn: 286559
2016-11-11 04:03:29 +00:00
Saleem Abdulrasool 2dcea63b4d llvm-strings: explicitly include cctype
Include the cctype header to try to fix windows bots.

llvm-svn: 286558
2016-11-11 04:00:59 +00:00
Saleem Abdulrasool 030ff0f215 llvm-strings: introduce basic strings tool
This is a replacement to binutils' string tool.  It prints strings found in a
binary (object file, executable, or archive library).  It is rather bare and
not functionally equivalent, however, it lays the groundwork necessary for the
strings tool, enabling iterative development of features to reach feature
parity.

llvm-svn: 286556
2016-11-11 03:44:12 +00:00
Davide Italiano 03a856807c [lli] Simplify the code a bit. No functional change intended.
llvm-svn: 286555
2016-11-11 03:07:45 +00:00
Davide Italiano 5e327343f1 [IR/DataLayout] Simplify the code using PowerOf2Ceil. NFCI.
llvm-svn: 286554
2016-11-11 03:00:00 +00:00
Yaxun Liu c5bf4b831d AMDGPU: Attempt to fix build failure on x86-64 selfhost build
Remove redundant include file.

llvm-svn: 286552
2016-11-11 02:48:50 +00:00
Davide Italiano 62ede4e3ac [ADT/MathExtras] Add tests for PowerOf2Floor (previously untested).
llvm-svn: 286551
2016-11-11 02:38:24 +00:00
Sean Fertile e1ca561b0a Add a blank line for a test commit.
llvm-svn: 286550
2016-11-11 02:33:17 +00:00
Davide Italiano 1fb1b9cd00 [ADT/MathExtras] Introduce PowerOf2Ceil.
To be used in lld (and probably somewhere else in llvm).

Differential Revision:  https://reviews.llvm.org/D26538

llvm-svn: 286549
2016-11-11 02:22:16 +00:00
Mandeep Singh Grang 432f3ef887 [llvm] Remove duplicate header from PassInfo.h
Reviewers: mehdi_amini

Differential Revision: https://reviews.llvm.org/D26533

llvm-svn: 286546
2016-11-11 02:01:32 +00:00
Adam Nemet 8e232cacae [opt-viewer] Add column number support
With this the yellow (bubble) part of the remark shows up under the
corresponding expression.

llvm-svn: 286545
2016-11-11 01:51:34 +00:00
Matthias Braun 325cd2c98a ScheduleDAGInstrs: Add condjump deps to addSchedBarrierDeps()
addSchedBarrierDeps() is supposed to add use operands to the ExitSU
node. The current implementation adds uses for calls/barrier instruction
and the MBB live-outs in all other cases. The use
operands of conditional jump instructions were missed.

Also added code to macrofusion to set the latencies between nodes to
zero to avoid problems with the fusing nodes lingering around in the
pending list now.

Differential Revision: https://reviews.llvm.org/D25140

llvm-svn: 286544
2016-11-11 01:34:21 +00:00
Adam Nemet 5bf012baba [opt-viewer] Display inlining context
When a function is inlined, each instance is optimized in their own
inlining context.  This can produce different remarks all pointing to
the same source line.

This adds a new column on the source view to display the inlining
context.

llvm-svn: 286537
2016-11-11 01:25:04 +00:00
Adam Nemet 01823ea2de [opt-viewer] Add option to set source directory
llvm-svn: 286536
2016-11-11 01:08:02 +00:00
Adam Nemet 8efa090661 [opt-viewer] Mention Pygments in the description
llvm-svn: 286535
2016-11-11 01:08:00 +00:00
Adam Nemet ad94840df3 [opt-viewer] Add syntax highlighting
Uses pygments.

llvm-svn: 286532
2016-11-11 00:51:32 +00:00
Stanislav Mekhanoshin 6fc8a1cdaa Revert "[AMDGPU] Allow hoisting of comparisons out of a loop and eliminate condition copies"
This reverts commit r286171, it breaks piglit test fs-discard-exit-2

llvm-svn: 286530
2016-11-11 00:22:34 +00:00
Joerg Sonnenberger 618d475c03 Fix requirements.
llvm-svn: 286527
2016-11-10 23:53:45 +00:00
Matthias Braun f29b12dca8 ScheduleDAGInstrs: Ignore dependencies of constant physregs
There is no need to track dependencies for constant physregs, as they
don't change their value no matter in what order you read/write to them.

Differential Revision: https://reviews.llvm.org/D26221

llvm-svn: 286526
2016-11-10 23:46:44 +00:00
Matthias Braun d67fa9dc6a Timer: Remove group-less NamedRegionTimer constructor.
The NamedRegionTimer initializer without a group name puts the Timer
into the "Misc" group and is (nearly) unused. Remove it.

The only user of this constructor appears to be the HexagonGenInsert pass,
which creates a counter without group to count the complete execution
time of that pass, however since every pass gets a counter by the
PassManager anyway this should be unnecessary. Also removed the
pointless TimerGroup there.

Differential Revision: https://reviews.llvm.org/D25582

llvm-svn: 286524
2016-11-10 23:36:44 +00:00
Evandro Menezes 21f9ce1a0d [DAG Combiner] Fix the native computation of the Newton series for reciprocals
The generic infrastructure to compute the Newton series for reciprocal and
reciprocal square root was conceived to allow a target to compute the series
itself.  However, the original code did not properly consider this condition
if returned by a target.  This patch addresses the issues to allow a target
to compute the series on its own.

Differential revision: https://reviews.llvm.org/D22975

llvm-svn: 286523
2016-11-10 23:31:06 +00:00
Tim Northover c03b5c9c6f GlobalISel: fix mistaken comment change
llvm-svn: 286517
2016-11-10 22:47:38 +00:00
Simon Pilgrim 38f0045cb0 [SelectionDAG] Add support for vector demandedelts in ADD/SUB opcodes
llvm-svn: 286516
2016-11-10 22:41:49 +00:00
Justin Lebar ea27ef6969 [LSR] Tweak loop-strength-reduce-crash test. Test-only change.
Run opt instead of llc, and update the comment.

llvm-svn: 286515
2016-11-10 22:37:13 +00:00
Peter Collingbourne d93620bf4d IR: Introduce inrange attribute on getelementptr indices.
If the inrange keyword is present before any index, loading from or
storing to any pointer derived from the getelementptr has undefined
behavior if the load or store would access memory outside of the bounds of
the element selected by the index marked as inrange.

This can be used, e.g. for alias analysis or to split globals at element
boundaries where beneficial.

As previously proposed on llvm-dev:
http://lists.llvm.org/pipermail/llvm-dev/2016-July/102472.html

Differential Revision: https://reviews.llvm.org/D22793

llvm-svn: 286514
2016-11-10 22:34:55 +00:00
Simon Pilgrim a0dee61df3 [X86] Updated knownbits vector ADD/SUB test
In preparation for demandedelts support

llvm-svn: 286513
2016-11-10 22:34:12 +00:00
Simon Pilgrim 8bbfacaf2c [X86] Add knownbits vector ADD test
llvm-svn: 286511
2016-11-10 22:21:04 +00:00
Matthias Braun 111603f933 ScheduleDAGInstrs: Slightly simplify code; NFC
llvm-svn: 286510
2016-11-10 22:11:00 +00:00
Simon Pilgrim fe3a54371d [SelectionDAG] Add support for splatted vectors in SUB opcode
llvm-svn: 286509
2016-11-10 21:57:42 +00:00
Simon Pilgrim 7e0a4b8fdf [X86] Add knownbits vector SUB test
llvm-svn: 286508
2016-11-10 21:50:23 +00:00
Matthias Braun 9d62c5571b RegisterCoalescer: Ignore interferences for constant physregs
When copying to/from a constant register interferences can be ignored.

Also update the documentation for isConstantPhysReg() to make it more
obvious that this transformation is valid.

Differential Revision: https://reviews.llvm.org/D26106

llvm-svn: 286503
2016-11-10 21:22:47 +00:00
Yaxun Liu d6fbe65040 AMDGPU: Emit runtime metadata as a note element in .note section
Currently runtime metadata is emitted as an ELF section with name .AMDGPU.runtime_metadata.

However there is a standard way to convey vendor specific information about how to run an ELF binary, which is called vendor-specific note element (http://www.netbsd.org/docs/kernel/elf-notes.html).

This patch lets AMDGPU backend emits runtime metadata as a note element in .note section.

Differential Revision: https://reviews.llvm.org/D25781

llvm-svn: 286502
2016-11-10 21:18:49 +00:00
Zachary Turner 805d43a0b8 Fix type ambiguity with std::max
llvm-svn: 286498
2016-11-10 20:35:21 +00:00
Zachary Turner dd594b21a2 Fix initialization order error.
llvm-svn: 286497
2016-11-10 20:23:32 +00:00
Zachary Turner 4a86af07a2 [Support] Improve flexibility of binary blob formatter.
This makes it possible to indent a binary blob by a certain
number of bytes, and also makes some things more idiomatic.
Finally, it integrates this binary blob formatter into ScopedPrinter
which used to have its own implementation of this algorithm.

Differential Revision: https://reviews.llvm.org/D26477

llvm-svn: 286495
2016-11-10 20:16:45 +00:00
Zachary Turner 218ce83f0b [PDB] Begin adding documentation for the PDB file format.
Differential Revision: https://reviews.llvm.org/D26374

llvm-svn: 286491
2016-11-10 19:24:21 +00:00
Adam Nemet 916f445535 [opt-viewer] Avoid duplicated remarks
This can happen if a pass is run multiple times or if the code is in a
header file which is included multiple times.

llvm-svn: 286489
2016-11-10 18:42:56 +00:00
Davide Italiano a22ddddfea [Target] Rename X86/ARM Assembly printer to reflect reality.
This shows up a lot profiling LTO testcases with -time-passes, so
better have a non confusing name.

llvm-svn: 286488
2016-11-10 18:39:31 +00:00
Eugene Zelenko b81f81b9d9 Fix some Clang-tidy modernize-use-default and readability-redundant-member-init and Include What You Use warnings; other minor fixes.
Differential revision: https://reviews.llvm.org/D26087

llvm-svn: 286484
2016-11-10 18:02:34 +00:00
Nico Weber 85740f6b86 Revert r286437 r286438, they caused PR30976
llvm-svn: 286483
2016-11-10 17:55:41 +00:00
Adam Nemet 7da20c39ee [OptDiag] Remove non-printable chars from function name
The r283656 did this in the remark arguments.  We also need to do this
in the main function attribute as that is written to YAML as well.

llvm-svn: 286482
2016-11-10 17:47:03 +00:00
Simon Pilgrim d67af68f06 [SelectionDAG] Add support for vector demandedelts in TRUNCATE opcodes
llvm-svn: 286481
2016-11-10 17:43:52 +00:00
Dehao Chen 5492f8646c Add comments about why we put LoopSink pass at the very late stage.
llvm-svn: 286480
2016-11-10 17:42:18 +00:00
Simon Pilgrim e517f0a417 [X86] Add knownbits vector TRUNC test
In preparation for demandedelts support

llvm-svn: 286477
2016-11-10 17:24:33 +00:00
Teresa Johnson a081145ebd Restore part of "[ThinLTO] Prevent exporting of locals used/defined in module level asm"
This restores the part of r286297 that didn't require adding a
dependency from the Analysis to Object library. There are two parts
to the original fix, and this will address the handling for the case
where locals are used in module level asm.

The part that requires functionality in libObject handles local defs
in module level asm, and was reverted because our downstream build
of clang builds lib/Bitcode into a single library, and this new
dependency introduced a cycle there. I am trying to get that fixed
(see D26502), so for now that change isn't being restored

llvm-svn: 286475
2016-11-10 16:57:32 +00:00
Simon Pilgrim 33fef8e865 Use common SDLoc. NFCI.
llvm-svn: 286473
2016-11-10 16:47:09 +00:00
Simon Pilgrim ee187fd6e7 [SelectionDAG] Add support for vector demandedelts in MUL opcodes
llvm-svn: 286471
2016-11-10 16:27:42 +00:00
Asaf Badouh bb2338e939 reproducer for pr29002
https://reviews.llvm.org/D26449

llvm-svn: 286470
2016-11-10 16:27:27 +00:00
Tom Stellard 115a61560e AMDGPU: Add VI i16 support
Patch By: Wei Ding

Differential Revision: https://reviews.llvm.org/D18049

llvm-svn: 286464
2016-11-10 16:02:37 +00:00
Simon Pilgrim 2cf393c8fe [X86] Add knownbits vector MUL test
In preparation for demandedelts support

llvm-svn: 286463
2016-11-10 15:57:33 +00:00
Simon Pilgrim ca57e53ded [SelectionDAG] Add support for vector demandedelts in SRA opcodes
llvm-svn: 286461
2016-11-10 15:05:09 +00:00
Sanjay Patel 40d33e7554 [InstCombine] auto-generate better checks; NFC
Note that the existing metadata checking was re-added by hand because the 
script doesn't currently know how to generate checks for lines outside of 
functions.

llvm-svn: 286460
2016-11-10 14:58:17 +00:00
Simon Pilgrim 7be6d99442 [X86] Add knownbits vector arithmetic shift test
In preparation for demandedelts support

llvm-svn: 286457
2016-11-10 14:46:24 +00:00
Simon Pilgrim 37c9034bd6 [DAGCombiner] Correctly extract the ConstOrConstSplat shift value for SHL nodes
We were failing to extract a constant splat shift value if the shifted value was being masked.

The (shl (and (setcc) N01CV) N1CV) -> (and (setcc) N01CV<<N1CV) combine was unnecessarily preventing this.

llvm-svn: 286454
2016-11-10 14:35:09 +00:00
Chad Rosier c16824d217 Remove unnecessary check prefix directives. NFC.
llvm-svn: 286453
2016-11-10 14:28:44 +00:00
Simon Pilgrim 87f38fa85c [DAGCombiner] Show missed opportunity to UNDEF out-of-range SHL
Fails to match constant shift value due to presence of AND mask.

llvm-svn: 286452
2016-11-10 14:19:45 +00:00
Tobias Grosser 455b9bd65c [RegionInfo] Add three tests that include infinite loops
These examples are variations that were inspired from a small subgraph taken
from paper.ll which are interesting as they show certain issues with infinite
loops.

llvm-svn: 286450
2016-11-10 13:56:19 +00:00
Simon Pilgrim 3bf99c056a [SelectionDAG] Add support for vector demandedelts in SHL/SRL opcodes
llvm-svn: 286448
2016-11-10 13:52:42 +00:00
Simon Pilgrim ede8ad7c5a [X86] Add knownbits vector logical shift test
In preparation for demandedelts support

llvm-svn: 286447
2016-11-10 13:34:17 +00:00
Oliver Stannard 18ca2adf2d [ARM] Thumb2 LDR (literal) should accept PC as the destination
The version of this instruction with the .w suffix already correctly accepts
this, but the alias without the .w did not.

Differential Revision: https://reviews.llvm.org/D26499

llvm-svn: 286446
2016-11-10 13:20:41 +00:00
Sanjoy Das 3d75b62ffe [SCEVExpander] Hoist unsigned divisons when safe
That is, when the divisor is a constant non-zero.

llvm-svn: 286438
2016-11-10 07:56:12 +00:00
Sanjoy Das e30a281449 [SCEVExpander] Don't hoist divisions
Fixes PR30942.

llvm-svn: 286437
2016-11-10 07:56:09 +00:00
Sanjoy Das 6764b9aa31 Lift out a helper lambda; NFC
llvm-svn: 286436
2016-11-10 07:56:05 +00:00
Craig Topper bd298c37d1 [AVX-512] Allow legacy cvtpd2dq intrinsics to select EVEX encoded instruction when available.
llvm-svn: 286435
2016-11-10 07:47:17 +00:00
Craig Topper e0845d8e8c [AVX-512][X86] Convert avx_cvtt_ps2dq_256 and sse2_cvttps2dq intrinsics to ISD::FP_TO_SINT in the intrinsics table and delete patterns. While nearby also move CVTDQ2PS patterns into their instructions.
This allows these intrinsics to also use EVEX instructons.

llvm-svn: 286434
2016-11-10 07:24:52 +00:00
Craig Topper f37b9b9b5f [X86] Convert int_x86_avx_cvtt_pd2dq_256 to fp_to_sint using the intrinsics table. Removes extra patterns and allows legacy intrinsic to select EVEX encoded instructions when available.
llvm-svn: 286433
2016-11-10 06:45:39 +00:00
Craig Topper 2afed2c790 [X86] Move some custom patterns into the currently empty pattern of their corresponding instructions. NFC
llvm-svn: 286432
2016-11-10 06:45:37 +00:00
Craig Topper 1d2e74f030 [X86] Remove some patterns still referencing int_x86_sse2_cvttpd2dq that should have been removed in r286344. NFC
llvm-svn: 286431
2016-11-10 06:45:34 +00:00
Sanjoy Das 0ae390abce [SCEV] Eta reduce some lambdas; NFC
llvm-svn: 286429
2016-11-10 06:33:54 +00:00
Sanjoy Das 116df1328c [LangRef] Drop "experimental" caveat from operand bundles
I think we're past that point now.

llvm-svn: 286428
2016-11-10 06:21:10 +00:00
Craig Topper 924c5ec472 [AVX-512] Add test cases to show missed opportunities for using VALIGND/Q to handle shuffles.
llvm-svn: 286425
2016-11-10 03:39:19 +00:00
Sanjay Patel 4e1b5a53c7 [InstCombine] avoid infinite loop from shuffle-extract-insert sequence (PR30923)
Removing the limitation in visitInsertElementInst() causes several regressions
because we're not prepared to fold sequences of shuffles or inserts and extracts
separated by shuffles. Fixing that appears to be a difficult mission because we
are purposely trying to avoid creating shuffles with arbitrary shuffle masks
because some targets may choke on those.

https://llvm.org/bugs/show_bug.cgi?id=30923

llvm-svn: 286423
2016-11-10 00:15:14 +00:00
Peter Collingbourne 32ab3a817d Re-apply r286384, "X86: Introduce the "relocImm" ComplexPattern, which represents a relocatable immediate.", with a fix for 32-bit x86.
Teach X86InstrInfo::analyzeCompare() not to crash on CMP and SUB instructions
that take a global address operand.

llvm-svn: 286420
2016-11-09 23:53:43 +00:00
Dylan McKay 0d4778f841 [AVR] Add a selection of CodeGen tests
Summary: This adds all of the CodeGen tests which currently pass.

Reviewers: arsenm, kparzysz

Subscribers: japaric, wdng

Differential Revision: https://reviews.llvm.org/D26388

llvm-svn: 286418
2016-11-09 23:46:52 +00:00
Dylan McKay 3ffc449597 [AVR] Add all of the machine code test suite
Summary: This adds all of the AVR machine code tests.

Reviewers: arsenm, kparzysz

Subscribers: wdng, japaric

Differential Revision: https://reviews.llvm.org/D26387

llvm-svn: 286417
2016-11-09 23:46:25 +00:00
Dehao Chen 38a666d6e5 Add isHotBB helper function to ProfileSummaryInfo
Summary: This will unify all BB hotness checks.

Reviewers: eraman, davidxl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D26353

llvm-svn: 286415
2016-11-09 23:36:02 +00:00
Eli Friedman ddbf83ea14 Preserve assumption cache in loop-rotate.
No testcase included because I can't figure out how to reduce it.
(It's easy to write a testcase where rotation clones an assume,
but that doesn't actually seem to trigger the crash in opt on
its own; maybe an issue with the laziness?)

Differential Revision: https://reviews.llvm.org/D26434

llvm-svn: 286410
2016-11-09 23:05:01 +00:00
Tim Northover 09dd2496b7 GlobalISel: fix typo. NFC
llvm-svn: 286408
2016-11-09 22:40:02 +00:00
Tim Northover a9105be437 GlobalISel: translate invoke and landingpad instructions
Pretty bare-bones support for exception handling (no weird MSVC stuff, no SjLj
etc), but it should get things going.

llvm-svn: 286407
2016-11-09 22:39:54 +00:00
Dehao Chen 06e079a530 Update vectorization debug info unittest.
Summary:
The change will test the change in r286159.
The idea behind the change: Make the dbg location different between loop header and preheader/exit. Originally, dbg location 21 exists in 3 BBs: preheader, header, critical edge (exit). Update the debug location of inside the loop header from !21 to !22 so that it will reflect the correct location.

Reviewers: probinson

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D26428

llvm-svn: 286403
2016-11-09 22:25:19 +00:00
Sanjay Patel 600631daf3 [InstCombine] regenerate checks; NFC
llvm-svn: 286402
2016-11-09 22:21:58 +00:00
Sanjay Patel 16da6c466f [InstCombine] regenerate checks; NFC
llvm-svn: 286399
2016-11-09 21:41:34 +00:00
Davide Italiano b0e067b08d [tools] Unbreak the GCC build (workaround a GCC bug).
../tools/llvm-extract/llvm-extract.cpp: In function ‘int main(int, char**)’:
warning: ISO C++ forbids zero-size array ‘argv’ [-Wpedantic]

GCC reference bug https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61259

llvm-svn: 286396
2016-11-09 21:30:33 +00:00
Mehdi Amini 67d1a41226 Make BitcodeReader::parseIdentificationBlock() robust to EOF
This method is particular: it iterates at the top-level and does
not have an enclosing block.

llvm-svn: 286394
2016-11-09 21:26:49 +00:00
Evgeny Stupachenko c2698cd903 Minor unroll pass refacoring.
Summary:
Unrolled Loop Size calculations moved to a function.
Constant representing number of optimized instructions
 when "back edge" becomes "fall through" replaced with
 variable.
Some comments added.

Reviewers: mzolotukhin

Differential Revision: http://reviews.llvm.org/D21719

From: Evgeny Stupachenko <evstupac@gmail.com>
llvm-svn: 286389
2016-11-09 19:56:39 +00:00
Sanjoy Das 26f28a2836 [Verifier] clang-format a section; NFC
Suggested in D26438 since I'm touching related code.

llvm-svn: 286388
2016-11-09 19:36:39 +00:00
Sanjoy Das 6b46a0d1e8 [SCEV] Refactor out a useful pattern; NFC
llvm-svn: 286386
2016-11-09 18:22:43 +00:00
Peter Collingbourne a9cadeddd4 Revert r286384, "X86: Introduce the "relocImm" ComplexPattern, which represents a relocatable immediate."
Suspected to be the cause of a sanitizer-windows bot failure:
Assertion failed: isImm() && "Wrong MachineOperand accessor", file C:\b\slave\sanitizer-windows\llvm\include\llvm/CodeGen/MachineOperand.h, line 420

llvm-svn: 286385
2016-11-09 18:17:50 +00:00
Peter Collingbourne 4c15db45e4 X86: Introduce the "relocImm" ComplexPattern, which represents a relocatable immediate.
A relocatable immediate is either an immediate operand or an operand that
can be relocated by the linker to an immediate, such as a regular symbol
in non-PIC code.

Start using relocImm for 32-bit and 64-bit MOV instructions, and for operands
of type "imm32_su". Remove a number of now-redundant patterns.

Differential Revision: https://reviews.llvm.org/D25812

llvm-svn: 286384
2016-11-09 17:51:58 +00:00
Krzysztof Parzyszek f817efbbb0 [Hexagon] Silence "sometimes uninitialized" warning in HexagonCopyToCombine
llvm-svn: 286383
2016-11-09 17:50:46 +00:00
Peter Collingbourne 7f00d0a125 Bitcode: Change the materializer interface to return llvm::Error.
Differential Revision: https://reviews.llvm.org/D26439

llvm-svn: 286382
2016-11-09 17:49:19 +00:00
Krzysztof Parzyszek a540997ce4 [Hexagon] Separate Hexagon subreg indices for different register classes
For pairs of 32-bit registers: isub_lo, isub_hi.
For pairs of vector registers: vsub_lo, vsub_hi.

Add generic subreg indices: ps_sub_lo, ps_sub_hi, and a function
  HexagonRegisterInfo::getHexagonSubRegIndex(RegClass, GenericSubreg)
that returns the appropriate subreg index for RegClass.

llvm-svn: 286377
2016-11-09 16:19:08 +00:00
Krzysztof Parzyszek 601d7eb11a [Hexagon] Eliminate Insert4 pseudo-instruction, use combines instead
llvm-svn: 286368
2016-11-09 14:16:29 +00:00
Jonas Paulsson e127fe7083 [SystemZ] A few fixes in scheduler files.
Review: U Weigand
llvm-svn: 286362
2016-11-09 12:47:57 +00:00
Pavel Labath c207bec388 Remove TimeValue usage from Scalar/SROA.cpp. NFC.
llvm-svn: 286361
2016-11-09 12:07:12 +00:00
Pavel Labath 775bbc3736 Zero-initialize chrono duration objects
The default duration constructor does not zero-initialize the object, we need to
do that manually.

llvm-svn: 286359
2016-11-09 11:43:57 +00:00
Pavel Labath 62d72041d4 [dsymutil] Replace TimeValue with TimePoint
Summary:
All changes are pretty straight-forward. I chose to use TimePoints with
second precision, as that is all that seems to be required here.

Reviewers: friss, zturner

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25908

llvm-svn: 286358
2016-11-09 11:43:52 +00:00
Simon Atanasyan 96b4b713fc [mips] Add non-const getter for the Elf_Mips_Options class. NFC
llvm-svn: 286351
2016-11-09 10:14:55 +00:00
Jonas Paulsson 28f29487b9 [MachineScheduler] Comments fixing.
The name/comment of the third argument to the ScheduleDAGMI constructor
is RemoveKillFlags and not IsPostRA. Only the comments are changed.

Review: A Trick
llvm-svn: 286350
2016-11-09 09:59:27 +00:00
Alexandros Lamprineas 0ee3ec2fe4 [ARM] Loop Strength Reduction crashes when targeting ARM or Thumb.
Scalar Evolution asserts when not all the operands of an Add Recurrence
Expression are loop invariants. Loop Strength Reduction should only
create affine Add Recurrences, so that both the start and the step of
the expression are loop invariants.

Differential Revision: https://reviews.llvm.org/D26185

llvm-svn: 286347
2016-11-09 08:53:07 +00:00
Craig Topper f334ac19ad [AVX-512] Add lowering to cvttpd2udq/cvttps2udq for fptoui v2f64/2f32 to 2i32
This patch adds support for fptoui to 2i32 from both 2f64 and 2f32, building on Simon's change for the signed version in r284459 and using AVX-512 instructions.

If we don't have VLX support we need to use a 512-bit operation for v2f64->v2i32 and extract the result.

It also recognises that cvttpd2udq zeroes the upper 64-bits of the xmm result.

Differential Revision: https://reviews.llvm.org/D26331

llvm-svn: 286345
2016-11-09 07:48:51 +00:00
Craig Topper 731bf9c5d6 [X86] Lower AVX512 and SSE intrinsics for CVTTPD2DQ to X86ISD::CVTTPD2DQ.
Summary: This allows the SSE intrinsic to use the EVEX instruction when available. It also fixes EVEX to not use a weird (v4i32 (fp_to_sint v2f64)) node and it merges some isel patterns. This also fixes some cases that weren't combining vzmovl with cvttpd2dq to remove extra moves.

Reviewers: delena, zvi, RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D26330

llvm-svn: 286344
2016-11-09 07:31:32 +00:00
Craig Topper ef1807fb73 [AVX-512] Add more varied alignments to tests for storing the lower 128-bits of a 256 or 512-bit subvector extract.
llvm-svn: 286343
2016-11-09 05:38:47 +00:00
Craig Topper 28e3dfc02b [AVX-512] Use alignedstore256 in patterns that look for stores of the lower 256-bits of a 512-bit vector to use a 256-bit aligned store.
Previously we were only checking for 16 byte alignment instead of 32 byte alignment. Fixes PR30947.

llvm-svn: 286342
2016-11-09 05:31:57 +00:00
Craig Topper abf5041537 [AVX-512] Add test cases to demonstrate PR30947. We accidentally use 32 byte aligned store instructions when the original store was only 16 byte aligned if the store is from the lower bits of a subvector extract.
llvm-svn: 286341
2016-11-09 05:31:53 +00:00
Craig Topper 5c842be9a0 [AVX-512] Make VBMI instruction set enabling imply that the BWI instruction set is also enabled.
Summary:
This is needed to make the v64i8 and v32i16 types legal for the 512-bit VBMI instructions. Fixes PR30912.

Reviewers: delena, zvi

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D26322

llvm-svn: 286339
2016-11-09 04:50:48 +00:00
Dean Michael Berris 0f1ddfa846 [XRay][docs] Fix llvm snippets to be well-formed
llvm-svn: 286330
2016-11-09 02:12:13 +00:00
Mehdi Amini b6a11a7879 Revert "[ThinLTO] Prevent exporting of locals used/defined in module level asm"
This reverts commit r286297.
Introduces a dependency from libAnalysis to libObject, which I missed
during the review.

llvm-svn: 286329
2016-11-09 01:45:13 +00:00
Mehdi Amini 0695e5b916 [doc] Remove explicit CMake version requirement for MSVC
The global minimum one is way past this version.

llvm-svn: 286328
2016-11-09 01:44:42 +00:00
Peter Collingbourne 7576cb0fa7 Bitcode: Remove the remnants of the BitcodeDiagnosticInfo class.
The BitcodeReader no longer produces BitcodeDiagnosticInfo diagnostics.
The only remaining reference was in the gold plugin; the code there has been
dead since we stopped producing InvalidBitcodeSignature error codes in r225562.
While at it remove the InvalidBitcodeSignature error code.

llvm-svn: 286326
2016-11-09 01:09:11 +00:00
Dehao Chen 947dbe1254 Enable Loop Sink pass for functions that has profile.
Summary: For functions with profile data, we are confident that loop sink will be optimal in sinking code.

Reviewers: davidxl, hfinkel

Subscribers: mehdi_amini, mzolotukhin, llvm-commits

Differential Revision: https://reviews.llvm.org/D26155

llvm-svn: 286325
2016-11-09 00:58:19 +00:00
Peter Collingbourne 58f7f0759f Bitcode: Change the BitcodeReader to use llvm::Error internally.
Differential Revision: https://reviews.llvm.org/D26430

llvm-svn: 286323
2016-11-09 00:51:04 +00:00
Dean Michael Berris f3da16bff9 [XRay][Docs] Add documentation for XRay in LLVM
Summary:
This is the initial version of the documentation for how to use XRay as
it stands in LLVM, Clang, and compiler-rt. We leave some room for later
expansion mentioining what is work in progress and what could be
expected moving forward.

We also give a high level overview of future work that's both ongoing
and planned.

Reviewers: echristo, dblaikie, chandlerc

Subscribers: mehdi_amini, llvm-commits

Differential Revision: https://reviews.llvm.org/D26386

llvm-svn: 286319
2016-11-09 00:24:58 +00:00
Sanjay Patel e104554412 [ValueTracking] recognize obfuscated variants of umin/umax
The smallest tests that expose this are codegen tests (because SelectionDAGBuilder::visitSelect() uses matchSelectPattern
to create UMAX/UMIN nodes), but it's also possible to see the effects in IR alone with folds of min/max pairs.

If these were written as unsigned compares in IR, InstCombine canonicalizes the unsigned compares to signed compares. 
Ie, running the optimizer pessimizes the codegen for this case without this patch:

define <4 x i32> @umax_vec(<4 x i32> %x) {
  %cmp = icmp ugt <4 x i32> %x, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>
  %sel = select <4 x i1> %cmp, <4 x i32> %x, <4 x i32> <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>
  ret <4 x i32> %sel
}

$ ./opt umax.ll -S | ./llc -o - -mattr=avx

vpmaxud LCPI0_0(%rip), %xmm0, %xmm0

$ ./opt -instcombine umax.ll -S | ./llc -o - -mattr=avx

vpxor %xmm1, %xmm1, %xmm1
vpcmpgtd  %xmm0, %xmm1, %xmm1
vmovaps LCPI0_0(%rip), %xmm2    ## xmm2 = [2147483647,2147483647,2147483647,2147483647]
vblendvps %xmm1, %xmm0, %xmm2, %xmm0

Differential Revision: https://reviews.llvm.org/D26096

llvm-svn: 286318
2016-11-09 00:24:44 +00:00
Mehdi Amini 03c626568a [cmake] Fix handling compiler-rt in LLVM_ENABLE_PROJECTS by turning any "-" into "_"
llvm-svn: 286317
2016-11-09 00:23:20 +00:00
Greg Clayton bde0a1632b Added the ability to dump hex bytes easily into a raw_ostream.
Unit tests were added to verify this functionality keeps working correctly.

Example output for raw hex bytes:
llvm::ArrayRef<uint8_t> Bytes = ...;
llvm::outs() << format_hex_bytes(Bytes);
554889e5 4881ec70 04000048 8d051002
00004c8d 05fd0100 004c8b0d d0020000

Example output for raw hex bytes with offsets:
llvm::outs() << format_hex_bytes(Bytes, 0x100000d10);
0x0000000100000d10: 554889e5 4881ec70 04000048 8d051002
0x0000000100000d20: 00004c8d 05fd0100 004c8b0d d0020000

Example output for raw hex bytes with ASCII with offsets:
llvm::outs() << format_hex_bytes_with_ascii(Bytes, 0x100000d10);
0x0000000100000d10: 554889e5 4881ec70 04000048 8d051002 |UH.?H.?p...H....|
0x0000000100000d20: 00004c8d 05fd0100 004c8b0d d0020000 |..L..?...L..?...|

The default groups bytes into 4 byte groups, but this can be changed to 1 byte:
llvm::outs() << format_hex_bytes(Bytes, 0x100000d10, 16 /*NumPerLine*/, 1 /*ByteGroupSize*/);
0x0000000100000d10: 55 48 89 e5 48 81 ec 70 04 00 00 48 8d 05 10 02
0x0000000100000d20: 00 00 4c 8d 05 fd 01 00 00 4c 8b 0d d0 02 00 00

llvm::outs() << format_hex_bytes(Bytes, 0x100000d10, 16 /*NumPerLine*/, 2 /*ByteGroupSize*/);
0x0000000100000d10: 5548 89e5 4881 ec70 0400 0048 8d05 1002
0x0000000100000d20: 0000 4c8d 05fd 0100 004c 8b0d d002 0000

llvm::outs() << format_hex_bytes(Bytes, 0x100000d10, 8 /*NumPerLine*/, 1 /*ByteGroupSize*/);
0x0000000100000d10: 55 48 89 e5 48 81 ec 70
0x0000000100000d18: 04 00 00 48 8d 05 10 02
0x0000000100000d20: 00 00 4c 8d 05 fd 01 00
0x0000000100000d28: 00 4c 8b 0d d0 02 00 00

https://reviews.llvm.org/D26405

llvm-svn: 286316
2016-11-09 00:15:54 +00:00
Sanjay Patel 4e9d6cd354 [InstCombine] fix profitability equation for max-of-nots transform
As the test change shows, we can increase the critical path by adding
a 'not' instruction, so make sure that we're actually removing an
instruction if we do this transform.

This transform could also cause us to miss folds of min/max pairs.

llvm-svn: 286315
2016-11-09 00:13:11 +00:00
Sanjay Patel 99dc5feff1 [InstCombine] reduce indentation; NFC
llvm-svn: 286314
2016-11-08 23:49:15 +00:00
Zachary Turner 44728f4014 Fix some size_t / uint32_t ambiguity errors.
llvm-svn: 286305
2016-11-08 22:30:11 +00:00
Zachary Turner 4efa0a4201 [CodeView] Hook up CodeViewRecordIO to type serialization path.
Previously support had been added for using CodeViewRecordIO
to read (deserialize) CodeView type records.  This patch adds
support for writing those same records.  With this patch,
reading and writing of CodeView type records finally uses a single
codepath.

Differential Revision: https://reviews.llvm.org/D26253

llvm-svn: 286304
2016-11-08 22:24:53 +00:00
Adrian Prantl 3502f2089c Emit the DW_AT_type for a C++ static member definition
if it is more specific than the one in its DW_AT_specification.

If a static member is an array, the translation unit containing the
member definition may have a more specific type (including its length)
than TUs only seeing the class declaration. This patch adds a
DW_AT_type to the member's DW_TAG_variable in addition to the
DW_AT_specification in these cases. The member type in the
DW_AT_specification still shows the more generic type (without the
length) to avoid defeating type uniquing.

The DWARF standard discourages “duplicating” a DW_AT_type in a member
variable definition but doesn’t explicitly forbid it.  Having the more
specific type (with the array length) available is what allows the
debugger to print the contents of a static array member variable.

https://reviews.llvm.org/D26368
rdar://problem/28706946

llvm-svn: 286302
2016-11-08 22:11:38 +00:00
David L. Jones e09ae201f2 GlobalISel: make sure debugging variables are appropriately elided in release builds.
Summary:
There are two variables here that break. This change constrains both of them to
debug builds (via DEBUG() or #ifndef NDEBUG).

Reviewers: bkramer, t.p.northover

Subscribers: mehdi_amini, vkalintiris

Differential Revision: https://reviews.llvm.org/D26421

llvm-svn: 286300
2016-11-08 22:03:23 +00:00
Kostya Serebryany b506466a8a [libFuzzer] minor docs update
llvm-svn: 286299
2016-11-08 21:57:37 +00:00
Teresa Johnson 6955feebf3 [ThinLTO] Prevent exporting of locals used/defined in module level asm
Summary:
This patch uses the same approach added for inline asm in r285513 to
similarly prevent promotion/renaming of locals used or defined in module
level asm.

All static global values defined in normal IR and used in module level asm
should be included on either the llvm.used or llvm.compiler.used global.
The former were already being flagged as NoRename in the summary, and
I've simply added llvm.compiler.used values to this handling.

Module level asm may also contain defs of values. We need to prevent
export of any refs to local values defined in module level asm (e.g. a
ref in normal IR), since that also requires renaming/promotion of the
local. To do that, the summary index builder looks at all values in the
module level asm string that are not marked Weak or Global, which is
exactly the set of locals that are defined. A summary is created for
each of these local defs and flagged as NoRename.

This required adding handling to the BitcodeWriter to look at GV
declarations to see if they have a summary (rather than skipping them
all).

Finally, added an assert to IRObjectFile::CollectAsmUndefinedRefs to
ensure that an MCAsmParser is available, otherwise the module asm parse
would silently fail. Initialized the asm parser in the opt tool for use
in testing this fix.

Fixes PR30610.

Reviewers: mehdi_amini

Subscribers: johanengelen, krasin, llvm-commits

Differential Revision: https://reviews.llvm.org/D26146

llvm-svn: 286297
2016-11-08 21:53:35 +00:00
Kuba Brecka a49dcbb743 [asan] Speed up compilation of large C++ stringmaps (tons of allocas) with ASan
This addresses PR30746, <https://llvm.org/bugs/show_bug.cgi?id=30746>. The ASan pass iterates over entry-block instructions and checks each alloca whether it's in NonInstrumentedStaticAllocaVec, which is apparently slow. This patch gathers the instructions to move during visitAllocaInst.

Differential Revision: https://reviews.llvm.org/D26380

llvm-svn: 286296
2016-11-08 21:30:41 +00:00
Andrew Kaylor 9604f34996 [BasicAA] Teach BasicAA to handle the inaccessiblememonly and inaccessiblemem_or_argmemonly attributes
Differential Revision: https://reviews.llvm.org/D26382

llvm-svn: 286294
2016-11-08 21:07:42 +00:00
Matthias Braun c53cbbb1d1 AArch64DeadRegisterDefinitionsPass: Fix Changed flag
Fix a bug in the calculation of the changed flag introduced in r285488.

llvm-svn: 286293
2016-11-08 20:59:03 +00:00
Adrian Prantl 72845a5f4e Use a default constructor. (NFC)
Thanks to David Blaikie for suggesting this.

llvm-svn: 286292
2016-11-08 20:48:38 +00:00
Sanjoy Das 2582e690b7 [TBAA] Drop support for "old style" scalar TBAA tags
Summary:
We've had support for auto upgrading old style scalar TBAA access
metadata tags into the "new" struct path aware TBAA metadata for 3 years
now.  The only way to actually generate old style TBAA was explicitly
through the IRBuilder API.  I think this is a good time for dropping
support for old style scalar TBAA.

I'm not removing support for textual or bitcode upgrade -- if you have
IR with the old style scalar TBAA tags that go through the AsmParser orf
the bitcode parser before LLVM sees them, they will keep working as
usual.

Note:

  %val = load i32, i32* %ptr, !tbaa !N
  !N = < scalar tbaa node >

is equivalent to

  %val = load i32, i32* %ptr, !tbaa !M
  !N = < scalar tbaa node >
  !M = !{!N, !N, 0}

Reviewers: manmanren, chandlerc, sunfish

Subscribers: mcrosier, llvm-commits, mgorny

Differential Revision: https://reviews.llvm.org/D26229

llvm-svn: 286291
2016-11-08 20:46:01 +00:00
Tim Northover 6cddfc14f9 GlobalISel: allow CodeGen to fallback on VReg type/class issues.
After instruction selection we perform some checks on each VReg just before
discarding the type information. These checks were assertions before, but that
breaks the fallback path so this patch moves the logic into the main flow and
reports a better error on failure.

llvm-svn: 286289
2016-11-08 20:39:03 +00:00
Ulrich Weigand 05effca2d8 [SystemZ] Add missing FP extension instructions
This completes assembler / disassembler support for all BFP
instructions provided by the floating-point extensions facility.
The instructions added here are not currently used for codegen.

llvm-svn: 286285
2016-11-08 20:18:41 +00:00
Ulrich Weigand 4006e09d1d [SystemZ] Add program mask and addressing mode instructions
Add several instructions that operate on the program mask
or the addressing mode.  These are not really needed for
code generation under Linux, but are provided for completeness
for the assembler/disassembler.

llvm-svn: 286284
2016-11-08 20:17:02 +00:00
Ulrich Weigand fffc7110d6 [SystemZ] Model access registers as LLVM registers
Add the 16 access registers as LLVM registers.  This allows removing
a lot of special cases in the assembler and disassembler where we
were handling access registers; this can all just use the generic
register code now.

Also add a bunch of instructions to operate on access registers,
for assembler/disassembler use only.  No change in code generation
intended.

llvm-svn: 286283
2016-11-08 20:15:26 +00:00
Davide Italiano 11a871b227 [LoopDistribute] Preserve GlobalsAA also in the new Pass Manager.
Differential Revision:  https://reviews.llvm.org/D26408

llvm-svn: 286280
2016-11-08 19:52:32 +00:00
Eli Friedman 06025cf6c7 Don't store Twine in a local variable.
Fixes post-commit review comment from r286177.

llvm-svn: 286275
2016-11-08 19:43:56 +00:00
Dan Gohman e81021a5cb [WebAssembly] Convert stackified IMPLICIT_DEF into constant 0.
Since IMPLIFIT_DEF instructions are omitted in the output, when the output
of an IMPLICIT_DEF instruction is stackified, the resulting register lacks
an explicit push, leading to a push/pop mismatch. Fix this by converting
such IMPLICIT_DEFs into CONST_I32 0 instructions so that they have explicit
pushes.

llvm-svn: 286274
2016-11-08 19:40:38 +00:00
Ahmed Bougacha 53a03a28c4 [GlobalISel] Dump all instructions inserted by selector.
This is helpful when multiple instructions are inserted.

llvm-svn: 286273
2016-11-08 19:27:13 +00:00
Ahmed Bougacha db273a1272 [GlobalISel] Permit select() to erase.
Erasing reverse_iterators is problematic; iterate manually.
While there, keep track of the range of inserted instructions.
It can miss instructions inserted elsewhere, but those are harder
to track.

Differential Revision: http://reviews.llvm.org/D22924

llvm-svn: 286272
2016-11-08 19:27:10 +00:00
Davide Italiano 1e77aaca8a [LibcallsShrinkWrap] This pass doesn't preserve the CFG.
For example, it invalidates the domtree, causing assertions
in later passes which need dominator infos. Make it preserve
GlobalsAA, as suggested by Eli.

Differential Revision:  https://reviews.llvm.org/D26381

llvm-svn: 286271
2016-11-08 19:18:20 +00:00
Chad Rosier fbc7b7d154 Fix typo in comment. NFC.
llvm-svn: 286270
2016-11-08 19:10:25 +00:00
Michael Kuperstein a73a754adf CODE_OWNERS: Take ownership of the loop vectorizer.
llvm-svn: 286269
2016-11-08 18:44:40 +00:00
Ulrich Weigand 3d07d45089 [SystemZ] Always use semantic instruction classes
Define a couple of additional semantic classes and use them
throughout the .td files to make them more consistent and
more easily readable.

No functional change.

llvm-svn: 286268
2016-11-08 18:37:48 +00:00
Ulrich Weigand bfcfa0e207 [SystemZ] Refactor InstRR* instruction format patterns
This changes the InstRR (and related) patterns to no longer
automatically add an "r" at the end of the mnemonic.  This
makes the .td files more obviously understandable, and also
allows using the patterns for those few instructions that
do not follow the *r scheme.

Also add some more sub-formats of the RRF format class, to
match operand names and sequence from the PoP better.

No functional change.

llvm-svn: 286267
2016-11-08 18:36:31 +00:00
Ulrich Weigand 37bd451a55 [SystemZ] Rename some Inst* instruction format classes
Now that we've added instruction format subclasses like
InstRIb, it makes sense to rename the old InstRI to InstRIa.

Similar for InstRX, InstRXY, InstRS, InstRSY, and InstSS.

No functional change.

llvm-svn: 286266
2016-11-08 18:32:50 +00:00
Nirav Dave e833c6c61a [MC][AArch64] Cleanup end-of-line parsing in AArch64 AsmParser.
Reviewers: t.p.northover, rengolin

Subscribers: llvm-commits, aemerson

Differential Revision: https://reviews.llvm.org/D26309

llvm-svn: 286265
2016-11-08 18:31:04 +00:00
Ulrich Weigand d2148caffc [SystemZ] Refactor branch and conditional instruction patterns
Rework patterns for branches, call & return instructions,
compare-and-branch, compare-and-trap, and conditional move
instructions.

In particular, simplify creation of patterns for the extended
opcodes of instructions that take a CC mask.

Also, use semantical instruction classes for all the instructions
instead of open-coding them in SystemZInstrInfo.td.

Adds a couple of the basic branch instructions (that are unused
for codegen) for the assembler/disassembler.

llvm-svn: 286263
2016-11-08 18:30:50 +00:00