Commit Graph

94 Commits

Author SHA1 Message Date
Alexander Yermolovich 210bb04e23 [BOLT][DWARF] Remove patchLowHigh unused function.
Cleanup after removing caching mechanims for ranges/abbrevs.

Reviewed By: rafauler, yota9

Differential Revision: https://reviews.llvm.org/D120174
2022-02-22 13:28:15 -08:00
Amir Ayupov d44f99c748 [BOLT] Added fuzzer target (llvm-bolt-fuzzer)
This adds a target that would consume random binary as an
input ELF file.
TBD: add structured input support (ELF).

Build:
```
cmake /path/to/llvm-project/llvm -GNinja \
-DLLVM_TARGETS_TO_BUILD="X86;AArch64" \
-DCMAKE_BUILD_TYPE=Release \
-DLLVM_ENABLE_ASSERTIONS=1 \
-DCMAKE_C_COMPILER=<sanitizer-capable clang> \
-DCMAKE_CXX_COMPILER=<sanitizer-capable clang++> \
-DLLVM_ENABLE_PROJECTS="bolt"  \
-DLLVM_USE_SANITIZER=Address \
-DLLVM_USE_SANITIZE_COVERAGE=On
ninja llvm-bolt-fuzzer
```

Test Plan: ninja llvm-bolt-fuzzer

Reviewed By: maksfb

Differential Revision: https://reviews.llvm.org/D120016
2022-02-20 17:24:16 -08:00
Amir Ayupov 36ada32727 [BOLT][NFC] Fix data race in ShrinkWrapping stats
Fix data race reported by ThreadSanitizer in clang.test:
```
ThreadSanitizer: data race /data/llvm-project/bolt/lib/Passes/ShrinkWrapping.cpp:1359:28
in llvm::bolt::ShrinkWrapping::moveSaveRestores()
```

The issue is with incrementing global counters from multiple threads.

Reviewed By: yota9

Differential Revision: https://reviews.llvm.org/D120218
2022-02-20 17:21:58 -08:00
Amir Ayupov 32d2473a5d [BOLT][NFC] Report errors from createBinaryContext and RewriteInstance ctor
Refactor createBinaryContext and RewriteInstance/MachORewriteInstance
constructors to report an error in a library and fuzzer-friendly way instead of
returning a nullptr or exiting.

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D119658
2022-02-17 00:50:52 -08:00
Vladislav Khmelevsky 729d29e167 [BOLT] Update dynamic relocations from section relocations
This patch changes patchELFAllocatableRelaSections from going through
old relocations sections and update the relocation offsets to emitting
the relocations stored in binary sections. This is needed in case we
would like to remove and add dynamic relocations during BOLT work and it
is used by golang support pass. Note: Currently we emit relocations in
the old sections, so the total number of them should be equal or less
of old number.

Testing: No special tests are neeeded, since this patch does not fix
anything or add new functionality (it only prepares to add). Every
PIC-compiled test binary will use this code and thus become a test.
But just in case the aarch64 dynamic relocations tests were added.

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

Reviewed By: maksfb

Differential Revision: https://reviews.llvm.org/D117612
2022-02-16 18:40:54 +03:00
Shao-Ce SUN 2aed07e96c [NFC][MC] remove unused argument `MCRegisterInfo` in `MCCodeEmitter`
Reviewed By: skan

Differential Revision: https://reviews.llvm.org/D119846
2022-02-16 13:10:09 +08:00
Shao-Ce SUN 9cc49c1951 Revert "[NFC][MC] remove unused argument `MCRegisterInfo` in `MCCodeEmitter`"
This reverts commit fe25c06cc5.
2022-02-16 11:57:49 +08:00
Shao-Ce SUN fe25c06cc5 [NFC][MC] remove unused argument `MCRegisterInfo` in `MCCodeEmitter`
For ten years, it seems that `MCRegisterInfo` is not used by any target.

Reviewed By: skan

Differential Revision: https://reviews.llvm.org/D119846
2022-02-16 11:47:17 +08:00
Alexander Yermolovich bd1ebe9d04 [BOLT][DWARF] Add ability to insert new entries in to DIE
Added ability to append new entries to DIE. This is useful to standadize DWARF4
Split Dwarf, and simplify implementation of DWARF5.
Multiple DIEs can share an abbrev. So currently limitation is that only unique
Attributes can be added.

Reviewed By: maksfb

Differential Revision: https://reviews.llvm.org/D119577
2022-02-15 18:07:19 -08:00
serge-sans-paille 290e482342 Cleanup LLVMDWARFDebugInfo
As usual with that header cleanup series, some implicit dependencies now need to
be explicit:

llvm/DebugInfo/DWARF/DWARFContext.h no longer includes:
- "llvm/DebugInfo/DWARF/DWARFAcceleratorTable.h"
- "llvm/DebugInfo/DWARF/DWARFCompileUnit.h"
- "llvm/DebugInfo/DWARF/DWARFDebugAbbrev.h"
- "llvm/DebugInfo/DWARF/DWARFDebugAranges.h"
- "llvm/DebugInfo/DWARF/DWARFDebugFrame.h"
- "llvm/DebugInfo/DWARF/DWARFDebugLoc.h"
- "llvm/DebugInfo/DWARF/DWARFDebugMacro.h"
- "llvm/DebugInfo/DWARF/DWARFGdbIndex.h"
- "llvm/DebugInfo/DWARF/DWARFSection.h"
- "llvm/DebugInfo/DWARF/DWARFTypeUnit.h"
- "llvm/DebugInfo/DWARF/DWARFUnitIndex.h"

Plus llvm/Support/Errc.h not included by a bunch of llvm/DebugInfo/DWARF/DWARF*.h files

Preprocessed lines to build llvm on my setup:
after: 1065629059
before: 1066621848

Which is a great diff!

Discourse thread: https://discourse.llvm.org/t/include-what-you-use-include-cleanup
Differential Revision: https://reviews.llvm.org/D119723
2022-02-15 09:16:03 +01:00
Maksim Panchenko 5a343994c3 [BOLT] Make order of jump table successors deterministic
When a jump table is recovered in postProcessIndirectBranches(),
successors for the containing basic block are added in random order.
Make the order deterministic.

Reviewed By: yota9

Differential Revision: https://reviews.llvm.org/D119672
2022-02-14 10:37:20 -08:00
Maksim Panchenko 641e92d46b [BOLT] Skip warning message if no functions were ignored
Reviewed By: yota9, Amir

Differential Revision: https://reviews.llvm.org/D119673
2022-02-14 10:31:43 -08:00
serge-sans-paille 57f7c7d90e Add missing MC includes in bolt/
Changes needed after ef736a1c39 that removes some implicit
dependencies from MrCV headers.
2022-02-09 08:28:34 -05:00
Alexander Yermolovich 0d9921daad [BOLT][DWARF] Remove caching of ranges/abbrevs
Removing caching of ranges/abbrevs to simplify the code.
Before we were doing it to get around a gdb limitation.
FBD34015613

Reviewed By: Amir, maksfb

Differential Revision: https://reviews.llvm.org/D119276
2022-02-08 16:37:40 -08:00
Vladislav Khmelevsky 19fb5a210d [BOLT] Add aarch64 support for peephole passes
Enable peephole optimizations for aarch64.
Also small code refactoring - add PeepholeOpts under Peepholes class.

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

Differential Revision: https://reviews.llvm.org/D118732
2022-02-08 03:04:40 +03:00
Vladislav Khmelevsky 5c2ae5f454 [BOLT] Refactor heatmap to be standalone tool
Separate heatmap from bolt and build it as standalone tool.

Reviewed By: maksfb

Differential Revision: https://reviews.llvm.org/D118946
2022-02-07 22:00:44 +03:00
Amir Ayupov 194b164eb5 [BOLT][NFC] Fix compiler warnings
Summary:
- variable 'TotalSize' set but not used
- variable 'TotalCallsTopN' set but not used
- use of bitwise '|' with boolean operands

Reviewed By: maksfb

FBD33911129
2022-02-04 15:57:33 -08:00
Amir Ayupov 167b623a6a [BOLT][NFC] Use isInt<> instead of range checks
Summary: Reuse LLVM isInt check

Reviewed By: maksfb

FBD33945182
2022-02-02 20:32:05 -08:00
Alexander Yermolovich 9f3f9d19c7 [BOLT][DWARF] Handle shared abbrev section
We can have a scenario where multiple CUs share an abbrev table.
We modify or don't modify one CU, which leads to other CUs having invalid abbrev section.
Example that caused it.
All of CUs shared the same abbrev table. First CU just had compile_unit and sub_program.
It was not modified. Next CU had DW_TAG_lexical_block with
DW_AT_low_pc/DW_AT_high_pc converted to DW_AT_low_pc/DW_AT_ranges.
We used unmodified abbrev section for first and subsequent CUs.
So when parsing subsequent CUs debug info was corrupted.

In this patch we will now duplicate all sections that are modified and are different.
This also means that if .debug_types is present and it shares Abbrev table, and
they usually are, we now can have two Abbrev tables. One for CU that was modified,
and unmodified one for TU.

Reviewed By: maksfb

Differential Revision: https://reviews.llvm.org/D118517
2022-01-31 11:10:23 -08:00
Vladislav Khmelevsky e900f0584e [BOLT] Fix AARCH64 registers aliasing
The aarch64 platform has special registers like X0_X1_X2_X3_X4_X5_X6_X7.
Using the downwards propagation this register will become a super
register for all X0..X7 and its super registers which is not right. This
patch replaces the downwards propagation with caching all the aliases using MCRegAliasIterator.

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

Reviewed By: maksfb

Differential Revision: https://reviews.llvm.org/D117394
2022-01-28 01:24:35 +03:00
Alexander Yermolovich 612f0f4568 [BOLT][DWARF] Fix gdb index section
Since we now re-write .debug_info the DWARF CU Offsets can change.
Just like for .debug_aranges the GDB Index will need to be updated.

Reviewed By: Amir, maksfb

Differential Revision: https://reviews.llvm.org/D118273
2022-01-27 12:07:58 -08:00
Vladislav Khmelevsky 20e9d4caf0 [BOLT] Prepare BOLT for unit-testing
This patch adds unit testing support for BOLT. In order to do this we will need at least do this changes on the code level:
* Make createMCPlusBuilder accessible externally
* Remove positional InputFilename argument to bolt utlity sources
And prepare the cmake and lit for the new tests.

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

Reviewed By: maksfb, Amir

Differential Revision: https://reviews.llvm.org/D118271
2022-01-27 00:22:13 +03:00
Amir Ayupov f8c7fb499b [BOLT][NFC] Reduce includes with include-what-you-use
Summary: Removed redundant includes with IWYU

Test Plan: ninja bolt

Reviewers: maksfb

FBD32043568
2022-01-21 12:05:47 -08:00
Amir Ayupov 5a654b0113 [BOLT] Make ICP target selection (more) deterministic
Summary: Break ties by selecting targets with lower addresses.

Reviewers: maksfb

FBD33677001
2022-01-21 12:03:43 -08:00
Amir Ayupov f18fcdabda [BOLT][NFC] Expand auto types pt.2
Summary: Expand autos where it may lead to differences in the BOLT binary.

Test Plan: NFC

Reviewers: maksfb

Reviewed By: maks

FBD27673231
2022-01-21 12:02:57 -08:00
Vladislav Khmelevsky bb8e7ebaad [BOLT] Remove unreachable uncond branch after return
This patch fixes the removal of unreachable uncondtional branch located
after return instruction.

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

Reviewed By: Amir

Differential Revision: https://reviews.llvm.org/D117677
2022-01-19 22:06:26 +03:00
Amir Ayupov a9cd49d50e [BOLT][NFC] Move Offset annotation to Group 1
Summary:
Move the annotation to avoid dynamic memory allocations.
Improves the CPU time of instrumenting a large binary by 1% (+-0.8%, p-value 0.01)

Test Plan: NFC

Reviewers: maksfb

FBD30091656
2022-01-18 13:24:50 -08:00
Vladislav Khmelevsky ad4e26833f updateDWARFObjectAddressRanges: nullify low pc
In case the case the DW_AT_ranges tag already exists for the object the
low pc values won't be updated and will be incorrect in
after-bolt binaries.

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

Differential Revision: https://reviews.llvm.org/D117216
2022-01-18 22:37:29 +03:00
Alexander Yermolovich ea6c8b013e [BOLT][DWARF] Reduce overhead for sized dealloc
This is a follow up to Fix size mismatch error with jemalloc.
4243b6582c
Although that fix works it increased memory footprint.
With this patch we go back to original memory footprint.

Reviewed By: maksfb

Differential Revision: https://reviews.llvm.org/D117341
2022-01-14 17:32:48 -08:00
Amir Ayupov 29fe14c78d [BOLT][NFC] Remove redundant dependent template type
Summary:
Reduce code size by removing redundant dependent template type
from RewriteInstance methods.

Code size savings (via bloaty on llvm-bolt Debug build):
```
symbol,vmsize,filesize -> vmsize,filesize (delta vmsize,filesize)
updateELFSymbolTable         57096,59600 -> 56656,59048 (440,552)
updateELFSymbolTable::lambda 35957,55277 -> 35949,54485   (8,792)
getOutputSections            20592,21440 -> 20372,21156 (220,284)
getOutputSections::lambda      1792,5300 ->   1792,5372   (0,-72)

total delta (668,1556)
```

Reviewed By: maksfb

FBD33589393
2022-01-14 15:47:15 -08:00
Amir Ayupov c34adaa3ca [BOLT][CMAKE] Use IN_LIST check
Summary:
Address @smeenai feedback https://reviews.llvm.org/D117061#inline-1122106:
>CMake has if(IN_LIST) now, which you can use instead of the string(FIND)

IN_LIST is available since CMake 3.3 released in 2015.

Reviewed By: smeenai

FBD33590959
2022-01-14 15:47:14 -08:00
Vladislav Khmelevsky fb3b86fedc [BOLT][DWARF] Fix high pc patching
The DW_FORM_addr form of highPC address is written in absolute addres,
the data form is written in offset-from-low pc format.

Due to the large test binary the test is prepared separately in
https://github.com/rafaelauler/bolt-tests/pull/8

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

Reviewed By: ayermolo

Differential Revision: https://reviews.llvm.org/D117217
2022-01-15 01:05:16 +03:00
Amir Ayupov d914486a9a [BOLT][NFC] Refactor reset-release to move assignment
Summary:
Follow the clang-tidy suggestion to replace reset-release with move assignment.

Move assignment's effect for unique_ptr:
> Effects: Transfers ownership from `u` to `*this` as if by calling `reset(u.release())`
followed by an assignment from `std::forward<D>(u.get_deleter())`.
2022-01-13 22:47:15 -08:00
Amir Ayupov 18bc405a09 [BOLT][NFC] Remove uses of `std::vector<bool>`
Summary:
LLVM Programmer’s Manual strongly discourages the use of `std::vector<bool>`
and suggests `llvm::BitVector` as a possible replacement.
2022-01-13 22:46:34 -08:00
Amir Ayupov b1a107db56 [BOLT][NFC] Format braced initializer lists
Summary:
Use assignment (`=`) with braced initializer lists when constructing
aggregate temporaries in expressions.

https://llvm.org/docs/CodingStandards.html#braced-initializer-lists

(cherry picked from FBD33515669)
2022-01-10 12:45:55 -08:00
Maksim Panchenko 8aab58ba65 [BOLT][NFC] Refactor AArch64MCPlusBuilder
Summary: Selectively apply clang-format to the code in AArch64MCPlusBuilder.cpp.

(cherry picked from FBD33495653)
2022-01-08 18:17:31 -08:00
Maksim Panchenko 82278a8f29 [BOLT][NFC] Refactor X86MCPlusBuilder
Summary:
Selectively apply clang-format and other minor refactoring to the code
in X86MCPlusBuilder.cpp

(cherry picked from FBD33495550)
2022-01-08 17:48:33 -08:00
Amir Ayupov 799cbbb797 [BOLT][NFC] Reuse X86BaseInfo interfaces for macrofusion checks
Summary:
Remove X86MCPlusBuilder code that duplicates checks in X86BaseInfo.
Remove isINC and isDEC as redundant.

The new code of `X86MCPlusBuilder::isMacroOpFusionPair` is functionally
equivalent to `X86AsmBackend::isMacroFused`. However, as the method is
declared/defined in X86AsmBackend.cpp and not exported in a header file,
there's no way to use it in BOLT without changes in LLVM code.

(cherry picked from FBD33440373)
2022-01-05 15:58:01 -08:00
Amir Ayupov 1d3c150748 [BOLT] Remove ineligible macro-fusion patterns
Summary:
Remove patterns ineligible for macro-fusion:
- First instruction has a memory destination

This is a temporary commit to align BOLT with LLVM MC interfaces.
(cherry picked from FBD33479340)
2022-01-07 09:40:04 -08:00
Maksim Panchenko 330c8e42ab [BOLT][NFC] Refactor command line options in BinaryPassManager
Summary:
Reformat code and put options in lexicographical order.

Comparing to clang-format output, manual formatting looks cleaner to me.

(cherry picked from FBD33481692)
2022-01-07 11:36:22 -08:00
Alexander Yermolovich e579f5c6e7 [BOLT][DWARF] Fix race conditions for debug fission in non-deterministic mode
Summary: Adding mutexes to avoid runtime race conditions.

(cherry picked from FBD33439854)
2022-01-05 15:27:21 -08:00
Maksim Panchenko bc9032c7fa [BOLT][NFC] Use uniform DEBUG_TYPE for MCPlus builders
(cherry picked from FBD33435121)
2022-01-05 12:02:54 -08:00
Maksim Panchenko df288e8487 [BOLT][NFC] Refactor if statements in RewriteInstance
(cherry picked from FBD33341796)
2021-12-28 13:46:45 -08:00
Alexander Yermolovich 6b89327deb [BOLT][DWARF] Handling more data formats for DW_AT_high_pc
Summary:
Adding support for DW_FORM_data_2, DW_FORM_data_1, DW_FORM_udata.
With new .debug_info code only need to modify the check.

(cherry picked from FBD33302731)
2021-12-23 14:49:14 -08:00
Alexander Yermolovich 9bf7a73787 [BOLT][DWARF] Change convertToRanges to not use indirect
Summary:
Now that we are re-writing .debug_info we are not longer restricted to have same size patches.
Simplifying logic to use direct forms.

(cherry picked from FBD32971159)
2021-12-07 17:35:12 -08:00
Amir Ayupov 6bb26fcb20 [BOLT] removeAllSuccessors: handle multiple edges between basic blocks
Summary:
If `addUnknownControlFlow` in `BinaryFunction::postProcessIndirectBranches`
is invoked with a basic block that has multiple edges to the same successor,
it leads to an assertion in `BinaryBasicBlock::removePredecessor`.

For basic blocks with multiple edges to the same successor, the default
behavior of removePredecessor is to remove all occurrences of the
predecessor block in its predecessor list (Multiple=true).

Example:
```A -> B (two edges)

A->removeAllSuccessors()
  for each successor of block A: // B twice
  // this removes both occurrences of A in B's predecessors list
  B->removePredecessor(A);
  // this invocation triggers an assert as A is no longer in B's
  // predecessor list
  B->removePredecessor(A);
```
This issue is not fixed by NormalizeCFG as `removeAllSuccessor` is called
earlier (from `buildCFG` -> `postProcessIndirectBranches`).

Solve this issue by collecting the successors into a set (`SmallPtrSet`) first,
before invoking `SuccessorBB->removePredecessor(this)`.

GitHub issue: https://github.com/facebookincubator/BOLT/issues/187

(cherry picked from FBD30796979)
2021-09-07 16:58:19 -07:00
Alexander Yermolovich 1c2f4bbe99 [BOLT] Rewrite of .debug_info section
Summary:
Changed the behavior of how we handle .debug_info section.
Instead of patching it will now rewrite it.
With this approach we are no longer constrained to having new values
 of the same size.
It handles re-writing by treating .debug_info as raw data.
It copies chunks of data between patches, with new data written in
 between.

(cherry picked from FBD32519952)
2021-11-15 17:19:24 -08:00
Amir Ayupov 883bf0e83d [BOLT][NFC] Fix braces usage in the rest of the codebase
Summary:
Refactor remaining bolt sources to follow the braces rule for if/else/loop from
[LLVM Coding Standards](https://llvm.org/docs/CodingStandards.html).

(cherry picked from FBD33345885)
2021-12-28 18:43:53 -08:00
Amir Ayupov def464aaae [BOLT][NFC] Fix braces usage in Profile
Summary:
Refactor bolt/*/Profile to follow the braces rule for if/else/loop from
[LLVM Coding Standards](https://llvm.org/docs/CodingStandards.html).

(cherry picked from FBD33345741)
2021-12-28 18:29:54 -08:00
Amir Ayupov 89ceb77997 [BOLT][NFC] Fix braces usage in Target
Summary:
Refactor bolt/lib/Target to follow the braces rule for if/else/loop from
[LLVM Coding Standards](https://llvm.org/docs/CodingStandards.html).

(cherry picked from FBD33345353)
2021-12-28 17:52:08 -08:00