Commit Graph

103359 Commits

Author SHA1 Message Date
Jonathan Roelofs 7005e347a2 Fix broken build
ARM64 backend was missing a required_library entry.

llvm-svn: 208437
2014-05-09 18:06:22 +00:00
Louis Gerbarg 3342bf1451 Add custom lowering for add/sub with overflow intrinsics to ARM
This patch adds support to ARM for custom lowering of the
llvm.{u|s}add.with.overflow.i32 intrinsics for i32/i64. This is particularly useful
for handling idiomatic saturating math functions as generated by
InstCombineCompare.

Test cases included.

rdar://14853450

llvm-svn: 208435
2014-05-09 17:02:49 +00:00
Louis Gerbarg 1f54b82164 Add ExtractValue instruction to SimplifyCFG's ComputeSpeculationCost
Since ExtractValue is not included in ComputeSpeculationCost CFGs containing
ExtractValueInsts cannot be simplified. In particular this interacts with
InstCombineCompare's tendency to insert add.with.overflow intrinsics for
certain idiomatic math operations, preventing optimization.

This patch adds ExtractValue to the ComputeSpeculationCost. Test case included

rdar://14853450

llvm-svn: 208434
2014-05-09 17:02:46 +00:00
Tom Stellard 4c00b52e1a R600/SI: Teach SIInstrInfo::moveToVALU() how to move S_LOAD_*_IMM instructions
llvm-svn: 208432
2014-05-09 16:42:22 +00:00
Tom Stellard d6cb8e8efd R600/SI: Fix SMRD pattern for offsets > 32 bits
We were dropping the high bits of 64-bit immediate offsets.

llvm-svn: 208431
2014-05-09 16:42:21 +00:00
Tom Stellard a2acad785a R600: Expand i64 SELECT_CC
llvm-svn: 208430
2014-05-09 16:42:19 +00:00
Tom Stellard afa8b532b1 R600: Move MIN/MAX matching from LowerOperation() to PerformDAGCombine()
llvm-svn: 208429
2014-05-09 16:42:16 +00:00
James Molloy dd1aa14a21 Attempt to pacify the bots - this commit requires asserts.
llvm-svn: 208424
2014-05-09 16:20:53 +00:00
Rafael Espindola fc13db477a Use auto and clang-format this snippet.
llvm-svn: 208421
2014-05-09 16:01:06 +00:00
Rafael Espindola b2ea33975f Run clang-format in small sections of code to make a patch easier to read.
llvm-svn: 208419
2014-05-09 15:49:02 +00:00
Rafael Espindola ed6dc3730a Delete trailing whitespace.
llvm-svn: 208416
2014-05-09 14:39:25 +00:00
Rafael Espindola a03c599666 Delete trailing white space.
llvm-svn: 208415
2014-05-09 14:31:07 +00:00
Daniel Sanders e57d866ed0 [mips] Marked up instructions added in MIPS-IV and tested that IAS for -mcpu=mips[123] does not accept them
Summary:
This required a new instruction group representing the 32-bit subset of
MIPS-IV that was available in MIPS32

A small number of instructions are correctly rejected but with the wrong error
message. These have been placed in a separate test for now.

Depends on D3676

Reviewers: vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3677

llvm-svn: 208414
2014-05-09 14:06:17 +00:00
Oliver Stannard c24f2171ca ARM: HFAs must be passed in consecutive registers
When using the ARM AAPCS, HFAs (Homogeneous Floating-point Aggregates) must
be passed in a block of consecutive floating-point registers, or on the stack.
This means that unused floating-point registers cannot be back-filled with
part of an HFA, however this can currently happen. This patch, along with the
corresponding clang patch (http://reviews.llvm.org/D3083) prevents this.

llvm-svn: 208413
2014-05-09 14:01:47 +00:00
Simon Atanasyan d6a20e5115 [yaml2obj] Follow-up to the r208228 and r208406. Remove duplicated YAML
map keys.

llvm-svn: 208412
2014-05-09 13:57:33 +00:00
Rafael Espindola 9ad68a908f Remove trailing white space.
llvm-svn: 208411
2014-05-09 13:54:40 +00:00
Daniel Sanders 395b8181ec [mips] Remove unused CondMov feature bit
Summary:
No functional change

Depends on D3675

Reviewers: vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3676

llvm-svn: 208410
2014-05-09 13:15:07 +00:00
Daniel Sanders f2056bef32 [mips] Marked up instructions added in MIPS-III and tested that IAS for -mcpu=mips[12] does not accept them
Summary:
This required a new instruction group representing the 32-bit subset of
MIPS-III that was available in MIPS32

A small number of instructions are correctly rejected but with the wrong error
message. These have been placed in a separate test for now.

There's some obvious InstAlias's that ought to be marked MIPS-III but arent.
This is because they are not currently tested. I intend to catch these with
a final pass through the tablegen records to find tablegen records without
ISA annotations.

Depends on D3674

Reviewers: vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3675

llvm-svn: 208408
2014-05-09 13:02:27 +00:00
NAKAMURA Takumi f50871f460 Mark yaml2obj-elf-x86-rel.yaml as XFAIL:vg_leak for now. This has two pairs of duplicate hashes.
llvm-svn: 208406
2014-05-09 11:24:18 +00:00
Andrea Di Biagio 932ff1ddd7 Fix 80 col violation.
No functional change intended.

llvm-svn: 208405
2014-05-09 11:08:23 +00:00
Benjamin Kramer 8bbadc0383 [asan] Stop leaking X86Operands.
llvm-svn: 208400
2014-05-09 09:48:03 +00:00
Daniel Sanders b7f1c6ff3e [mips][mips64r6] Add experimental support for MIPS32r6 and MIPS64r6
Summary:
Adds MIPS32r6/MIPS64r6 and checks the compatibility requirements for these
processors.

I've also included comments to describe removed and re-encoded instructions,
along with placeholder def's for the new instructions but there are no
functional changes to codegen at this point.

Reviewers: jkolek, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3622

llvm-svn: 208399
2014-05-09 09:46:21 +00:00
Daniel Sanders f075173127 [mips] Added missing daddu test to the valid instruction tests.
Summary: Depends on D3673

Reviewers: vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3674

llvm-svn: 208398
2014-05-09 09:32:01 +00:00
Daniel Sanders 52bdd651e5 [mips] Added missing dsra -> dsrav and sra -> srav aliases.
Summary: dsll, dsrl, sll, and srl already exist.

Reviewers: vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3673

llvm-svn: 208397
2014-05-09 09:24:49 +00:00
Alp Toker c7bd4d24d9 MemoryBuffer: don't force mmap when stat fails
Fix error handling introduced in r127426 that could result in MemoryBuffers not
having null termination.

llvm-svn: 208396
2014-05-09 08:57:32 +00:00
Alp Toker bf8960301d MemoryBuffer: remove unusued definitions
These were made redundant back in r186560.

llvm-svn: 208395
2014-05-09 08:57:06 +00:00
NAKAMURA Takumi 370d5f808a test/TableGen: Remove XFAIL:vg_leak out of 3 tests corresponding to r208293.
llvm-svn: 208393
2014-05-09 08:18:33 +00:00
Rafael Espindola 3d7c778d6d Don't indent inside a namespace. Don't duplicate a function name in comment.
llvm-svn: 208389
2014-05-09 02:56:16 +00:00
David Blaikie 194c7d9f94 Remove use of = default/= delete as they're unsupported on MSVC2012
llvm-svn: 208388
2014-05-09 02:26:36 +00:00
Saleem Abdulrasool 40bca0afab ARM: support PIC on Windows on ARM
Handle lowering of global addresses for PIC mode compilation on Windows.  Always
use the movw/movt load to load the address as Windows on ARM requires ARMv7+ and
is a pure Thumb environment.

llvm-svn: 208385
2014-05-09 00:58:32 +00:00
Nick Lewycky ad1b3d1de5 printCustom is only used in PseudoSourceValue, remove it from Value.
llvm-svn: 208383
2014-05-09 00:49:03 +00:00
Rafael Espindola 529c8462dd Add missing linkage predicates.
llvm-svn: 208379
2014-05-09 00:36:18 +00:00
Lang Hames f35553e90a [RuntimeDyld] Unify the RuntimeDyldMachO resolve.*Relocation method signatures
around RelocationEntries, rather than passing the same information via loose
arguments.

No functional change.

llvm-svn: 208375
2014-05-09 00:11:18 +00:00
Filipe Cabecinhas e4b482b3ed Optimize shufflevector that copies an i64/f64 and zeros the rest.
Summary:
Also ran clang-format on the function. The code added is the last else
if block.

Reviewers: nadav, craig.topper, delena

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D3518

llvm-svn: 208372
2014-05-08 23:16:08 +00:00
Quentin Colombet 2eb151e29f [TargetInstrInfo] Fix the implementation of commuteInstruction to match the
comment of the API.

Relaxes the behavior of TargetInstrInfo::commuteInstruction when
TargetInstrInfo::findCommutedOpIndices returns false.

Previously TargetInstrInfo triggered a fatal error in such situation whereas based
on the comment in the API it should just return nullptr. Indeed the only
precondition that should be ensured is that the instruction must be commutable.

llvm-svn: 208371
2014-05-08 23:12:27 +00:00
Nick Lewycky 54a824b758 Improve wording to make it sounds more like a change than an analysis.
llvm-svn: 208370
2014-05-08 23:04:46 +00:00
Justin Bogner 7833d9facb test/CodeGen: Check that the correct register is used in a store
This tightens up r208351 to ensure that a store is fed with the
correct value.

Thanks to Quentin Colombet for spotting this!

llvm-svn: 208368
2014-05-08 22:45:07 +00:00
David Blaikie 2f143e0c30 Reapply r207876 (Try simplifying LexicalScopes ownership again) including a workaround for an MSVC2012 bug regarding forward_as_tuple
(r207876 was reverted in r208131 after seeing some consistent buildbot
failure for MSVC 2012. The original commits were in r207724-r207726)

Takumi was nice enough to dig into this and locate this Microsoft
Connect issue:
http://connect.microsoft.com/VisualStudio/feedback/details/814899/forward-as-tuple-debug-implementation-error
describing a bug in MSVC2012's forward_as_tuple implementation.

Since the parameters in this instance are trivial/small, pass them by
value (using make_tuple) instead of perfectly-forwarded tuple of rvalue
references (involving the broken forward_as_tuple). Hopefully this will
satisfy MSVC2012.

llvm-svn: 208364
2014-05-08 22:24:51 +00:00
David Blaikie e08c540e68 Missed formatting
llvm-svn: 208362
2014-05-08 21:53:33 +00:00
David Blaikie 8ae8fd08ff StringMap: Move assignment and move construction.
llvm-svn: 208361
2014-05-08 21:52:29 +00:00
David Blaikie 70a14fc4d6 StringMap: Replace faux-copyability with faux-movability, which is sufficient.
This behavior was added to support StringMaps of StringMaps, default +
move construction are sufficient for this.

Real move construction support coming soon (& probably copy construction
too).

llvm-svn: 208360
2014-05-08 21:52:26 +00:00
David Blaikie 9cb331f9fb StringMap support for move-only values.
llvm-svn: 208359
2014-05-08 21:52:23 +00:00
Tobias Grosser 1e9db7e639 Correct formatting.
Sorry for the commit spam. My clang-format crashed on me and the vim
plugin did not print an error, but instead just left the formatting
untouched.

llvm-svn: 208358
2014-05-08 21:43:19 +00:00
Tobias Grosser b2101c3ca5 Use std::remove_if to remove elements from a vector
Suggested-by: Benjamin Kramer <benny.kra@gmail.com>
llvm-svn: 208357
2014-05-08 21:32:59 +00:00
Michael Zolotukhin 292d3caa15 [InstCombine] Some cleanup in optimization of redundant insertvalue instructions.
And one more test added.

llvm-svn: 208355
2014-05-08 19:50:24 +00:00
Rafael Espindola bfe44e1dc6 Use range loops.
llvm-svn: 208353
2014-05-08 19:30:17 +00:00
Justin Bogner 1de42075fc Make a CodeGen test more robust against vector register selection
llvm-svn: 208351
2014-05-08 18:53:56 +00:00
Jyotsna Verma 38901ca4f6 [Hexagon] Add new InstrItinClass to support timing classes.
This patch doesn't introduce any functionality change. Test cases will be
added later when v5 support is added.

llvm-svn: 208349
2014-05-08 18:47:08 +00:00
Rafael Espindola 331380a291 Use for range loops.
llvm-svn: 208348
2014-05-08 18:40:06 +00:00
Sebastian Pop 45dd14bac2 add testcase for r208237: do not collect undef terms
llvm-svn: 208347
2014-05-08 18:38:58 +00:00