Commit Graph

187959 Commits

Author SHA1 Message Date
dfukalov 6fd11b14f6 [AMDGPU] Tune inlining parameters for AMDGPU target (part 2)
Summary:
Most of IR instructions got better code size estimations after commit 47a5c36b.
So default parameters values should be updated to improve inlining and
unrolling for the target.

Reviewers: rampitec, arsenm

Reviewed By: rampitec

Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, zzheng, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70391
2019-11-19 16:33:16 +03:00
Roman Lebedev 6de85095ed
[NFC][X86] Fixup comment in CodeGen/X86/cmov.ll
As noted in post-commit review for
https://reviews.llvm.org/D59035#inline-631659
2019-11-19 16:24:07 +03:00
Simon Pilgrim fed8c06892 [ARM] Regenerate vector lane store tests 2019-11-19 13:18:44 +00:00
Simon Pilgrim c7f85f3a84 [PowerPC] Regenerate vsx_insert_extract_le.ll tests 2019-11-19 13:18:44 +00:00
evgeny ef5e3b85ee [ThinLTO] Simplify code. NFC 2019-11-19 15:51:25 +03:00
David Bozier 6baec97127 [llvm-objdump] Print relocation addends in hexadecimal
Summary: Matches GNU objdump. Makes debugging easier for me as I'm working out addresses from symbol+addend, so it would be good to be calculating in a single format.

Reviewers: MaskRay, grimar, jhenderson, bd1976llvm

Reviewed By: jhenderson

Subscribers: sdardis, jrtc27, atanasyan, rupprecht, seiya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69997
2019-11-19 12:27:18 +00:00
Simon Pilgrim bbf4af3109 [X86][SSE] Remove XFormVExtractWithShuffleIntoLoad to prevent legalization infinite loops (PR43971)
As detailed in PR43971/D70267, the use of XFormVExtractWithShuffleIntoLoad causes issues where we end up in infinite loops of extract(targetshuffle(vecload)) -> extract(shuffle(vecload)) -> extract(vecload) -> extract(targetshuffle(vecload)), there are just too many legalization checks at every stage that we can't guarantee that extract(shuffle(vecload)) -> scalarload can occur.

At the moment we see a number of minor regressions as we don't fold extract(shuffle(vecload)) -> scalarload before legal ops, these can be addressed in future patches and extension of X86ISelLowering's combineExtractWithShuffle.
2019-11-19 11:55:44 +00:00
Thomas Preud'homme a89ca4ae17 Fix PR44001: assert failure in getFunctionLocalOffsetAfterInsn
Summary:
Assert in getFunctionLocalOffsetAfterInsn() fails when processing a call
MachineInstr inside a bundle and compiling with debug info. This is
because labels are added by DwarfDebug::beginInstruction() which is
called for each top-level MI by EmitFunctionBody()'s for-loop iteration
but constructCallSiteEntryDIEs() which calls
getFunctionLocalOffsetAfterInsn() iterates over all MIs.

This commit modifies constructCallSiteEntryDIEs() to get the associated
bundle MI for call MIs inside a bundle and use that to when calling
getFunctionLocalOffsetAfterInsn() and getLabelAfterInsn(). It also skips
loop iterations for bundle MIs since the loop statements are concerned
with debug info for each physical instructions and bundles represent a
group of instructions. It also fix the comment about PCAddr since the
code is getting the return address and not the call address.

Reviewers: dstenb, vsk, aprantl, djtodoro, dblaikie, NikolaPrica

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70293
2019-11-19 11:23:11 +00:00
Simon Atanasyan 7deb8ce4c1 [mips] Joint MipsMemSimmXXXAsmOperand into the single template class. NFC 2019-11-19 13:58:28 +03:00
LLVM GN Syncbot 2fcf3e934b gn build: Merge e8a4c74f11 2019-11-19 10:34:24 +00:00
Evgeniy Brevnov 5f026b6d9e [DependenceAnalysis] Dependecies for loads marked with "ivnariant.load" should not be shared with general accesses. Fix for https://bugs.llvm.org/show_bug.cgi?id=42151
Summary:
Dependence anlysis has a mechanism to cache results. Thus for particular memory access the cache keep track of side effects in basic blocks. The problem is that for invariant loads dependepce analysis legally ignores many dependencies due to a special semantic rules for such loads. But later results calculated for invariant load retrived from the cache for general case acceses. As a result we have wrong dependence information causing GVN to do illegal transformation. Fixes, T42151.

Proposed solution is to disable caching of invariant loads. I think such loads a pretty rare and it doesn't make sense to extend caching mechanism for them.

Reviewers: reames, chandlerc, skatkov, morisset, jdoerfert

Reviewed By: reames

Subscribers: hiraditya, test, jdoerfert, lebedev.ri, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64405
2019-11-19 17:30:02 +07:00
evgeny 4ef9315c4b [ThinLTO] Make ValueInfo::operator bool() explicit
Differential revision: https://reviews.llvm.org/D70383
2019-11-19 12:46:09 +03:00
LLVM GN Syncbot 26d36a1903 gn build: Merge c0fc29c468 2019-11-19 09:55:01 +00:00
LLVM GN Syncbot d54e5a2c86 gn build: Merge 39285a0f02 2019-11-19 09:55:01 +00:00
Sven van Haastregt d56dd62a98 [kate] Add various missing keywords
Patch by Pedro Olsen Ferreira.
2019-11-19 09:54:07 +00:00
Nico Weber 88276ddbfe Revert "gn build: (manually) try to merge 1689ad27af"
This reverts commit e4ec2ecf6d.
1689ad27af was reverted as well.
2019-11-19 04:40:10 -05:00
Pavel Labath 39285a0f02 Add streaming/equality operators to DWARFAddressRange/DWARFLocationExpression
The main motivation for this is being able to write simpler assertions
and get better error messages in unit tests.

Split off from D70394.
2019-11-19 10:34:30 +01:00
Pavel Labath c0fc29c468 Add operator<< for object::SectionedAddress
The main motivation for this is better failure messages in unit tests.

Split off from D70394.
2019-11-19 10:34:30 +01:00
czhengsz fd03be3634 [APInt] add wrap support for `setBits` and `getBitsSet`
Add two new interfaces getBitsSet and getBitsSetWithWrap

Reviewed by: lebedev.ri, craig.topper

Differential Revision: https://reviews.llvm.org/D69032
2019-11-19 03:57:48 -05:00
Sam Parker d43913ae38 [ARM][MVE] Enable narrow vectors for tail pred
Remove the restriction, from the mve tail predication pass, that the
all masked vectors instructions need to be 128-bits. This allows us
to supported extending loads and truncating stores.

Differential Revision: https://reviews.llvm.org/D69946
2019-11-19 08:51:12 +00:00
Evgeniy Brevnov 4a64d710ae [NFC] Test commit. Please ignore.
As a test commit I fixed a misspelling in one of comments in SLP
vectorizer.
2019-11-19 15:41:57 +07:00
Sam Parker 8978c12b39 [ARM][MVE] Tail predication conversion
This patch modifies ARMLowOverheadLoops to convert a predicated
vector low-overhead loop into a tail-predicatd one. This is currently
a very basic conversion, with the following restrictions:
- Operates only on single block loops.
- The loop can only contain a single vctp instruction.
- No other instructions can write to the vpr.
- We only allow a subset of the mve instructions in the loop.

TODO: Pass the number of elements, not the number of iterations to
dlstp/wlstp.

Differential Revision: https://reviews.llvm.org/D69945
2019-11-19 08:22:18 +00:00
Paweł Bylica d593292f04
[X86] Add more addcarry tests
Summary: More addcarry tests for incoming https://reviews.llvm.org/D70079.

Reviewers: davezarzycki, RKSimon, spatel, craig.topper

Reviewed By: spatel

Subscribers: craig.topper, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70237
2019-11-19 08:59:29 +01:00
Matt Arsenault b337bce871 AMDGPU: Split test functions to avoid dependency on subtarget
Prepare this test for moving tthe denormal setting out of the
subtarget features.
2019-11-19 11:12:13 +05:30
Matt Arsenault 6f06eda070 bugpoint: Add option to disable attribute removal
This takes a long time and never reduces anything useful for me
(e.g. I've been waiting for 3 hours on a testcase and it hasn't found
any attributes to remove yet). This should probably start by assuming
no attributes matter, and adding back.
2019-11-19 11:11:00 +05:30
Craig Topper dc02eb1909 [SelectionDAG] Merge the two identical ExpandChainLibCall methods from LegalizeTypes and LegalizeDAG to one version in TaretLowering.
Reviewers: RKSimon, efriedma, spatel

Reviewed By: efriedma

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70354
2019-11-18 20:22:33 -08:00
Leonard Chan 66b6b92765 Revert "implement printing out raw section data of xcoff objectfile for llvm-objdump"
This reverts commit 8f8a9f3437.

Reverting since this patch seems to break a lot of llvm buildbots.
2019-11-18 20:05:57 -08:00
Kai Luo 6ae7315746 Revert "[Bindings][Go] Fix go.test failure due to missing argument"
This reverts commit 88235812a7 due to
d27a16eb39.
2019-11-19 09:59:43 +08:00
Kai Luo 88235812a7 [Bindings][Go] Fix go.test failure due to missing argument
go.test failed with error
```
/tmp/gopath431502532/src/llvm.org/llvm/bindings/go/llvm/dibuilder.go:514:40: not enough arguments in call to _Cfunc_LLVMDIBuilderCreateTypedef
        have (_Ctype_LLVMDIBuilderRef, _Ctype_LLVMMetadataRef, *_Ctype_char, _Ctype_ulong, _Ctype_LLVMMetadataRef, _Ctype_uint, _Ctype_LLVMMetadataRef)
        want (*_Ctype_struct_LLVMOpaqueDIBuilder, *_Ctype_struct_LLVMOpaqueMetadata, *_Ctype_char, _Ctype_ulong, *_Ctype_struct_LLVMOpaqueMetadata, _Ctype_uint, *_Ctype_struct_LLVMOpaqueMetadata, _Ctype_uint)
```
This patch fixes above error.

Differential Revision: https://reviews.llvm.org/D70360
2019-11-19 09:07:37 +08:00
Andrew Browne 6a1b51282b Fix error message missed in commit dde589389f.
Patch by Andrew Browne <browneee@google.com>

Reviewers: tejohnson, evgeny777

Reviewed By: tejohnson

Subscribers: arphaman, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70195
2019-11-18 16:04:09 -08:00
LLVM GN Syncbot 327904d3cf gn build: Merge 30e7ee3c4b 2019-11-18 23:33:25 +00:00
Nico Weber e4ec2ecf6d gn build: (manually) try to merge 1689ad27af 2019-11-18 18:33:04 -05:00
Steven Wu e84468c1f1 [llvm-cxxfilt] Improve strip-underscore behavior
Summary:
For platform that uses macho format, c++filt should be stripping the
leading underscore by default. Introduce the binutil compatible "-n"
option to control strip-undercore behaivor together with the existing
"-_" option and fallback to system default if none of them are set.

rdar://problem/57173514

Reviewers: compnerd, erik.pilkington, dexonsmith, mattd

Reviewed By: compnerd, erik.pilkington

Subscribers: jkorous, ributzka, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70250
2019-11-18 15:05:41 -08:00
Teresa Johnson aeca47fa0f ThinLTO: Fix assembler to emit alwaysInline in the summary
Summary: The earlier commit (https://reviews.llvm.org/D70014) missed this one : If Always_Inline happens to be the only entry in FuncFlags, then the assembler will not print it in the summary.

Patch by Bharathi Seshadri <bseshadr@cisco.com>

Reviewers: tejohnson

Reviewed By: tejohnson

Subscribers: mehdi_amini, inglorion, hiraditya, steven_wu, dexonsmith, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70323
2019-11-18 15:02:13 -08:00
Eric Christopher 6f1cc4151a Temporarily revert "[SLP] fix miscompile on min/max reductions with extra uses (PR43948)"
as it causes an ICE on valid. A testcase was followed up on the original thread.

This reverts commit a3e61946c5.
2019-11-18 14:41:37 -08:00
diggerlin 5e0a4eddac Adding a test case for read-only data assembly writing for aix
SUMMARY:

Adding a test case  for read-only data assembly writing for aix

Reviewers: daltenty,Xiangling_Liao
Subscribers: rupprecht, seiyai,hiraditya

Differential Revision: https://reviews.llvm.org/D70182
2019-11-18 17:07:13 -05:00
Sanjay Patel b763924bd0 [SLP] reduce duplicated check lines in tests; NFC 2019-11-18 17:03:07 -05:00
Stefan Pintilie 6512473cee [PowerPC] Improve float vector gather codegen
This patch aims to improve the code generation for float vector gather on POWER9.
Patterns have been implemented to utilize instructions that deliver improved
performance.

Patch by: Kamau Bridgeman

Differential Revision: https://reviews.llvm.org/D62908
2019-11-18 15:53:32 -06:00
Cyndy Ishida 9b36f2cfd9 Fix iOSDarwin()'s doc comment.
Summary:
I saw the doc comment using the Option + Click in Xcode and I was
confused by the fact that tvOS wasn't listed. The method definition
also doesn't make it clear that the check for tvOS is taking place as
the tvOS check is hidden in the isiOS() check.

Reviewers: rjmccall

Reviewed By: rjmccall

Subscribers: dexonsmith, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70364

This patch is from Varun Gandhi <varun_gandhi@apple.com>
2019-11-18 13:18:06 -08:00
Daniel Sanders 1791901787 [macho] Allow CPUSubtype to contribute to architecture identification
Summary:
Sometimes the CPUSubtype determines the Triple::ArchType that must be used.
Add the subtype to the API's to allow targets that need this to correctly
identify the contents of the binary.

Reviewers: pete

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70345
2019-11-18 12:57:39 -08:00
Daniel Sanders c941db5b1a [macho] Allow CPUSubtype to be adjusted before writing it to a file
Summary:
It's not always possible for a target to provide a MachO CPUSubtype up
front as is required by the current implementation. Sometimes you need more
information like the particular CPU implementation you are targeting.

Give MCMachObjectTargetWriter subclasses the opportunity to modify the
CPUSubtype after the MCMachObjectTargetWriter is created but before the
object starts being written. Typically this would be done in response to
instructions from a TargetStreamer.

Reviewers: pete

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70344
2019-11-18 12:57:39 -08:00
Teresa Johnson cc1b0bc24d [ThinLTO] Avoid extra index lookup during promotion
Summary:
Pass down the already accessed ValueInfo to shouldPromoteLocalToGlobal,
to avoid an unnecessary extra index lookup.

Add some assertion checking to confirm we have a non-empty VI when
expected.

Also some misc cleanup, merging the two versions of
doImportAsDefinition, since one was only called by the other, and
unnecessarily passed in a member variable.

Reviewers: steven_wu, pcc, evgeny777

Reviewed By: evgeny777

Subscribers: mehdi_amini, inglorion, hiraditya, dexonsmith, arphaman, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70337
2019-11-18 12:55:53 -08:00
diggerlin 8f8a9f3437 implement printing out raw section data of xcoff objectfile for llvm-objdump
SUMMARY:
implement printing out raw section data of xcoff objectfile for llvm-objdump
and option -D --disassemble-all option for llvm-objdump

Reviewers: Sean Fertile
Subscribers: rupprecht, seiyai,hiraditya

Differential Revision: https://reviews.llvm.org/D70255
2019-11-18 15:24:55 -05:00
Craig Topper fffcd3e48e [X86] Add a 'break;' to the end of the last case in a switch to avoid surprising the next person to add a case after this one. NFC 2019-11-18 12:18:24 -08:00
Teresa Johnson 3be6dbca3b [ThinLTO] Promotion handling cleanup (NFC)
Summary:
Clean up the code that does GV promotion in the ThinLTO backends.

Specifically, we don't need to check whether we are importing since that
is already checked and handled correctly in shouldPromoteLocalToGlobal.
Simply call shouldPromoteLocalToGlobal, and if it returns true we are
guaranteed that we are promoting, whether or not we are importing (or in
the exporting module). This also makes the handling in getName()
consistent with that in getLinkage(), which checks the DoPromote parameter
regardless of whether we are importing or exporting.

Reviewers: steven_wu, pcc, evgeny777

Subscribers: mehdi_amini, inglorion, hiraditya, dexonsmith, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70327
2019-11-18 11:59:36 -08:00
Craig Topper ff75bf6ac9 [X86] Add AMD Matisse (znver2) model number to getHostCPUName and compiler-rt's getAMDProcessorTypeAndSubtype.
This is the CPUID model used on Ryzen 3000 series (Zen 2/Matisse) CPUs.

Patch by Alex James

Differential Revision: https://reviews.llvm.org/D70279
2019-11-18 11:57:04 -08:00
Craig Topper 6e20d70a69 [LegalizeDAG] Convert strict fp nodes to libcalls without losing the chain.
Previously we mutated the node and then converted it to a libcall. But this loses the chain information.

This patch keeps the chain, but unfortunately breaks tail call optimization as the functions involved in deciding if a node is in tail call position can't handle the chain. But correct ordering seems more important to be right.

Somehow the SystemZ tests improved. I looked at one of them and it seemed that we're handling the split vector elements in a different order and that made the copies work better.

Differential Revision: https://reviews.llvm.org/D70334
2019-11-18 11:24:08 -08:00
Philip Reames ad5a84c883 [LoopPred/WC] Use a dominating widenable condition to remove analyze loop exits
This implements a version of the predicateLoopExits transform from IndVarSimplify extended to exploit widenable conditions - and thus be much wider in scope of legality. The code structure ends up being almost entirely different, so I chose to duplicate this into the LoopPredication pass instead of trying to reuse the code in the IndVars.

The core notions of the transform are as follows:

    If we have a widenable condition which controls entry into the loop, we're allowed to widen it arbitrarily. Given that, it's simply a *profitability* question as to what conditions to fold into the widenable branch.
    To avoid pass ordering issues, we want to avoid widening cases that would otherwise be dischargeable. Or... widen in a form which can still be discharged. Thus, we phrase the transform as selecting one analyzeable exit from the set of analyzeable exits to keep. This avoids creating pass ordering complexities.
    Since none of the above proves that we actually exit through our analyzeable exits - we might exit through something else entirely - we limit ourselves to cases where a) the latch is analyzeable and b) the latch is predicted taken, and c) the exit being removed is statically cold.

Differential Revision: https://reviews.llvm.org/D69830
2019-11-18 11:23:29 -08:00
Stefan Pintilie 9d93893914 [PowerPC] Test case for vector float gather on ppc64le and ppc64
Test case to verify that the expected code is generated for a
vector float gather based on the patterns in tablegen for big
and little endian cases.

Patch by: Kamau Bridgeman

Differential Revision: https://reviews.llvm.org/D69443
2019-11-18 13:17:07 -06:00
Eric Christopher 30e7ee3c4b Temporarily Revert "Add support for options -frounding-math, ftrapping-math, -ffp-model=, and -ffp-exception-behavior="
and a follow-up NFC rearrangement as it's causing a crash on valid. Testcase is on the original review thread.

This reverts commits af57dbf12e and e6584b2b7b
2019-11-18 10:46:48 -08:00