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4681 Commits

Author SHA1 Message Date
Chris Lattner 0acc90c67e add a method 
llvm-svn: 25910
 2006-02-02 19:57:16 +00:00
Chris Lattner d8208c3665 more notes 
llvm-svn: 25908
 2006-02-02 19:43:28 +00:00
Chris Lattner d3f033e8e0 add a note, I have no idea how important this is. 
llvm-svn: 25907
 2006-02-02 19:16:34 +00:00
Chris Lattner e10e1024bc %fcc is not an alias for %fcc0 
llvm-svn: 25906
 2006-02-02 08:02:20 +00:00
Chris Lattner cb34968d19 correct an opcode 
llvm-svn: 25905
 2006-02-02 07:56:15 +00:00
Chris Lattner 9dd7df7ee7 new example 
llvm-svn: 25903
 2006-02-02 07:37:11 +00:00
Nate Begeman cd018525f8 Update the README 
llvm-svn: 25902
 2006-02-02 07:27:56 +00:00
Chris Lattner e0c60d63b1 Implement MaskedValueIsZero for ANY_EXTEND nodes 
llvm-svn: 25900
 2006-02-02 06:43:15 +00:00
Chris Lattner 4b2ec8af23 implemented, testcase here: test/Regression/CodeGen/X86/compare-add.ll 
llvm-svn: 25899
 2006-02-02 06:36:48 +00:00
Evan Cheng d3908f79cb Update. 
llvm-svn: 25896
 2006-02-02 02:40:17 +00:00
Evan Cheng d8fba3a1ee Fix a erroneous comment. 
llvm-svn: 25894
 2006-02-02 00:28:23 +00:00
Chris Lattner 6132a87cf4 more notes 
llvm-svn: 25890
 2006-02-01 23:38:08 +00:00
Evan Cheng b3ea2677a4 Tell codegen MOVAPSrr and MOVAPDrr are copies. 
llvm-svn: 25889
 2006-02-01 23:03:16 +00:00
Evan Cheng f1ed826c2a Added SSE entries to foldMemoryOperand(). 
llvm-svn: 25888
 2006-02-01 23:02:25 +00:00
Evan Cheng 8b40cde148 Rearrange code to my liking. :) 
llvm-svn: 25887
 2006-02-01 23:01:57 +00:00
Chris Lattner f7f056751c add a method 
llvm-svn: 25884
 2006-02-01 22:38:46 +00:00
Chris Lattner 2f7650f9dc another note 
llvm-svn: 25883
 2006-02-01 21:44:48 +00:00
Andrew Lenharth 4b1c726fbb Add immediate forms of cmov and remove some cruft 
llvm-svn: 25882
 2006-02-01 19:37:33 +00:00
Chris Lattner ba56b5dc35 Finegrainify namespacification 
llvm-svn: 25877
 2006-02-01 18:10:56 +00:00
Chris Lattner a983beab37 add a note 
llvm-svn: 25876
 2006-02-01 17:54:23 +00:00
Nate Begeman 7e7f439f85 Fix some of the stuff in the PPC README file, and clean up legalization 
of the SELECT_CC, BR_CC, and BRTWOWAY_CC nodes.

llvm-svn: 25875
 2006-02-01 07:19:44 +00:00
Chris Lattner 3da1bb520e add a note, I'll take care of this after nate commits his big patch 
llvm-svn: 25873
 2006-02-01 06:40:32 +00:00
Evan Cheng 9e350cd6ad - Use xor to clear integer registers (set R, 0). 
- Added a new format for instructions where the source register is implied
  and it is same as the destination register. Used for pseudo instructions
  that clear the destination register.

llvm-svn: 25872
 2006-02-01 06:13:50 +00:00
Evan Cheng c404b5748c Remove another entry. 
llvm-svn: 25871
 2006-02-01 06:08:48 +00:00
Chris Lattner b0a76b0981 Another regression from the pattern isel 
llvm-svn: 25867
 2006-02-01 01:44:25 +00:00
Chris Lattner 7ed3101d14 Beef up the interface to inline asm constraint parsing, making it more general, useful, and easier to use. 
llvm-svn: 25866
 2006-02-01 01:29:47 +00:00
Evan Cheng a24617f5d4 Return's chain should be matching either the chain produced by the 
value or the chain going into the load.

llvm-svn: 25863
 2006-02-01 01:19:32 +00:00
Chris Lattner a0527473ac another testcase. 
llvm-svn: 25862
 2006-02-01 00:28:12 +00:00
Evan Cheng e1ce4d7115 When folding a load into a return of SSE value, check the chain to 
ensure the memory location has not been clobbered.

llvm-svn: 25861
 2006-02-01 00:20:21 +00:00
Evan Cheng bc1fcd074e Remove an item. It's done. 
llvm-svn: 25860
 2006-02-01 00:15:53 +00:00
Evan Cheng 5659ca8f47 Be smarter about whether to store the SSE return value in memory. If 
it is already available in memory, do a fld directly from there.

llvm-svn: 25859
 2006-01-31 23:19:54 +00:00
Chris Lattner 64387c3e9c turning these into 'adds' would require extra copies 
llvm-svn: 25858
 2006-01-31 22:59:46 +00:00
Evan Cheng 72d5c256c9 - Allow XMM load (for scalar use) to be folded into ANDP* and XORP*. 
- Use XORP* to implement fneg.

llvm-svn: 25857
 2006-01-31 22:28:30 +00:00
Evan Cheng a91eb48547 Remove entries on fabs and fneg. These are done. 
llvm-svn: 25856
 2006-01-31 22:26:21 +00:00
Evan Cheng 32be2dc0af Allow the specification of explicit alignments for constant pool entries. 
llvm-svn: 25855
 2006-01-31 22:23:14 +00:00
Chris Lattner c642aa5e1c * Fix 80-column violations 
* Rename hasSSE -> hasSSE1 to avoid my continual confusion with 'has any SSE'.
* Add inline asm constraint specification.

llvm-svn: 25854
 2006-01-31 19:43:35 +00:00
Chris Lattner 0151361d21 add info about the inline asm register constraints for PPC 
llvm-svn: 25853
 2006-01-31 19:20:21 +00:00
Chris Lattner 0962ffc4a6 add a missing break that caused a lot of failures last night :( 
llvm-svn: 25851
 2006-01-31 17:20:06 +00:00
Nate Begeman a162f208ee Codegen 
bool %test(int %X) {
  %Y = seteq int %X, 13
  ret bool %Y
}

as

_test:
        addi r2, r3, -13
        cntlzw r2, r2
        srwi r3, r2, 5
        blr

rather than

_test:
        cmpwi cr7, r3, 13
        mfcr r2
        rlwinm r3, r2, 31, 31, 31
        blr

This has very little effect on most code, but speeds up analyzer 23% and
mason 11%

llvm-svn: 25848
 2006-01-31 08:17:29 +00:00
Chris Lattner ac9892ccaf okay, one more 
llvm-svn: 25847
 2006-01-31 07:45:45 +00:00
Chris Lattner 882611dc25 another note 
llvm-svn: 25846
 2006-01-31 07:45:08 +00:00
Chris Lattner 24b0742476 More notes 
llvm-svn: 25845
 2006-01-31 07:43:33 +00:00
Chris Lattner 57480d0634 another one 
llvm-svn: 25844
 2006-01-31 07:38:32 +00:00
Chris Lattner 17cd988419 add a note 
llvm-svn: 25843
 2006-01-31 07:37:20 +00:00
Chris Lattner 799716141b add conditional moves of float and double values on int/fp condition codes. 
llvm-svn: 25842
 2006-01-31 07:26:55 +00:00
Chris Lattner b0fe138b65 example nate pointed out 
llvm-svn: 25841
 2006-01-31 07:16:34 +00:00
Chris Lattner 6f9bf658a7 treat conditional branches the same way as conditional moves (giving them 
an operand that contains the condcode), making things significantly simpler.

llvm-svn: 25840
 2006-01-31 06:56:30 +00:00
Chris Lattner 21ec192419 compactify all of the integer conditional moves into one instruction that takes 
a CC as an operand.  Much smaller, much happier.

llvm-svn: 25839
 2006-01-31 06:49:09 +00:00
Chris Lattner 196d58373c Add immediate forms of integer cmovs 
llvm-svn: 25838
 2006-01-31 06:24:29 +00:00
Chris Lattner 283492b4fe Shrinkify 
llvm-svn: 25837
 2006-01-31 06:18:16 +00:00
Chris Lattner 70c9e42593 Add the full complement of conditional moves of integer registers. 
llvm-svn: 25834
 2006-01-31 05:26:36 +00:00
Chris Lattner b6493b3165 Compile this: 
void %X(int %A) {
        %C = setlt int %A, 123          ; <bool> [#uses=1]
        br bool %C, label %T, label %F

T:              ; preds = %0
        call int %main( int 0 )         ; <int>:0 [#uses=0]
        ret void

F:              ; preds = %0
        ret void
}

to this:

X:
        save -96, %o6, %o6
        subcc %i0, 122, %l0
        bg .LBBX_2      ! F
        nop
...

not this:

X:
        save -96, %o6, %o6
        sethi 0, %l0
        or %g0, 1, %l1
        subcc %i0, 122, %l2
        bg .LBBX_4      !
        nop
.LBBX_3:        !
        or %g0, %l0, %l1
.LBBX_4:        !
        subcc %l1, 0, %l0
        bne .LBBX_2     ! F
        nop

llvm-svn: 25833
 2006-01-31 05:05:52 +00:00
Evan Cheng 2dd217b88f Added custom lowering of fabs 
llvm-svn: 25831
 2006-01-31 03:14:29 +00:00
Chris Lattner a9bfca8d1e add the 'lucas' optimization 
llvm-svn: 25830
 2006-01-31 02:55:28 +00:00
Chris Lattner 0e70729e83 I don't see why this optimization isn't safe, but it isn't, so disable it 
llvm-svn: 25829
 2006-01-31 02:45:52 +00:00
Chris Lattner d916e78b0a Another high-prio selection performance bug 
llvm-svn: 25828
 2006-01-31 02:10:06 +00:00
Chris Lattner 2b70a6f853 more mumbling 
llvm-svn: 25826
 2006-01-31 00:45:37 +00:00
Chris Lattner b521361fb9 add some notes 
llvm-svn: 25825
 2006-01-31 00:20:38 +00:00
Evan Cheng 45df7f84ff Don't generate complex sequence for SETOLE, SETOLT, SETULT, and SETUGT. Flip 
the order of the compare operands and generate SETOGT, SETOGE, SETUGE, and
SETULE instead.

llvm-svn: 25824
 2006-01-30 23:41:35 +00:00
Chris Lattner 9a90572374 Fix FP constants, and the SparcV8/2006-01-22-BitConvertLegalize.ll failure from last night 
llvm-svn: 25819
 2006-01-30 22:20:49 +00:00
Evan Cheng 08390f6a21 i64 -> f32, f32 -> i64 and some clean up. 
llvm-svn: 25818
 2006-01-30 22:13:22 +00:00
Evan Cheng 5b97fcf0f5 Always use FP stack instructions to perform i64 to f64 as well as f64 to i64 
conversions. SSE does not have instructions to handle these tasks.

llvm-svn: 25817
 2006-01-30 08:02:57 +00:00
Chris Lattner 37faeb2b02 Revamp the ICC/FCC reading instructions to be parameterized in terms of the 
SPARC condition codes, not in terms of the DAG condcodes.  This allows us to
write nice clean patterns for cmovs/branches.

llvm-svn: 25815
 2006-01-30 07:43:04 +00:00
Chris Lattner 33a79cae7c Compile: 
uint %test(uint %X) {
        %Y = call uint %llvm.ctpop.i32(uint %X)
        ret uint %Y
}

to:

test:
        save -96, %o6, %o6
        sll %i0, 0, %l0
        popc %l0, %i0
        restore %g0, %g0, %g0
        retl
        nop

instead of to 40 logical ops.  Note the shift-by-zero that clears the top
part of the 64-bit V9 register.

Testcase here: CodeGen/SparcV8/ctpop.ll

llvm-svn: 25814
 2006-01-30 06:14:02 +00:00
Chris Lattner 321e337d95 If the target has V9 instructions, this pass is a noop, don't bother 
running it.

llvm-svn: 25811
 2006-01-30 05:51:14 +00:00
Chris Lattner 90d3fd9e7c When in v9 mode, emit fabsd/fnegd/fmovd 
llvm-svn: 25810
 2006-01-30 05:48:37 +00:00
Chris Lattner 99dcb95e14 First step towards V9 instructions in the V8 backend, two conditional move 
patterns.  This allows emission of this code:

t1:
        save -96, %o6, %o6
        subcc %i0, %i1, %l0
        move %icc, %i0, %i2
        or %g0, %i2, %i0
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

t1:
        save -96, %o6, %o6
        subcc %i0, %i1, %l0
        be .LBBt1_2     !
        nop
.LBBt1_1:       !
        or %g0, %i2, %i0
.LBBt1_2:       !
        restore %g0, %g0, %g0
        retl
        nop

for this:

int %t1(int %a, int %b, int %c) {
        %tmp.2 = seteq int %a, %b
        %tmp3 = select bool %tmp.2, int %a, int %c
        ret int %tmp3
}

llvm-svn: 25809
 2006-01-30 05:35:57 +00:00
Chris Lattner 238fe93242 Two changes: 
1. Default to having V9 instructions, instead of just V8.
2. unless -enable-sparc-v9-insts is passed, disable V9 (for use with llcbeta)

llvm-svn: 25807
 2006-01-30 04:57:43 +00:00
Chris Lattner af209b8b13 When lowering SELECT_CC, see if the input is a lowered SETCC. If so, fold 
the two operations together.  This allows us to compile this:

void %two(int %a, int* %b) {
        %tmp.2 = seteq int %a, 0
        %tmp.0.0 = select bool %tmp.2, int 10, int 20
        store int %tmp.0.0, int* %b
        ret void
}

into:

two:
        save -96, %o6, %o6
        or %g0, 20, %l0
        or %g0, 10, %l1
        subcc %i0, 0, %l2
        be .LBBtwo_2    ! entry
        nop
.LBBtwo_1:      ! entry
        or %g0, %l0, %l1
.LBBtwo_2:      ! entry
        st %l1, [%i1]
        restore %g0, %g0, %g0
        retl
        nop

instead of:

two:
        save -96, %o6, %o6
        sethi 0, %l0
        or %g0, 1, %l1
        or %g0, 20, %l2
        or %g0, 10, %l3
        subcc %i0, 0, %l4
        be .LBBtwo_2    ! entry
        nop
.LBBtwo_1:      ! entry
        or %g0, %l0, %l1
.LBBtwo_2:      ! entry
        subcc %l1, 0, %l0
        bne .LBBtwo_4   ! entry
        nop
.LBBtwo_3:      ! entry
        or %g0, %l2, %l3
.LBBtwo_4:      ! entry
        st %l3, [%i1]
        restore %g0, %g0, %g0
        retl
        nop

llvm-svn: 25806
 2006-01-30 04:34:44 +00:00
Chris Lattner f0b24d2dc0 Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler. 
llvm-svn: 25803
 2006-01-30 04:09:27 +00:00
Chris Lattner 4ac0fa2aa5 Implement isMaskedValueZeroForTargetNode for the various v8 selectcc nodes, 
allowing redundant and's to be eliminated by the dag combiner.

llvm-svn: 25800
 2006-01-30 03:51:45 +00:00
Chris Lattner c6fa0282d2 adjust prototype 
llvm-svn: 25798
 2006-01-30 03:49:07 +00:00
Chris Lattner 32058cfb7b Functions that are lazily streamed in from the .bc file are *not* external. 
This fixes llvm-test/SingleSource/UnitTests/2006-01-29-SimpleIndirectCall.c
and PR704

llvm-svn: 25793
 2006-01-29 20:49:17 +00:00
Chris Lattner 3c6a950653 add another note 
llvm-svn: 25789
 2006-01-29 09:46:06 +00:00
Chris Lattner dabee1f655 add some performance notes from looking at sgefa 
llvm-svn: 25788
 2006-01-29 09:42:20 +00:00
Chris Lattner 7c7cbde0e5 add a high-priority SSE issue from sgefa 
llvm-svn: 25787
 2006-01-29 09:14:47 +00:00
Chris Lattner 5a7a22c9dd add a missed optimization 
llvm-svn: 25786
 2006-01-29 09:08:15 +00:00
Chris Lattner 3072af4d4f Now that OpActions is big enough, we can specify actions for vector types 
llvm-svn: 25784
 2006-01-29 08:41:37 +00:00
Chris Lattner 8a4a3deaf9 clean up interface to ValueTypeActions 
llvm-svn: 25783
 2006-01-29 08:41:12 +00:00
Chris Lattner d7738e6b32 disable this for now 
llvm-svn: 25778
 2006-01-29 07:31:33 +00:00
Reid Spencer 0c05a2c99c Add a note about lowering llvm.memset, llvm.memcpy, and llvm.memmove to a 
few stores under certain conditions.

llvm-svn: 25777
 2006-01-29 06:48:25 +00:00
Chris Lattner 35d20a4c00 remove now-dead code, the legalizer takes care of this for us 
llvm-svn: 25776
 2006-01-29 06:45:31 +00:00
Chris Lattner 132177e103 The FP stack doesn't support UNDEF, ask the legalizer to legalize it 
instead of lying and saying we have it.

llvm-svn: 25775
 2006-01-29 06:44:22 +00:00
Chris Lattner d33c60b52b Request expansion of ConstantVec nodes. 
llvm-svn: 25773
 2006-01-29 06:32:58 +00:00
Chris Lattner 61c9a8e942 Targets all now request ConstantFP to be legalized into TargetConstantFP. 
'fpimm' in .td files is now TargetConstantFP.

llvm-svn: 25771
 2006-01-29 06:26:08 +00:00
Chris Lattner b5f0ba6051 Update alpha to reflect recent constantfp legalize changes. It's not clear 
why all this code isn't autogenerated. :(

llvm-svn: 25770
 2006-01-29 06:25:22 +00:00
Chris Lattner 1b09c6ba87 cmovle != cmovlt 
llvm-svn: 25761
 2006-01-29 03:47:30 +00:00
Jeff Cohen 4ab39e43e8 Fix typo. 
llvm-svn: 25760
 2006-01-29 03:45:35 +00:00
Jeff Cohen 8643ea67b1 Flesh out AMD family/models. 
llvm-svn: 25755
 2006-01-28 20:30:18 +00:00
Jeff Cohen 58ca0be9af Correctly determine CPU vendor. 
llvm-svn: 25754
 2006-01-28 19:48:34 +00:00
Jeff Cohen 71287085a1 Use union instead of reinterpret_cast. 
llvm-svn: 25751
 2006-01-28 18:47:32 +00:00
Jeff Cohen b5de47cd9a Fix recognition of Intel CPUs. 
llvm-svn: 25750
 2006-01-28 18:38:20 +00:00
Chris Lattner b3ab2d3a42 Is64Bit reflects the capability of the chip, not an aspect of the target os 
llvm-svn: 25749
 2006-01-28 18:23:48 +00:00
Chris Lattner be08957dc5 Fix a bunch of JIT failures with the new isel 
llvm-svn: 25748
 2006-01-28 18:19:37 +00:00
Jeff Cohen e128d5f724 Improve X86 subtarget support for Windows and AMD. 
llvm-svn: 25747
 2006-01-28 18:09:06 +00:00
Chris Lattner ccd2a20c4b silence a warning 
llvm-svn: 25745
 2006-01-28 10:34:47 +00:00
Chris Lattner 30432e07f0 Fix a bug in my elimination of ISD::CALL this morning. PPC now has to 
provide the expansion for i64 calls itself

llvm-svn: 25735
 2006-01-28 07:33:03 +00:00
Chris Lattner dc8bbb6527 make this work on non-native hosts 
llvm-svn: 25734
 2006-01-28 06:05:41 +00:00
Chris Lattner 0c7b4666a3 add a note about how we should implement this FIXME from the legalizer: 
// FIXME: revisit this when we have some kind of mechanism by which targets
    // can decided legality of vector constants, of which there may be very
    // many.

llvm-svn: 25733
 2006-01-28 05:40:47 +00:00
Nate Begeman 595ec734fc Implement Promote for VAARG, and allow it to be custom promoted for people 
who don't want the default behavior (Alpha).

llvm-svn: 25726
 2006-01-28 03:14:31 +00:00
Nate Begeman 6c82262289 Add a couple more things to the readme. 
llvm-svn: 25724
 2006-01-28 01:22:10 +00:00
Chris Lattner b292de6703 Remove some dead code 
llvm-svn: 25719
 2006-01-28 00:02:51 +00:00
Chris Lattner 2c00db82bd Switch to AlphaISD::CALL instead of ISD::CALL 
llvm-svn: 25718
 2006-01-27 23:39:00 +00:00
Chris Lattner f424a66524 Use PPCISD::CALL instead of ISD::CALL 
llvm-svn: 25717
 2006-01-27 23:34:02 +00:00
Chris Lattner a9382ca59e Use V8ISD::CALL instead of ISD::CALL 
llvm-svn: 25716
 2006-01-27 23:30:03 +00:00
Evan Cheng 18243826fd A bit of wisdom from Chris on the last entry. 
llvm-svn: 25715
 2006-01-27 22:54:32 +00:00
Evan Cheng 63045d221b AT&T assembly convention: registers are in lower case. 
llvm-svn: 25714
 2006-01-27 22:53:29 +00:00
Chris Lattner a502b93fae initialize member vars 
llvm-svn: 25712
 2006-01-27 22:38:36 +00:00
Chris Lattner dbfc299915 initialize all instance vars 
llvm-svn: 25711
 2006-01-27 22:37:09 +00:00
Chris Lattner 4d967a4cbb Make llvm.frame/returnaddr not crash on ppc 
llvm-svn: 25710
 2006-01-27 22:25:06 +00:00
Evan Cheng 9857d075b5 Added notes about a x86 isel deficiency. 
llvm-svn: 25706
 2006-01-27 22:11:01 +00:00
Evan Cheng 1073ae07b0 Added a temporary option -enable-x86-sse to enable sse support. It is used by 
llc-beta.

llvm-svn: 25701
 2006-01-27 21:49:34 +00:00
Evan Cheng a814f0b31c Bye bye Pattern ISel, hello DAG ISel. 
llvm-svn: 25700
 2006-01-27 21:26:54 +00:00
Nate Begeman 8c47c3a3b1 Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for 
the same functionality.  This addresses another piece of bug 680.  Next,
on to fixing Alpha VAARG, which I broke last time.

llvm-svn: 25696
 2006-01-27 21:09:22 +00:00
Evan Cheng afab7aa8f2 A better workaround 
llvm-svn: 25692
 2006-01-27 19:30:30 +00:00
Chris Lattner 4be147f456 force sse/3dnow off until they work. This fixes all the x86 failures last night 
llvm-svn: 25690
 2006-01-27 18:30:50 +00:00
Chris Lattner ed2bb8562f Unbreak the JIT with SSE 
llvm-svn: 25688
 2006-01-27 18:27:18 +00:00
Evan Cheng cde9e30bc6 x86 CPU detection and proper subtarget support 
llvm-svn: 25679
 2006-01-27 08:10:46 +00:00
Evan Cheng d98701c639 Subtarget feature can now set any variable to any value 
llvm-svn: 25678
 2006-01-27 08:09:42 +00:00
Chris Lattner 1240574609 PHI and INLINEASM are now built-in instructions provided by Target.td 
llvm-svn: 25674
 2006-01-27 01:46:15 +00:00
Chris Lattner 1c341ac1fe Add a default NoItinerary class for targets to use. 
llvm-svn: 25670
 2006-01-27 01:41:38 +00:00
Jeff Cohen 15a8c15a1f Improve compatibility with VC2005, patch by Morten Ofstad! 
llvm-svn: 25661
 2006-01-26 20:41:32 +00:00
Chris Lattner 32fef53f5c Implement a method for inline asm support 
llvm-svn: 25660
 2006-01-26 20:37:03 +00:00
Jim Laskey 0bbdc55333 Set up MachineDebugInfo to scan for debug information form "llvm.db"g globals. 
Global Variable information is now pulled from "llvm.dbg.globals"

llvm-svn: 25655
 2006-01-26 20:21:46 +00:00
Chris Lattner ebbfb386a5 Improve compatibility with VC2005, patch by Morten Ofstad! 
llvm-svn: 25653
 2006-01-26 19:55:20 +00:00
Evan Cheng 54c13da29c Added preliminary x86 subtarget support. 
llvm-svn: 25645
 2006-01-26 09:53:06 +00:00
Duraid Madina 0ebb0b1c5c fix stack corruption! Previously, 16-byte whole-FP-register stores were 
being treated as needing only 8 bytes (though they were 16 byte aligned.)

This should fix a bunch of tests - anyone have any comments, though?

  - in Target.td , SpillSize and SpillAlignment seem dead - is this what
    Size and Alignment do now?
  - in CodeGenRegisters.h/CodeGenTarget.cpp , DeclaredSpillSize and
    DeclaredSpillAlignment seem dead.
  - there are a bunch of comments here and there that don't clearly
    distinguish between 'size' and 'spillsize' etc. hmm.

llvm-svn: 25644
 2006-01-26 09:45:03 +00:00
Duraid Madina c090ac13bd some hoovering 
llvm-svn: 25643
 2006-01-26 09:08:31 +00:00
Chris Lattner dbc2aac1e7 Rest of subtarget support, remove references to ppc 
llvm-svn: 25642
 2006-01-26 07:22:22 +00:00
Chris Lattner e6842a9da6 Add trivial subtarget support 
llvm-svn: 25641
 2006-01-26 06:51:21 +00:00
Andrew Lenharth 0a01374299 minor renaming 
llvm-svn: 25640
 2006-01-26 03:24:15 +00:00
Andrew Lenharth 153f808f53 allow R28 to be used for frame calculations without entirely removing it from circulation 
llvm-svn: 25639
 2006-01-26 03:22:07 +00:00
Evan Cheng fcdce6d26f Work around some x86 Darwin assembler bugs 
llvm-svn: 25638
 2006-01-26 02:27:43 +00:00
Evan Cheng 944d1e91ea When trying to fold X86::SETCC into a Select, make a copy if it has more than 
one use. This allows more CMOV instructions.

llvm-svn: 25634
 2006-01-26 02:13:10 +00:00
Evan Cheng 97c68f0f5c Remove the uses of STATUS flag register. Rely on node property SDNPInFlag, 
SDNPOutFlag, and SDNPOptInFlag instead.

llvm-svn: 25629
 2006-01-26 00:29:36 +00:00
Andrew Lenharth 5c3dd5fafd oops 
llvm-svn: 25623
 2006-01-25 23:33:32 +00:00
Andrew Lenharth a852660e74 forgot one 
llvm-svn: 25620
 2006-01-25 22:28:07 +00:00
Andrew Lenharth 93fd315292 make things compile again 
llvm-svn: 25614
 2006-01-25 21:54:38 +00:00
Chris Lattner d07c86465d initialize an instance var, apparently I forgot to commit this long ago 
llvm-svn: 25609
 2006-01-25 18:57:15 +00:00
Evan Cheng 030e002fb9 Set SchedulingForLatency to be the default scheduling preference for all. 
llvm-svn: 25607
 2006-01-25 18:52:42 +00:00
Nate Begeman e74795cd70 First part of bug 680: 
Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.

llvm-svn: 25606
 2006-01-25 18:21:52 +00:00
Evan Cheng 1092a02619 Default scheduling preference is SchedulingForLatency. 
llvm-svn: 25603
 2006-01-25 09:15:54 +00:00
Evan Cheng 83eeefbbd1 X86 prefer scheduling for reduced register pressure. 
llvm-svn: 25602
 2006-01-25 09:15:17 +00:00
Evan Cheng aff0800fd1 Fix a selectcc lowering bug. Make a copy of X86ISD::CMP when folding it. 
llvm-svn: 25596
 2006-01-25 09:05:09 +00:00
Chris Lattner bc7226a7cc Loosen up these checks to allow direct uses of ESP 
llvm-svn: 25595
 2006-01-25 08:00:36 +00:00
Duraid Madina 5ea06a9f13 add bundling! well not really, for now it's just stop-insertion. 
llvm-svn: 25593
 2006-01-25 02:23:38 +00:00
Andrew Lenharth 94150f0666 maintaining stackpointer alignment. Perhaps it doesn't matter 
llvm-svn: 25592
 2006-01-25 01:51:08 +00:00
Chris Lattner 27d30a5f42 use ESP directly, not a copy of ESP into some other register for fastcc calls 
llvm-svn: 25584
 2006-01-24 06:14:44 +00:00
Chris Lattner 6f33eaeb81 Emit the copies out of call return registers *after* the ISD::CALLSEQ_END 
node, fixing fastcc and the case where a function has a frame pointer due
to dynamic allocas.

llvm-svn: 25580
 2006-01-24 05:17:12 +00:00
Chris Lattner 68e62a5184 Allow jit-beta to work 
llvm-svn: 25578
 2006-01-24 04:50:48 +00:00
Jim Laskey 3e65f28ffe Crude Dwarf global variable debugging. 
llvm-svn: 25569
 2006-01-24 00:49:18 +00:00
Andrew Lenharth c0bf377f98 bye bye Pattern ISEL 
llvm-svn: 25553
 2006-01-23 21:56:07 +00:00
Andrew Lenharth fef7dec9cc added stores to lsmark 
llvm-svn: 25552
 2006-01-23 21:51:33 +00:00
Andrew Lenharth 208bbe9ca9 fix up more lsmark stuff 
llvm-svn: 25550
 2006-01-23 21:23:26 +00:00
Andrew Lenharth ba97ea52d4 yea, lowering this stuff will basically work 
llvm-svn: 25549
 2006-01-23 20:59:50 +00:00
Chris Lattner 8935e3eb7d remove the V8 simple isel 
llvm-svn: 25534
 2006-01-23 07:20:15 +00:00
Duraid Madina 37c8ad14f4 die, die!! r15, you are not callee-saved 
llvm-svn: 25527
 2006-01-23 06:11:45 +00:00
Duraid Madina cc87402925 fix register corruption! (my god.) r15 is a scratch reg, using that as 
a frame pointer is a pretty doofus thing to do. use r5 instead, and
mark it callee-saved, coz that's what it is!

llvm-svn: 25526
 2006-01-23 06:08:46 +00:00
Chris Lattner de02d7727f Add explicit #includes of <iostream> 
llvm-svn: 25515
 2006-01-22 23:41:00 +00:00
Chris Lattner 469640e506 Add explicit #includes of <iostream> 
llvm-svn: 25509
 2006-01-22 22:53:01 +00:00
Duraid Madina 4204e02fc6 insignificant, but next up is proper stack frame layout! 
llvm-svn: 25497
 2006-01-21 14:27:19 +00:00
Evan Cheng 468fecdc99 Rename fcmovae to fcmovnb and fcmova to fcmovnbe (following Intel manual). 
Some assemblers can't recognize the aliases.

llvm-svn: 25494
 2006-01-21 02:55:41 +00:00
Chris Lattner 9436aa74a9 trivial formatting improvement: don't insert extra blank lines between .comm 
vars.

llvm-svn: 25492
 2006-01-21 01:35:26 +00:00
Robert Bocchino 4b41c8e929 Make the C writer work with packed types. printContainedStructs is 
still not quite right and will be fixed later.

llvm-svn: 25488
 2006-01-20 20:43:57 +00:00
Duraid Madina f54c9395e7 remove RET hack, add proper support for rets (watching out for ret voids) 
llvm-svn: 25486
 2006-01-20 20:24:31 +00:00
Chris Lattner eca87342b4 Simplify CWriter::printContainedStructs, also allowing it to work with 
PackedTypes as a side-effect.

llvm-svn: 25485
 2006-01-20 18:57:03 +00:00
Chris Lattner 335b46dd20 LowerReturn now doesn't have to handle f32 returns. 
llvm-svn: 25484
 2006-01-20 18:41:25 +00:00
Duraid Madina 4026e12e85 fix sext breakage: now we correctly deal with functions that return 
int vs uint

llvm-svn: 25478
 2006-01-20 16:10:05 +00:00
Duraid Madina 9a8fb20689 fix storing bools! eek! 
llvm-svn: 25476
 2006-01-20 03:40:25 +00:00
Evan Cheng 0c5de2864f Stop doing that accidental commit. 
llvm-svn: 25474
 2006-01-20 01:14:05 +00:00
Evan Cheng cce748d316 A few more SH{L|R}D peepholes. 
llvm-svn: 25473
 2006-01-20 01:13:30 +00:00
Evan Cheng 9c30bd5e25 Didn't mean to commit the last one. 
llvm-svn: 25469
 2006-01-19 23:27:08 +00:00
Evan Cheng 8591b9f254 Added i16 SH{L|R}D patterns. 
llvm-svn: 25468
 2006-01-19 23:26:24 +00:00
Andrew Lenharth 5df67bcd50 typo 
llvm-svn: 25464
 2006-01-19 21:10:38 +00:00
Andrew Lenharth 688ea707d8 nasty nasty patterns 
llvm-svn: 25463
 2006-01-19 20:49:37 +00:00
Duraid Madina 550d8ec1ad fix boolean XOR (which fixes up comparisons..) 
llvm-svn: 25462
 2006-01-19 15:18:56 +00:00
Duraid Madina 4d69a01254 BOOM! 
llvm-svn: 25460
 2006-01-19 14:14:11 +00:00
Duraid Madina bcbcfac6ea click click 
llvm-svn: 25459
 2006-01-19 14:13:11 +00:00
Evan Cheng 3d2cc7e2e9 Avoid generating a redundant setcc. 
llvm-svn: 25457
 2006-01-19 08:52:46 +00:00
Duraid Madina 29b9d7cdff fix calls that return f32 
llvm-svn: 25455
 2006-01-19 08:31:51 +00:00
Chris Lattner 2efef3d6f1 implement support for f32 arguments past the first 6 words 
llvm-svn: 25450
 2006-01-19 07:22:29 +00:00
Evan Cheng 91007126c2 adc and sbb need an incoming flag to ensure it reads the carry flag 
from add / sub.

llvm-svn: 25444
 2006-01-19 06:53:20 +00:00
Chris Lattner c3c27032d0 add a note 
llvm-svn: 25439
 2006-01-19 02:09:38 +00:00
Evan Cheng a7bfbe996e Two peepholes: 
(or (x >> c) | (y << (32 - c))) ==> (shrd x, y, c)
(or (x << c) | (y >> (32 - c))) ==> (shld x, y, c)

llvm-svn: 25438
 2006-01-19 01:56:29 +00:00
Evan Cheng 6135a7a546 Didn't mean to check that in. 
llvm-svn: 25436
 2006-01-19 01:52:56 +00:00
Evan Cheng 267ba5965e A obvious typo 
llvm-svn: 25435
 2006-01-19 01:46:14 +00:00
Chris Lattner ce5066c863 Don't assert on 'select_cc SETUO' 
llvm-svn: 25423
 2006-01-18 19:42:35 +00:00
Chris Lattner 36eba3a49b fix out of date comment 
llvm-svn: 25422
 2006-01-18 19:37:44 +00:00
Chris Lattner 15e7642ab1 Fix Regression/CodeGen/PowerPC/2006-01-18-InvalidBranchOpcodeAssert.ll 
llvm-svn: 25421
 2006-01-18 19:35:21 +00:00
Jim Laskey 194a5268cb Added minimum Dwarf aranges. Cleaned up some section headers. Line number 
support now works in gdb.

llvm-svn: 25417
 2006-01-18 16:54:26 +00:00
Evan Cheng 621674a19d SRA shift amount must be in i8 
llvm-svn: 25416
 2006-01-18 09:26:46 +00:00
Evan Cheng 4b3774e0a2 If a call return type is i1, insert a truncate from X86::AL to i1. 
llvm-svn: 25415
 2006-01-18 08:08:38 +00:00
Evan Cheng feaed4d107 Fix lowering of calls which return f32 values. 
llvm-svn: 25413
 2006-01-17 21:58:21 +00:00
Jim Laskey cc9dfecf81 Add frame work for additional dwarf sections. Comments will improve as code 
is added.

llvm-svn: 25410
 2006-01-17 20:41:40 +00:00
Jim Laskey b9966029fe Adding basic support for Dwarf line number debug information. 
I promise to keep future commits smaller.

llvm-svn: 25396
 2006-01-17 17:31:53 +00:00
Evan Cheng 14417ed99c Zero extending load from i1 to i8. 
llvm-svn: 25391
 2006-01-17 07:02:46 +00:00
Duraid Madina e08a95d3c1 oops, this shouldn't have gotten in 
llvm-svn: 25388
 2006-01-17 03:09:48 +00:00
Evan Cheng 0d5b69f734 SSE does not support i64 SINT_TO_FP (FP stack doesn't either, but we custom 
expand it), so ask legalizer to expand i32 UINT_TO_FP.

llvm-svn: 25386
 2006-01-17 02:32:49 +00:00
Duraid Madina 266ff6056a use proper (82-bit) spills/fills when spilling FP regs, so that 
divides don't get broken. this fixes obsequi, smg2000, and probably
a bunch of other stuff (tm)

llvm-svn: 25385
 2006-01-17 02:04:52 +00:00
Duraid Madina c261469ad9 fixing divides 
llvm-svn: 25383
 2006-01-17 01:19:49 +00:00