Commit Graph

4681 Commits

Author SHA1 Message Date
Andrew Lenharth f5b7f16259 see what this allignment thing will do
llvm-svn: 26017
2006-02-06 17:15:17 +00:00
Jim Laskey 58d48c8118 We seem to have settled to __DWARF for section name.
llvm-svn: 26015
2006-02-06 14:16:15 +00:00
Evan Cheng d5f2ba0d6f - Update load folding checks to match those auto-generated by tblgen.
- Manually select SDOperand's returned by TryFoldLoad which make up the
  load address.

llvm-svn: 26012
2006-02-06 06:02:33 +00:00
Evan Cheng bfa4b7cc75 Complex pattern isel code shouldn't select nodes.
llvm-svn: 26010
2006-02-05 08:45:01 +00:00
Chris Lattner 463fa70eaa Fix the Sparc backend with Evan's recent tblgen changes
llvm-svn: 26009
2006-02-05 08:35:50 +00:00
Chris Lattner 8467e5d6af This xform isn't safe
llvm-svn: 26007
2006-02-05 08:26:16 +00:00
Chris Lattner 4b8fcc229f some stuff is done
llvm-svn: 26004
2006-02-05 07:54:37 +00:00
Evan Cheng a28b764886 Use SelectRoot() as the entry to any tblgen based isel.
llvm-svn: 25998
2006-02-05 06:51:51 +00:00
Evan Cheng 54cb1833a4 Use SelectRoot() as entry of any tblgen based isel.
llvm-svn: 25997
2006-02-05 06:46:41 +00:00
Chris Lattner 25777c8c25 Remove the SparcV8 backend. It has been renamed to be the Sparc backend.
llvm-svn: 25992
2006-02-05 06:33:29 +00:00
Chris Lattner a3e5b2c61c remove V8 reference
llvm-svn: 25991
2006-02-05 06:32:59 +00:00
Chris Lattner 158e1f519c Rename SPARC V8 target to be the LLVM SPARC target.
llvm-svn: 25985
2006-02-05 05:50:24 +00:00
Chris Lattner c0e48c6c58 add a note
llvm-svn: 25984
2006-02-05 05:27:35 +00:00
Evan Cheng d19d51f414 Re-commit the last bit of change that was backed out.
llvm-svn: 25983
2006-02-05 05:25:07 +00:00
Chris Lattner c070cb685d Use getPreferredAlignmentLog.
llvm-svn: 25980
2006-02-05 01:45:04 +00:00
Chris Lattner 1b1a8731c0 Use the asmprinter to find out what the preferred alignment of a global is.
This patch speeds up 172.mgrid from 31.81s to 11.39s on darwin/ppc.
Many many thanks to Nate for tracking down the root cause of the issue.

llvm-svn: 25979
2006-02-05 01:30:45 +00:00
Andrew Lenharth 1fcff15f86 linkage fix for weak functions
llvm-svn: 25976
2006-02-04 19:13:09 +00:00
Chris Lattner 22b4edfb42 Temporarily revert this patch, which probably breaks with the
tblgen patch reverted.

llvm-svn: 25971
2006-02-04 09:24:16 +00:00
Evan Cheng ce87cac555 Complex pattern's custom matcher should not call Select() on any operands.
Select them afterwards if it returns true.

llvm-svn: 25968
2006-02-04 08:50:49 +00:00
Chris Lattner ab146eae38 Custom lower VAARG for the case when we are doing vaarg(double). In this
case, the double being loaded may not be 8-byte aligned, so we have to use
our standard bit_convert game.

llvm-svn: 25967
2006-02-04 08:31:30 +00:00
Chris Lattner a1fa8b1c88 Fix a nasty typo that broke functions with big stack frames.
llvm-svn: 25966
2006-02-04 08:04:21 +00:00
Chris Lattner d096b2f3e0 fix a bug in my last checkin
llvm-svn: 25965
2006-02-04 07:48:46 +00:00
Nate Begeman a1e895cf97 Remove some stuff that now works
llvm-svn: 25963
2006-02-04 07:29:35 +00:00
Chris Lattner 32ed2b45c7 add a note
llvm-svn: 25962
2006-02-04 07:07:31 +00:00
Chris Lattner 2c0956bcea Two changes:
1. Treat FMOVD as a copy instruction, to help with coallescing in V9 mode
2. When in V9 mode, insert FMOVD instead of FpMOVD instructions, as we don't
   ever rewrite FpMOVD instructions into FMOVS instructions, thus we just end
   up with commented out copies!
This should fix a bunch of failures in V9 mode on sparc.

llvm-svn: 25961
2006-02-04 06:58:46 +00:00
Evan Cheng 0a977c95aa Remove an unnecessary predicate.
llvm-svn: 25954
2006-02-04 02:23:01 +00:00
Evan Cheng 11613a5219 Separate FILD and FILD_FLAG, the later is only used for SSE2. It produces a
flag so it can be flagged to a FST.

llvm-svn: 25953
2006-02-04 02:20:30 +00:00
Chris Lattner ee1dadbccf implementation of some methods for inlineasm
llvm-svn: 25951
2006-02-04 02:13:02 +00:00
Nate Begeman 20a894282d Implement some feedback from sabre
llvm-svn: 25946
2006-02-03 22:38:07 +00:00
Nate Begeman dc7bba9ffe Add a framework for eliminating instructions that produces undemanded bits.
llvm-svn: 25945
2006-02-03 22:24:05 +00:00
Chris Lattner 81e66abd1e add a note
llvm-svn: 25944
2006-02-03 22:06:45 +00:00
Chris Lattner d079dbb9b0 another case Nate came up with
llvm-svn: 25943
2006-02-03 22:05:41 +00:00
Chris Lattner 277462e20f add a note
llvm-svn: 25942
2006-02-03 21:25:23 +00:00
Chris Lattner a1d312c6ea remove an old comment
llvm-svn: 25940
2006-02-03 18:59:39 +00:00
Chris Lattner 23d55f2547 Remove the X86PeepholeOptimizerPass, a truly horrible old hack that is now
obsolete.  yaay :)

llvm-svn: 25939
2006-02-03 18:54:24 +00:00
Chris Lattner c408558638 When rewriting frame instructions, emit the appropriate small-immediate
instruction when possible.

llvm-svn: 25938
2006-02-03 18:20:04 +00:00
Chris Lattner ca76917388 Teach sparc to fold loads/stores into copies.
Remove the dead getRegClassForType method
minor formating changes.

llvm-svn: 25936
2006-02-03 07:06:25 +00:00
Chris Lattner d7d98611ca Implement isLoadFromStackSlot and isStoreToStackSlot
llvm-svn: 25932
2006-02-03 06:44:54 +00:00
Chris Lattner a23b04acdb remove some target-indep and implemented notes
llvm-svn: 25930
2006-02-03 06:22:11 +00:00
Chris Lattner d1aaee03ce target independent notes
llvm-svn: 25929
2006-02-03 06:21:43 +00:00
Nate Begeman fc567d85d5 Flesh out a couple of the items in the README
llvm-svn: 25928
2006-02-03 05:17:06 +00:00
Andrew Lenharth 1318240fd0 isStoreToStackSlot
llvm-svn: 25925
2006-02-03 03:07:37 +00:00
Chris Lattner a1eac9b978 the X86 backend no longer needs to delete its own noop copies
llvm-svn: 25923
2006-02-03 02:59:58 +00:00
Chris Lattner f0a2d66d1c Add a note
llvm-svn: 25921
2006-02-03 01:49:49 +00:00
Chris Lattner 9b178ce225 update a note
llvm-svn: 25918
2006-02-02 23:50:22 +00:00
Nate Begeman 4efb328926 add 64b gpr store to the possible list of isStoreToStackSlot opcodes.
llvm-svn: 25916
2006-02-02 21:07:50 +00:00
Chris Lattner 5123346708 fix operand numbers
llvm-svn: 25915
2006-02-02 20:38:12 +00:00
Chris Lattner c327d71e06 implement isStoreToStackSlot for PPC
llvm-svn: 25914
2006-02-02 20:16:12 +00:00
Chris Lattner bb53acd03c Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :)
llvm-svn: 25913
2006-02-02 20:12:32 +00:00
Chris Lattner 246ee44c8f implement isStoreToStackSlot
llvm-svn: 25911
2006-02-02 20:00:41 +00:00
Chris Lattner 0acc90c67e add a method
llvm-svn: 25910
2006-02-02 19:57:16 +00:00
Chris Lattner d8208c3665 more notes
llvm-svn: 25908
2006-02-02 19:43:28 +00:00
Chris Lattner d3f033e8e0 add a note, I have no idea how important this is.
llvm-svn: 25907
2006-02-02 19:16:34 +00:00
Chris Lattner e10e1024bc %fcc is not an alias for %fcc0
llvm-svn: 25906
2006-02-02 08:02:20 +00:00
Chris Lattner cb34968d19 correct an opcode
llvm-svn: 25905
2006-02-02 07:56:15 +00:00
Chris Lattner 9dd7df7ee7 new example
llvm-svn: 25903
2006-02-02 07:37:11 +00:00
Nate Begeman cd018525f8 Update the README
llvm-svn: 25902
2006-02-02 07:27:56 +00:00
Chris Lattner e0c60d63b1 Implement MaskedValueIsZero for ANY_EXTEND nodes
llvm-svn: 25900
2006-02-02 06:43:15 +00:00
Chris Lattner 4b2ec8af23 implemented, testcase here: test/Regression/CodeGen/X86/compare-add.ll
llvm-svn: 25899
2006-02-02 06:36:48 +00:00
Evan Cheng d3908f79cb Update.
llvm-svn: 25896
2006-02-02 02:40:17 +00:00
Evan Cheng d8fba3a1ee Fix a erroneous comment.
llvm-svn: 25894
2006-02-02 00:28:23 +00:00
Chris Lattner 6132a87cf4 more notes
llvm-svn: 25890
2006-02-01 23:38:08 +00:00
Evan Cheng b3ea2677a4 Tell codegen MOVAPSrr and MOVAPDrr are copies.
llvm-svn: 25889
2006-02-01 23:03:16 +00:00
Evan Cheng f1ed826c2a Added SSE entries to foldMemoryOperand().
llvm-svn: 25888
2006-02-01 23:02:25 +00:00
Evan Cheng 8b40cde148 Rearrange code to my liking. :)
llvm-svn: 25887
2006-02-01 23:01:57 +00:00
Chris Lattner f7f056751c add a method
llvm-svn: 25884
2006-02-01 22:38:46 +00:00
Chris Lattner 2f7650f9dc another note
llvm-svn: 25883
2006-02-01 21:44:48 +00:00
Andrew Lenharth 4b1c726fbb Add immediate forms of cmov and remove some cruft
llvm-svn: 25882
2006-02-01 19:37:33 +00:00
Chris Lattner ba56b5dc35 Finegrainify namespacification
llvm-svn: 25877
2006-02-01 18:10:56 +00:00
Chris Lattner a983beab37 add a note
llvm-svn: 25876
2006-02-01 17:54:23 +00:00
Nate Begeman 7e7f439f85 Fix some of the stuff in the PPC README file, and clean up legalization
of the SELECT_CC, BR_CC, and BRTWOWAY_CC nodes.

llvm-svn: 25875
2006-02-01 07:19:44 +00:00
Chris Lattner 3da1bb520e add a note, I'll take care of this after nate commits his big patch
llvm-svn: 25873
2006-02-01 06:40:32 +00:00
Evan Cheng 9e350cd6ad - Use xor to clear integer registers (set R, 0).
- Added a new format for instructions where the source register is implied
  and it is same as the destination register. Used for pseudo instructions
  that clear the destination register.

llvm-svn: 25872
2006-02-01 06:13:50 +00:00
Evan Cheng c404b5748c Remove another entry.
llvm-svn: 25871
2006-02-01 06:08:48 +00:00
Chris Lattner b0a76b0981 Another regression from the pattern isel
llvm-svn: 25867
2006-02-01 01:44:25 +00:00
Chris Lattner 7ed3101d14 Beef up the interface to inline asm constraint parsing, making it more general, useful, and easier to use.
llvm-svn: 25866
2006-02-01 01:29:47 +00:00
Evan Cheng a24617f5d4 Return's chain should be matching either the chain produced by the
value or the chain going into the load.

llvm-svn: 25863
2006-02-01 01:19:32 +00:00
Chris Lattner a0527473ac another testcase.
llvm-svn: 25862
2006-02-01 00:28:12 +00:00
Evan Cheng e1ce4d7115 When folding a load into a return of SSE value, check the chain to
ensure the memory location has not been clobbered.

llvm-svn: 25861
2006-02-01 00:20:21 +00:00
Evan Cheng bc1fcd074e Remove an item. It's done.
llvm-svn: 25860
2006-02-01 00:15:53 +00:00
Evan Cheng 5659ca8f47 Be smarter about whether to store the SSE return value in memory. If
it is already available in memory, do a fld directly from there.

llvm-svn: 25859
2006-01-31 23:19:54 +00:00
Chris Lattner 64387c3e9c turning these into 'adds' would require extra copies
llvm-svn: 25858
2006-01-31 22:59:46 +00:00
Evan Cheng 72d5c256c9 - Allow XMM load (for scalar use) to be folded into ANDP* and XORP*.
- Use XORP* to implement fneg.

llvm-svn: 25857
2006-01-31 22:28:30 +00:00
Evan Cheng a91eb48547 Remove entries on fabs and fneg. These are done.
llvm-svn: 25856
2006-01-31 22:26:21 +00:00
Evan Cheng 32be2dc0af Allow the specification of explicit alignments for constant pool entries.
llvm-svn: 25855
2006-01-31 22:23:14 +00:00
Chris Lattner c642aa5e1c * Fix 80-column violations
* Rename hasSSE -> hasSSE1 to avoid my continual confusion with 'has any SSE'.
* Add inline asm constraint specification.

llvm-svn: 25854
2006-01-31 19:43:35 +00:00
Chris Lattner 0151361d21 add info about the inline asm register constraints for PPC
llvm-svn: 25853
2006-01-31 19:20:21 +00:00
Chris Lattner 0962ffc4a6 add a missing break that caused a lot of failures last night :(
llvm-svn: 25851
2006-01-31 17:20:06 +00:00
Nate Begeman a162f208ee Codegen
bool %test(int %X) {
  %Y = seteq int %X, 13
  ret bool %Y
}

as

_test:
        addi r2, r3, -13
        cntlzw r2, r2
        srwi r3, r2, 5
        blr

rather than

_test:
        cmpwi cr7, r3, 13
        mfcr r2
        rlwinm r3, r2, 31, 31, 31
        blr

This has very little effect on most code, but speeds up analyzer 23% and
mason 11%

llvm-svn: 25848
2006-01-31 08:17:29 +00:00
Chris Lattner ac9892ccaf okay, one more
llvm-svn: 25847
2006-01-31 07:45:45 +00:00
Chris Lattner 882611dc25 another note
llvm-svn: 25846
2006-01-31 07:45:08 +00:00
Chris Lattner 24b0742476 More notes
llvm-svn: 25845
2006-01-31 07:43:33 +00:00
Chris Lattner 57480d0634 another one
llvm-svn: 25844
2006-01-31 07:38:32 +00:00
Chris Lattner 17cd988419 add a note
llvm-svn: 25843
2006-01-31 07:37:20 +00:00
Chris Lattner 799716141b add conditional moves of float and double values on int/fp condition codes.
llvm-svn: 25842
2006-01-31 07:26:55 +00:00
Chris Lattner b0fe138b65 example nate pointed out
llvm-svn: 25841
2006-01-31 07:16:34 +00:00
Chris Lattner 6f9bf658a7 treat conditional branches the same way as conditional moves (giving them
an operand that contains the condcode), making things significantly simpler.

llvm-svn: 25840
2006-01-31 06:56:30 +00:00
Chris Lattner 21ec192419 compactify all of the integer conditional moves into one instruction that takes
a CC as an operand.  Much smaller, much happier.

llvm-svn: 25839
2006-01-31 06:49:09 +00:00
Chris Lattner 196d58373c Add immediate forms of integer cmovs
llvm-svn: 25838
2006-01-31 06:24:29 +00:00
Chris Lattner 283492b4fe Shrinkify
llvm-svn: 25837
2006-01-31 06:18:16 +00:00
Chris Lattner 70c9e42593 Add the full complement of conditional moves of integer registers.
llvm-svn: 25834
2006-01-31 05:26:36 +00:00
Chris Lattner b6493b3165 Compile this:
void %X(int %A) {
        %C = setlt int %A, 123          ; <bool> [#uses=1]
        br bool %C, label %T, label %F

T:              ; preds = %0
        call int %main( int 0 )         ; <int>:0 [#uses=0]
        ret void

F:              ; preds = %0
        ret void
}

to this:

X:
        save -96, %o6, %o6
        subcc %i0, 122, %l0
        bg .LBBX_2      ! F
        nop
...

not this:

X:
        save -96, %o6, %o6
        sethi 0, %l0
        or %g0, 1, %l1
        subcc %i0, 122, %l2
        bg .LBBX_4      !
        nop
.LBBX_3:        !
        or %g0, %l0, %l1
.LBBX_4:        !
        subcc %l1, 0, %l0
        bne .LBBX_2     ! F
        nop

llvm-svn: 25833
2006-01-31 05:05:52 +00:00
Evan Cheng 2dd217b88f Added custom lowering of fabs
llvm-svn: 25831
2006-01-31 03:14:29 +00:00
Chris Lattner a9bfca8d1e add the 'lucas' optimization
llvm-svn: 25830
2006-01-31 02:55:28 +00:00
Chris Lattner 0e70729e83 I don't see why this optimization isn't safe, but it isn't, so disable it
llvm-svn: 25829
2006-01-31 02:45:52 +00:00
Chris Lattner d916e78b0a Another high-prio selection performance bug
llvm-svn: 25828
2006-01-31 02:10:06 +00:00
Chris Lattner 2b70a6f853 more mumbling
llvm-svn: 25826
2006-01-31 00:45:37 +00:00
Chris Lattner b521361fb9 add some notes
llvm-svn: 25825
2006-01-31 00:20:38 +00:00
Evan Cheng 45df7f84ff Don't generate complex sequence for SETOLE, SETOLT, SETULT, and SETUGT. Flip
the order of the compare operands and generate SETOGT, SETOGE, SETUGE, and
SETULE instead.

llvm-svn: 25824
2006-01-30 23:41:35 +00:00
Chris Lattner 9a90572374 Fix FP constants, and the SparcV8/2006-01-22-BitConvertLegalize.ll failure from last night
llvm-svn: 25819
2006-01-30 22:20:49 +00:00
Evan Cheng 08390f6a21 i64 -> f32, f32 -> i64 and some clean up.
llvm-svn: 25818
2006-01-30 22:13:22 +00:00
Evan Cheng 5b97fcf0f5 Always use FP stack instructions to perform i64 to f64 as well as f64 to i64
conversions. SSE does not have instructions to handle these tasks.

llvm-svn: 25817
2006-01-30 08:02:57 +00:00
Chris Lattner 37faeb2b02 Revamp the ICC/FCC reading instructions to be parameterized in terms of the
SPARC condition codes, not in terms of the DAG condcodes.  This allows us to
write nice clean patterns for cmovs/branches.

llvm-svn: 25815
2006-01-30 07:43:04 +00:00
Chris Lattner 33a79cae7c Compile:
uint %test(uint %X) {
        %Y = call uint %llvm.ctpop.i32(uint %X)
        ret uint %Y
}

to:

test:
        save -96, %o6, %o6
        sll %i0, 0, %l0
        popc %l0, %i0
        restore %g0, %g0, %g0
        retl
        nop

instead of to 40 logical ops.  Note the shift-by-zero that clears the top
part of the 64-bit V9 register.

Testcase here: CodeGen/SparcV8/ctpop.ll

llvm-svn: 25814
2006-01-30 06:14:02 +00:00
Chris Lattner 321e337d95 If the target has V9 instructions, this pass is a noop, don't bother
running it.

llvm-svn: 25811
2006-01-30 05:51:14 +00:00
Chris Lattner 90d3fd9e7c When in v9 mode, emit fabsd/fnegd/fmovd
llvm-svn: 25810
2006-01-30 05:48:37 +00:00
Chris Lattner 99dcb95e14 First step towards V9 instructions in the V8 backend, two conditional move
patterns.  This allows emission of this code:

t1:
        save -96, %o6, %o6
        subcc %i0, %i1, %l0
        move %icc, %i0, %i2
        or %g0, %i2, %i0
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

t1:
        save -96, %o6, %o6
        subcc %i0, %i1, %l0
        be .LBBt1_2     !
        nop
.LBBt1_1:       !
        or %g0, %i2, %i0
.LBBt1_2:       !
        restore %g0, %g0, %g0
        retl
        nop

for this:

int %t1(int %a, int %b, int %c) {
        %tmp.2 = seteq int %a, %b
        %tmp3 = select bool %tmp.2, int %a, int %c
        ret int %tmp3
}

llvm-svn: 25809
2006-01-30 05:35:57 +00:00
Chris Lattner 238fe93242 Two changes:
1. Default to having V9 instructions, instead of just V8.
2. unless -enable-sparc-v9-insts is passed, disable V9 (for use with llcbeta)

llvm-svn: 25807
2006-01-30 04:57:43 +00:00
Chris Lattner af209b8b13 When lowering SELECT_CC, see if the input is a lowered SETCC. If so, fold
the two operations together.  This allows us to compile this:

void %two(int %a, int* %b) {
        %tmp.2 = seteq int %a, 0
        %tmp.0.0 = select bool %tmp.2, int 10, int 20
        store int %tmp.0.0, int* %b
        ret void
}

into:

two:
        save -96, %o6, %o6
        or %g0, 20, %l0
        or %g0, 10, %l1
        subcc %i0, 0, %l2
        be .LBBtwo_2    ! entry
        nop
.LBBtwo_1:      ! entry
        or %g0, %l0, %l1
.LBBtwo_2:      ! entry
        st %l1, [%i1]
        restore %g0, %g0, %g0
        retl
        nop

instead of:

two:
        save -96, %o6, %o6
        sethi 0, %l0
        or %g0, 1, %l1
        or %g0, 20, %l2
        or %g0, 10, %l3
        subcc %i0, 0, %l4
        be .LBBtwo_2    ! entry
        nop
.LBBtwo_1:      ! entry
        or %g0, %l0, %l1
.LBBtwo_2:      ! entry
        subcc %l1, 0, %l0
        bne .LBBtwo_4   ! entry
        nop
.LBBtwo_3:      ! entry
        or %g0, %l2, %l3
.LBBtwo_4:      ! entry
        st %l3, [%i1]
        restore %g0, %g0, %g0
        retl
        nop

llvm-svn: 25806
2006-01-30 04:34:44 +00:00
Chris Lattner f0b24d2dc0 Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler.
llvm-svn: 25803
2006-01-30 04:09:27 +00:00
Chris Lattner 4ac0fa2aa5 Implement isMaskedValueZeroForTargetNode for the various v8 selectcc nodes,
allowing redundant and's to be eliminated by the dag combiner.

llvm-svn: 25800
2006-01-30 03:51:45 +00:00
Chris Lattner c6fa0282d2 adjust prototype
llvm-svn: 25798
2006-01-30 03:49:07 +00:00
Chris Lattner 32058cfb7b Functions that are lazily streamed in from the .bc file are *not* external.
This fixes llvm-test/SingleSource/UnitTests/2006-01-29-SimpleIndirectCall.c
and PR704

llvm-svn: 25793
2006-01-29 20:49:17 +00:00
Chris Lattner 3c6a950653 add another note
llvm-svn: 25789
2006-01-29 09:46:06 +00:00
Chris Lattner dabee1f655 add some performance notes from looking at sgefa
llvm-svn: 25788
2006-01-29 09:42:20 +00:00
Chris Lattner 7c7cbde0e5 add a high-priority SSE issue from sgefa
llvm-svn: 25787
2006-01-29 09:14:47 +00:00
Chris Lattner 5a7a22c9dd add a missed optimization
llvm-svn: 25786
2006-01-29 09:08:15 +00:00
Chris Lattner 3072af4d4f Now that OpActions is big enough, we can specify actions for vector types
llvm-svn: 25784
2006-01-29 08:41:37 +00:00
Chris Lattner 8a4a3deaf9 clean up interface to ValueTypeActions
llvm-svn: 25783
2006-01-29 08:41:12 +00:00
Chris Lattner d7738e6b32 disable this for now
llvm-svn: 25778
2006-01-29 07:31:33 +00:00
Reid Spencer 0c05a2c99c Add a note about lowering llvm.memset, llvm.memcpy, and llvm.memmove to a
few stores under certain conditions.

llvm-svn: 25777
2006-01-29 06:48:25 +00:00
Chris Lattner 35d20a4c00 remove now-dead code, the legalizer takes care of this for us
llvm-svn: 25776
2006-01-29 06:45:31 +00:00
Chris Lattner 132177e103 The FP stack doesn't support UNDEF, ask the legalizer to legalize it
instead of lying and saying we have it.

llvm-svn: 25775
2006-01-29 06:44:22 +00:00
Chris Lattner d33c60b52b Request expansion of ConstantVec nodes.
llvm-svn: 25773
2006-01-29 06:32:58 +00:00
Chris Lattner 61c9a8e942 Targets all now request ConstantFP to be legalized into TargetConstantFP.
'fpimm' in .td files is now TargetConstantFP.

llvm-svn: 25771
2006-01-29 06:26:08 +00:00
Chris Lattner b5f0ba6051 Update alpha to reflect recent constantfp legalize changes. It's not clear
why all this code isn't autogenerated. :(

llvm-svn: 25770
2006-01-29 06:25:22 +00:00
Chris Lattner 1b09c6ba87 cmovle != cmovlt
llvm-svn: 25761
2006-01-29 03:47:30 +00:00
Jeff Cohen 4ab39e43e8 Fix typo.
llvm-svn: 25760
2006-01-29 03:45:35 +00:00
Jeff Cohen 8643ea67b1 Flesh out AMD family/models.
llvm-svn: 25755
2006-01-28 20:30:18 +00:00
Jeff Cohen 58ca0be9af Correctly determine CPU vendor.
llvm-svn: 25754
2006-01-28 19:48:34 +00:00
Jeff Cohen 71287085a1 Use union instead of reinterpret_cast.
llvm-svn: 25751
2006-01-28 18:47:32 +00:00
Jeff Cohen b5de47cd9a Fix recognition of Intel CPUs.
llvm-svn: 25750
2006-01-28 18:38:20 +00:00
Chris Lattner b3ab2d3a42 Is64Bit reflects the capability of the chip, not an aspect of the target os
llvm-svn: 25749
2006-01-28 18:23:48 +00:00
Chris Lattner be08957dc5 Fix a bunch of JIT failures with the new isel
llvm-svn: 25748
2006-01-28 18:19:37 +00:00
Jeff Cohen e128d5f724 Improve X86 subtarget support for Windows and AMD.
llvm-svn: 25747
2006-01-28 18:09:06 +00:00
Chris Lattner ccd2a20c4b silence a warning
llvm-svn: 25745
2006-01-28 10:34:47 +00:00
Chris Lattner 30432e07f0 Fix a bug in my elimination of ISD::CALL this morning. PPC now has to
provide the expansion for i64 calls itself

llvm-svn: 25735
2006-01-28 07:33:03 +00:00
Chris Lattner dc8bbb6527 make this work on non-native hosts
llvm-svn: 25734
2006-01-28 06:05:41 +00:00
Chris Lattner 0c7b4666a3 add a note about how we should implement this FIXME from the legalizer:
// FIXME: revisit this when we have some kind of mechanism by which targets
    // can decided legality of vector constants, of which there may be very
    // many.

llvm-svn: 25733
2006-01-28 05:40:47 +00:00
Nate Begeman 595ec734fc Implement Promote for VAARG, and allow it to be custom promoted for people
who don't want the default behavior (Alpha).

llvm-svn: 25726
2006-01-28 03:14:31 +00:00