Commit Graph

6968 Commits

Author SHA1 Message Date
Cameron Zwarich ac106273d4 The x86-64 ABI says that a bool is only guaranteed to be sign-extended to a byte
rather than an int. Thankfully, this only causes LLVM to miss optimizations, not
generate incorrect code.

This just fixes the zext at the return. We still insert an i32 ZextAssert when
reading a function's arguments, but it is followed by a truncate and another i8
ZextAssert so it is not optimized.

llvm-svn: 127766
2011-03-16 22:20:18 +00:00
Sean Callanan b60b0bc47e Enabled disassembler support for AVX instructions
in the instruction tables and fixed a few bugs that
were causing decode conflicts.  Rudimentary tests
are coming up in the next patch.

llvm-svn: 127646
2011-03-15 01:28:15 +00:00
Sean Callanan c3fd523731 X86 table-generator and disassembler support for the AVX
instruction set.  This code adds support for the VEX prefix
and for the YMM registers accessible on AVX-enabled
architectures.  Instruction table support that enables AVX
instructions for the disassembler is in an upcoming patch.

llvm-svn: 127644
2011-03-15 01:23:15 +00:00
Eric Christopher cf56a5034f Change the x86 32-bit scheduler to register pressure and fix up the
corresponding testcases back to the previous versions.

Fixes some performance regressions only seen on 32-bit.

llvm-svn: 127441
2011-03-11 01:05:58 +00:00
Stuart Hastings d17ae4e939 Revert 127359; it broke lencod.
llvm-svn: 127382
2011-03-10 00:25:53 +00:00
Evan Cheng b4c6a34415 Re-commit 127368 and 127371. They are exonerated.
llvm-svn: 127380
2011-03-10 00:16:32 +00:00
Evan Cheng d4b3f8e009 Revert 127368 and 127371 for now.
llvm-svn: 127376
2011-03-09 23:53:17 +00:00
Evan Cheng ca9a936332 Change the definition of TargetRegisterInfo::getCrossCopyRegClass to be more
flexible.

If it returns a register class that's different from the input, then that's the
register class used for cross-register class copies.
If it returns a register class that's the same as the input, then no cross-
register class copies are needed (normal copies would do).
If it returns null, then it's not at all possible to copy registers of the
specified register class.

llvm-svn: 127368
2011-03-09 22:47:38 +00:00
Benjamin Kramer 801c9afd94 Fix a pasto that broke all x86_64-elf targets.
llvm-svn: 127365
2011-03-09 22:07:13 +00:00
Stuart Hastings 9955e2f912 X86 byval copies no longer always_inline. <rdar://problem/8706628>
llvm-svn: 127359
2011-03-09 21:10:30 +00:00
Jan Sjödin 6348dc0566 Add createELFObjectTargetWriter method to TargetAsmBackend, which enables construction of non-standard ELFObjectWriters that can be used in MCJIT.
llvm-svn: 127346
2011-03-09 18:44:41 +00:00
NAKAMURA Takumi 58d1f93b03 Target/X86: Tweak va_arg for Win64 not to miss taking va_start when number of fixed args > 4.
llvm-svn: 127328
2011-03-09 11:33:15 +00:00
Benjamin Kramer 679cfb54ec X86: Fix the (saddo/ssub x, 1) -> incl/decl selection to check the right operand for 1.
Found by inspection.

llvm-svn: 127247
2011-03-08 15:20:20 +00:00
Eric Christopher eb19e9e9fc Turn on list-ilp scheduling by default on x86 and x86-64, fix up
testcases accordingly. Some are currently xfailed and will be filed
as bugs to be fixed or understood.

Performance results:

roughly neutral on SPEC
some micro benchmarks in the llvm suite are up between 100 and 150%, only
a pair of regressions that are due to be investigated

john-the-ripper saw:
10% improvement in traditional DES
8% improvement in BSDI DES
59% improvement in FreeBSD MD5
67% improvement in OpenBSD Blowfish
14% improvement in LM DES

Small compile time impact.

llvm-svn: 127208
2011-03-08 02:42:25 +00:00
Cameron Zwarich df61694417 Move getRegPressureLimit() from TargetLoweringInfo to TargetRegisterInfo.
llvm-svn: 127175
2011-03-07 21:56:36 +00:00
Andrew Trick 641e2d4f8c Increased the register pressure limit on x86_64 from 8 to 12
regs. This is the only change in this checkin that may affects the
default scheduler. With better register tracking and heuristics, it
doesn't make sense to artificially lower the register limit so much.

Added -sched-high-latency-cycles and X86InstrInfo::isHighLatencyDef to
give the scheduler a way to account for div and sqrt on targets that
don't have an itinerary. It is currently defaults to 10 (the actual
number doesn't matter much), but only takes effect on non-default
schedulers: list-hybrid and list-ilp.

Added several heuristics that can be individually disabled for the
non-default sched=list-ilp mode. This helps us determine how much
better we can do on a given benchmark than the default
scheduler. Certain compute intensive loops run much faster in this
mode with the right set of heuristics, and it doesn't seem to have
much negative impact elsewhere. Not all of the heuristics are needed,
but we still need to experiment to decide which should be disabled by
default for sched=list-ilp.

llvm-svn: 127067
2011-03-05 08:00:22 +00:00
Andrew Trick 27c079e1b0 whitespace
llvm-svn: 127065
2011-03-05 06:31:54 +00:00
Eli Friedman f63614a982 PR9377: Handle x86 str with register operand in a way consistent with gas.
llvm-svn: 126970
2011-03-04 00:10:17 +00:00
Tilmann Scheller 3bc0bcf3ad Use X86_thiscall calling convention for Win64 as well.
llvm-svn: 126934
2011-03-03 07:49:07 +00:00
Tilmann Scheller a3769f8021 Add Win64 thiscall calling convention.
llvm-svn: 126862
2011-03-02 19:29:22 +00:00
David Greene dd567b214b [AVX] Fix mask predicates for 256-bit UNPCKLPS/D and implement
missing patterns for them.

      Add a SIMD test subdirectory to hold tests for SIMD instruction
      selection correctness and quality.
'

llvm-svn: 126845
2011-03-02 17:23:43 +00:00
Duncan Sands c76ae9c8e0 Add datalayout information for the IEEE quad precision fp128 type.
llvm-svn: 126780
2011-03-01 20:56:50 +00:00
Chris Lattner c93d207e8c fix a signed comparison warning.
llvm-svn: 126682
2011-02-28 20:50:35 +00:00
David Greene 20a1cbefad [AVX] Add decode support for VUNPCKLPS/D instructions, both 128-bit
and 256-bit forms.  Because the number of elements in a vector
      does not determine the vector type (4 elements could be v4f32 or
      v4f64), pass the full type of the vector to decode routines.

llvm-svn: 126664
2011-02-28 19:06:56 +00:00
Benjamin Kramer 25bddae404 Silence enum conversion warnings.
llvm-svn: 126578
2011-02-27 18:13:53 +00:00
NAKAMURA Takumi d4e5003a3f Target/X86: Always emit "push/pop GPRs" in prologue/epilogue and emit "spill/reload frames" for XMMs.
It improves Win64's prologue/epilogue but it would not affect ia32 and amd64 (lack of nonvolatile XMMs).

llvm-svn: 126568
2011-02-27 08:47:19 +00:00
Owen Anderson b2c80da4ae Allow targets to specify a the type of the RHS of a shift parameterized on the type of the LHS.
llvm-svn: 126518
2011-02-25 21:41:48 +00:00
Cameron Zwarich fcf51fd298 Roll out r126425 and r126450 to see if it fixes the failures on the buildbots.
llvm-svn: 126488
2011-02-25 16:30:32 +00:00
Chris Lattner 0152b7bc7c remove command line option debugging hook.
llvm-svn: 126441
2011-02-24 21:53:03 +00:00
Devang Patel b037383a35 Enable DebugInfo support for COFF object files.
Patch by Nathan Jeffords!

llvm-svn: 126425
2011-02-24 21:04:00 +00:00
Evan Cheng 3923466e82 Fix bug in X86 folding / unfolding table. Int_CMPSDrm and Int_CMPSSrm memory
operands starts at index 2, not 1.
rdar://9045024
PR9305

llvm-svn: 126359
2011-02-24 02:36:52 +00:00
David Greene 9a6040dc86 [AVX] General VUNPCKL codegen support.
llvm-svn: 126264
2011-02-22 23:31:46 +00:00
Joerg Sonnenberger b7e635dcad Use the same (%dx) hack for in[bwl] as for out[bwl].
llvm-svn: 126244
2011-02-22 20:40:09 +00:00
Roman Divacky e8a93fe8f0 Stack alignment is 16 bytes on FreeBSD/i386 too.
llvm-svn: 126226
2011-02-22 17:30:05 +00:00
Joerg Sonnenberger 60e7629258 Recognize loopz and loopnz as aliases for loope and loopne.
From Dimitry Andric.

llvm-svn: 126168
2011-02-22 00:43:07 +00:00
Rafael Espindola e39062199e Implement xgetbv and xsetbv.
Patch by Jai Menon.

llvm-svn: 126165
2011-02-22 00:35:18 +00:00
Devang Patel f3292b2196 Revert r124611 - "Keep track of incoming argument's location while emitting LiveIns."
In other words, do not keep track of argument's location.  The debugger (gdb) is not prepared to see line table entries for arguments. For the debugger, "second" line table entry marks beginning of function body.
This requires some coordination with debugger to get this working. 
 - The debugger needs to be aware of prolog_end attribute attached with line table entries.
 - The compiler needs to accurately mark prolog_end in line table entries (at -O0 and at -O1+)

llvm-svn: 126155
2011-02-21 23:21:26 +00:00
Sean Callanan 5e8603d1b9 Fixed a bug in the X86 disassembler where a member of the
X86 instruction decode structure was being interpreted as
being in units of bits, although it is actually stored in
units of bytes.

llvm-svn: 126147
2011-02-21 21:55:05 +00:00
Duncan Sands bda7175a43 The stack should be 16 byte aligned on 32 bit solaris. Patch by Yuri.
llvm-svn: 126130
2011-02-21 17:37:17 +00:00
Chris Lattner 5237febf0c a serious "compare CSE" issue that is nontrivial to get right,
but which is responsible for us doing really bad things to 256.bzip2.

llvm-svn: 126126
2011-02-21 17:03:47 +00:00
NAKAMURA Takumi 860abd0f28 Target/X86/X86FastISel: [PR6275] Fix Win32's dllimport function with fastisel.
"dllimport" function must not be GlobalVariable, but Function. It is enough to check with GlobalValue.
test/CodeGen/X86/dll-linkage.ll is updated to check llc -O0.

llvm-svn: 126110
2011-02-21 04:50:06 +00:00
Cameron Zwarich 39314bdbc8 A lo/hi mul has higher latency than an imul r,ri, e.g. 5 cycles compared to 3
on Core 2 and Nehalem, so the code we generate is better than GCC's here.

llvm-svn: 126100
2011-02-21 01:29:32 +00:00
Cameron Zwarich 8731d0cc83 The signed version of our "magic number" computation for the integer approximation
of a constant had a minor typo introduced when copying it from the book, which
caused it to favor negative approximations over positive approximations in many
cases. Positive approximations require fewer operations beyond the multiplication.

In the case of division by 3, we still generate code that is a single instruction
larger than GCC's code.

llvm-svn: 126097
2011-02-21 00:22:02 +00:00
Eric Christopher ac6b001f56 If both operands are loads from stores in memory we can't use movlpd/movlps
since one needs to be a register operand. Just use movss instead of forcing
an operand into a register.

Fixes PR9239

llvm-svn: 126072
2011-02-20 05:04:42 +00:00
Oscar Fuentes ba1186c23e Use explicit add_subdirectory's for LLVM target sublibraries instead
of testing for its presence at cmake time.

This way the build automatically regenerates the makefiles when a svn
update brings in a new sublibrary.

llvm-svn: 126068
2011-02-20 02:55:27 +00:00
Eli Friedman 78b9851a3a Minor x86 README updates.
llvm-svn: 126054
2011-02-19 21:54:28 +00:00
Chris Lattner 47ffd35bea implement PR9264: disambiguating 'bt mem, imm' as a btl.
This is reasonable to do since all bt-mem forms do the
same thing.

llvm-svn: 126047
2011-02-19 21:06:36 +00:00
Eric Christopher c509ff6944 Fix typos.
llvm-svn: 126018
2011-02-19 03:19:09 +00:00
Chris Lattner 0281731cc2 add a poor division by constant case.
llvm-svn: 125832
2011-02-18 05:35:49 +00:00
Joerg Sonnenberger f69c80bac2 Recognize monitor/mwait with explicit register arguments
llvm-svn: 125805
2011-02-18 00:48:11 +00:00