Commit Graph

91 Commits

Author SHA1 Message Date
Jim Grosbach 5cba8de2c8 vml[as].f32 cause stalls in following advanced SIMD instructions. Avoid using
them for scalar floating point operations for now.

llvm-svn: 85697
2009-10-31 22:57:36 +00:00
Bob Wilson 0db964a3a0 Fix NEON VST2LN instruction encoding.
Patch by Johnny Chen.

llvm-svn: 84767
2009-10-21 17:54:01 +00:00
Bob Wilson 87671da29a Revert 84732. It was the wrong fix.
llvm-svn: 84766
2009-10-21 17:52:34 +00:00
Bob Wilson 5b5cb92816 Fix some more NEON instruction encoding problems.
Thanks to Johnny Chen for discovering the problem.

llvm-svn: 84732
2009-10-21 02:27:20 +00:00
Bob Wilson bd3650cc84 Leave some NEON instruction encoding bits unspecified instead of setting
a default value of zero.  This is important for decoding the instructions.
Patch by Johnny Chen, with some changes from me, too.

llvm-svn: 84730
2009-10-21 02:15:46 +00:00
Jim Grosbach 772b2f84eb Refs: A8-598.
Leave Inst{11-8}, which represents the starting byte index of the extracted
result in the concatenation of the operands and is left unspecified.

Patch by Johnny Chen.

llvm-svn: 84572
2009-10-20 00:38:19 +00:00
Bob Wilson 01404ecec7 Fix more NEON instruction encodings.
Patch by Johnny Chen.

llvm-svn: 84243
2009-10-16 03:58:44 +00:00
Bob Wilson 4138b11c93 Fix encoding bits for N3VLInt3_QHS multiclass with 8-bit elements.
Patch by Johnny Chen.

llvm-svn: 84206
2009-10-15 21:57:47 +00:00
Bob Wilson cfcf6bc70d Fix instruction encoding bits for NEON VPADAL.
Patch by Johnny Chen.

llvm-svn: 84146
2009-10-14 21:43:17 +00:00
Jim Grosbach 94068707e1 Inst{11-8} for vshl should be 0b0101, not 0b1111.
Refs: A7-17 & A8-750.

Patch by Johnny Chen.

llvm-svn: 84131
2009-10-14 20:31:01 +00:00
Bob Wilson 84e7967fae Add codegen support for NEON vst4lane intrinsics with 128-bit vectors.
llvm-svn: 83600
2009-10-09 00:01:36 +00:00
Bob Wilson c409030838 Add codegen support for NEON vst3lane intrinsics with 128-bit vectors.
llvm-svn: 83598
2009-10-08 23:51:31 +00:00
Bob Wilson b851eb356a Add codegen support for NEON vst2lane intrinsics with 128-bit vectors.
llvm-svn: 83596
2009-10-08 23:38:24 +00:00
Bob Wilson 38ba47225a Add codegen support for NEON vld4lane intrinsics with 128-bit vectors.
Also fix some copy-and-paste errors in previous changes.

llvm-svn: 83590
2009-10-08 22:53:57 +00:00
Bob Wilson cf54e934f8 Add codegen support for NEON vld3lane intrinsics with 128-bit vectors.
llvm-svn: 83585
2009-10-08 22:27:33 +00:00
Bob Wilson c2728f44a9 Add codegen support for NEON vld2lane intrinsics with 128-bit vectors.
llvm-svn: 83568
2009-10-08 18:56:10 +00:00
Bob Wilson b6b0ab6117 Add codegen support for NEON vst4 intrinsics with <1 x i64> vectors.
llvm-svn: 83526
2009-10-08 05:18:18 +00:00
Bob Wilson 71387b4b2f Add codegen support for NEON vst3 intrinsics with <1 x i64> vectors.
llvm-svn: 83518
2009-10-08 00:28:28 +00:00
Bob Wilson d4f5670096 Add codegen support for NEON vst2 intrinsics with <1 x i64> vectors.
llvm-svn: 83513
2009-10-08 00:21:01 +00:00
Bob Wilson 32cc4ec304 Add codegen support for NEON vld4 intrinsics with <1 x i64> vectors.
llvm-svn: 83508
2009-10-07 23:54:04 +00:00
Bob Wilson 5ef3c6d9f4 Add codegen support for NEON vld3 intrinsics with <1 x i64> vectors.
llvm-svn: 83506
2009-10-07 23:39:57 +00:00
Bob Wilson 763be1a248 Add codegen support for NEON vld2 intrinsics with <1 x i64> vectors.
llvm-svn: 83502
2009-10-07 22:57:01 +00:00
Bob Wilson 50820a2677 Add some instruction encoding bits for NEON load/store instructions.
llvm-svn: 83490
2009-10-07 21:53:04 +00:00
Bob Wilson e7ef4a9a6b Add codegen support for NEON vst4 intrinsics with 128-bit vectors.
llvm-svn: 83486
2009-10-07 20:49:18 +00:00
Bob Wilson 23464866ad Add codegen support for NEON vst3 intrinsics with 128-bit vectors.
llvm-svn: 83484
2009-10-07 20:30:08 +00:00
Bob Wilson 3dcb5377ef Add codegen support for NEON vst2 intrinsics with 128-bit vectors.
llvm-svn: 83482
2009-10-07 18:47:39 +00:00
Bob Wilson ab3a9474d6 Add codegen support for NEON vld4 intrinsics with 128-bit vectors.
llvm-svn: 83479
2009-10-07 18:09:32 +00:00
Bob Wilson 6bbefc2f67 Add codegen support for NEON vld3 intrinsics with 128-bit vectors.
llvm-svn: 83471
2009-10-07 17:24:55 +00:00
Bob Wilson e6b778d5ff Add codegen support for NEON vld2 operations on quad registers.
llvm-svn: 83422
2009-10-06 22:01:59 +00:00
Bob Wilson d76b9b766c Add a comment to describe letters used in multiclass name suffixes.
llvm-svn: 83257
2009-10-03 04:44:16 +00:00
Bob Wilson a9abf57409 Fix encoding problem for VMLS instruction.
Thanks to Johnny Chen for pointing this out!

llvm-svn: 83256
2009-10-03 04:41:21 +00:00
Evan Cheng 1b2b64f618 Add hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq flags to ld / st multiple,
ld / st pairs, etc.

llvm-svn: 83197
2009-10-01 08:22:27 +00:00
David Goodwin bea6848f9d Finish scheduling itineraries for NEON.
llvm-svn: 82788
2009-09-25 18:38:29 +00:00
David Goodwin afcaf79603 Checkpoint NEON scheduling itineraries.
llvm-svn: 82657
2009-09-23 21:38:08 +00:00
Anton Korobeynikov 8d0fbebb9f Add QPR_VFP2 regclass and add copy_to_regclass nodes, where needed to
constraint the register usage.

llvm-svn: 81635
2009-09-12 22:21:08 +00:00
Anton Korobeynikov 7697d37777 Unbreak getOnesVector() / getZeroVector() to use valid ARM extended imm's.
llvm-svn: 81262
2009-09-08 22:51:43 +00:00
Anton Korobeynikov 59e2b8e894 Add NEON 'laned' operations. This fixes another bunch of gcc testsuite fails and
makes the code faster.

llvm-svn: 81220
2009-09-08 15:22:32 +00:00
Anton Korobeynikov f0da41c3e4 More missed vdup patterns
llvm-svn: 80838
2009-09-02 21:21:28 +00:00
Bob Wilson d7797754d4 Add support for generating code for vst{234}lane intrinsics.
llvm-svn: 80707
2009-09-01 18:51:56 +00:00
Bob Wilson da9817cddd Generate code for vld{234}_lane intrinsics.
llvm-svn: 80656
2009-09-01 04:26:28 +00:00
Anton Korobeynikov 3681144bd8 Add missed pattern
llvm-svn: 80502
2009-08-30 19:06:39 +00:00
Anton Korobeynikov cd41d07f29 Add missed extract_element pattern
llvm-svn: 80408
2009-08-28 23:41:26 +00:00
Anton Korobeynikov 076f105d86 Forgot about actual change :)
llvm-svn: 80250
2009-08-27 16:10:17 +00:00
Anton Korobeynikov 58ebae4acd Transform float scalar_to_vector into subreg accesses.
No idea whether this is profitable or not.

llvm-svn: 80245
2009-08-27 14:38:44 +00:00
Bob Wilson f1beef9f48 Remove some unused SDNode definitions.
llvm-svn: 80015
2009-08-25 17:52:39 +00:00
Bob Wilson 9129376719 Expose the instruction contraint string as an argument to the NLdSt class.
llvm-svn: 80011
2009-08-25 17:46:06 +00:00
Bob Wilson ceffeb6abd Rename ARM "lane_cst" operands to "nohash_imm" since they are used for
several things other than Neon vector lane numbers.  For inline assembly
operands with a "c" print code, check that they really are immediates.

llvm-svn: 79676
2009-08-21 21:58:55 +00:00
Anton Korobeynikov 232b19c3d5 Fix some typos and use type-based isel for VZIP/VUZP/VTRN
llvm-svn: 79625
2009-08-21 12:41:42 +00:00
Anton Korobeynikov ce3ff1be8a Add nodes & dummy matchers for some v{zip,uzp,trn} instructions
llvm-svn: 79622
2009-08-21 12:40:50 +00:00
Anton Korobeynikov 38f284f2ae Provide vext.{16,32}
llvm-svn: 79620
2009-08-21 12:40:21 +00:00