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57 Commits

Author SHA1 Message Date
Nate Begeman 295ea90634 Use the new subtarget support to automatically choose the correct ABI 
and asm printer for PowerPC if one is not specified.

llvm-svn: 22659
 2005-08-04 20:49:48 +00:00
Nate Begeman 3bcfcd9474 Add Subtarget support to PowerPC. Next up, using it. 
llvm-svn: 22644
 2005-08-04 07:12:09 +00:00
Jeff Cohen 5f4ef3c5a8 Eliminate all remaining tabs and trailing spaces. 
llvm-svn: 22523
 2005-07-27 06:12:32 +00:00
Nate Begeman a9443f29b0 Support building non-PIC 
Remove the LoadHiAddr pseudo-instruction.
Optimization of stores to and loads from statics.
Force JIT to use new non-PIC codepaths.

llvm-svn: 22494
 2005-07-21 20:44:43 +00:00
Chris Lattner 53208ecf34 revert to using 4-byte alignment for doubles, as specified by the ABI 
llvm-svn: 22493
 2005-07-21 19:17:18 +00:00
Nate Begeman 8465fe8b4b Generate mfocrf when targeting g5. Generate fsqrt/fsqrts when targetin g5. 
8-byte align doubles.

llvm-svn: 22486
 2005-07-20 22:42:00 +00:00
Nate Begeman 0851f1aaa1 Integrate SelectFPExpr into SelectExpr. This gets PPC32 closer to being 
automatically generated from a target description.

llvm-svn: 22470
 2005-07-19 16:51:05 +00:00
Chris Lattner f11f48ba61 Refactor the addPassesToEmitAssembly interface into a addPassesToEmitFile 
interface.

llvm-svn: 22282
 2005-06-25 02:48:37 +00:00
Misha Brukman b440243e94 Remove trailing whitespace 
llvm-svn: 21425
 2005-04-21 23:30:14 +00:00
Nate Begeman 779c5cbb44 Make pattern isel default for ppc 
Add new ppc beta option related to using condition registers
Make pattern isel control flag (-enable-pattern-isel) global and tristate
  0 == off
  1 == on
  2 == target default

llvm-svn: 21309
 2005-04-15 22:12:16 +00:00
Nate Begeman 9203e169a7 Remove 64 bit simple ISel, it never worked correctly 
Add initial (buggy) implementation of 64 bit pattern ISel

llvm-svn: 21096
 2005-04-05 08:51:15 +00:00
Nate Begeman 7ec19b4d5a Implement more of the PPC32 Pattern ISel: 
1) dynamic stack alloc
2) loads
3) shifts
4) subtract
5) immediate form of add, and, or, xor
6) change flag from -pattern-isel to -enable-ppc-pattern-isel

Remove dead arguments from getGlobalBaseReg in the simple ISel

llvm-svn: 20810
 2005-03-24 06:28:42 +00:00
Nate Begeman 20e7e28ee7 Addition of the PPC32 Pattern ISel. While it is far from complete, it will 
be brought up to parity with the current simple ISel in the coming days.
Currently, -pattern-isel is required to trigger it.

llvm-svn: 20805
 2005-03-24 04:41:43 +00:00
Chris Lattner 5b5caaf3cd cleanup the cfg after lsr 
llvm-svn: 20410
 2005-03-02 21:56:00 +00:00
Chris Lattner c8bb99760a Add a temporary option for llc-beta: -enable-lsr-for-ppc, which turns on 
Loop Strength Reduction.

llvm-svn: 20399
 2005-03-02 06:19:22 +00:00
Chris Lattner 17550c456c Use the target triple to pick this target. 
llvm-svn: 18830
 2004-12-12 17:40:28 +00:00
Chris Lattner c0f8a1c721 The LLVM bool type shall have 1 byte alignment on PPC. 
llvm-svn: 18311
 2004-11-28 21:16:45 +00:00
Chris Lattner 497a622376 The JIT works enough 
llvm-svn: 18228
 2004-11-25 04:14:54 +00:00
Chris Lattner 24ad93f55c Remove this method. 
llvm-svn: 18159
 2004-11-23 18:47:42 +00:00
Nate Begeman 7e7a08dba5 Don't return value from void function. This is only temporary anyway while 
the JIT is made to work!

llvm-svn: 18155
 2004-11-23 10:04:49 +00:00
Chris Lattner 5369ab3e24 Be really paranoid about not breaking stuff yet 
llvm-svn: 18152
 2004-11-23 06:56:18 +00:00
Chris Lattner f5363dc789 Move JITInfo from PPCTM to PPC32TM 
llvm-svn: 18140
 2004-11-23 05:56:40 +00:00
Chris Lattner 6f01b4cf1f Remove this method, it's not clear how it could be implemented indep of 32 or 64-bit mode 
llvm-svn: 18038
 2004-11-20 04:17:17 +00:00
Chris Lattner ff43ef3cc5 Disable the JIT until it can sorta kinda work. 
llvm-svn: 17230
 2004-10-25 20:53:41 +00:00
Chris Lattner 3acdb7fa1b bling bling! 
llvm-svn: 16873
 2004-10-10 16:26:13 +00:00
Nate Begeman 4bfceb1ed5 All PPC instructions are now auto-printed 
32 and 64 bit AsmWriters unified
Darwin and AIX specific features of AsmWriter split out

llvm-svn: 16163
 2004-09-04 05:00:00 +00:00
Reid Spencer 7c16caa336 Changes For Bug 352 
Move include/Config and include/Support into include/llvm/Config,
include/llvm/ADT and include/llvm/Support. From here on out, all LLVM
public header files must be under include/llvm/.

llvm-svn: 16137
 2004-09-01 22:55:40 +00:00
Chris Lattner f1cd650251 Do not register ppc64 yet, as it breaks the SparcV9 backend 
llvm-svn: 15955
 2004-08-20 18:09:18 +00:00
Misha Brukman f73c87b36c LR needs to be saved at 16-byte offset on a 64-bit arch 
llvm-svn: 15929
 2004-08-19 21:36:14 +00:00
Misha Brukman ba7fe16dbf No need for an `is64bit' flag 
llvm-svn: 15857
 2004-08-17 05:06:47 +00:00
Nate Begeman 412602d7d9 Replace PowerPCPEI.cpp with target independant PrologEpilogInserter 
llvm-svn: 15746
 2004-08-14 22:16:36 +00:00
Misha Brukman af77fe4097 Disable PPC64 backend by default because LLC cannot choose automatically between 
SparcV9 and PowerPC64 without target triples, since they are both 64-bit
big-endian targets.

llvm-svn: 15688
 2004-08-12 17:16:43 +00:00
Misha Brukman c94c0f75f4 * Move AIX into the llvm namespace to be accessed from RegisterInfo 
* Mark InstrInfo with 32 vs. 64 bit flag
* Enable the 64-bit isel and asm printer

llvm-svn: 15672
 2004-08-11 23:47:08 +00:00
Misha Brukman 7224ee1e4c Hyphenate ##-bit and remove first-person from comments. 
llvm-svn: 15663
 2004-08-11 13:35:44 +00:00
Nate Begeman f17ea0f7b7 Clean up 32/64bit and Darwin/AIX split. Next steps: 64 bit ISel, AIX asm printer. 
llvm-svn: 15662
 2004-08-11 07:40:04 +00:00
Misha Brukman e67a212267 Breaking up the PowerPC target into 32- and 64-bit subparts, Part III: the rest. 
llvm-svn: 15636
 2004-08-11 00:11:25 +00:00
Misha Brukman eca36a5aa0 CodePrinter -> AsmPrinter 
llvm-svn: 15599
 2004-08-09 22:27:45 +00:00
Chris Lattner a8dcf2423e Changes commited for Nate Begeman: 
Use a PowerPC specific prolog epilog inserter to control where spilled
callee save regs are placed on the stack.
Get rid of implicit return address stack slot, save return address reg
(LR) in appropriate slot
Improve code generated for functions that don't have calls or access
globals


Note from Chris: PowerPCPEI will eventually be eliminated, once the
functionality is merged into CodeGen/PrologEpilogInserter.cpp

llvm-svn: 15536
 2004-08-06 06:58:50 +00:00
Misha Brukman 09396bf158 Run the branch selection pass right before the asm printer. 
Patch by Nate Begeman.

llvm-svn: 15285
 2004-07-27 18:39:34 +00:00
Misha Brukman 4fb48609dc Bool alignment on MacOSX/PowerPC is 4 bytes. 
llvm-svn: 15122
 2004-07-23 01:11:46 +00:00
Misha Brukman 75f3291ef3 Shorts are aligned to 2 bytes, bools to 1 byte (in structs). 
llvm-svn: 15048
 2004-07-20 20:59:57 +00:00
Misha Brukman dff882a230 Double alignment in structs is 4 bytes, not 8. Patch by Nate Begeman. 
llvm-svn: 15034
 2004-07-20 15:43:25 +00:00
Misha Brukman e6f4a5ebb0 We don't really need to #include IPO.h into this file. 
llvm-svn: 14911
 2004-07-17 18:37:46 +00:00
Misha Brukman a6b9a566b9 Define double alignment as 8 bytes now that assert(DoubleAlignment == PointerSize) 
has been eliminated

llvm-svn: 14891
 2004-07-16 19:32:12 +00:00
Brian Gaeke 5ce1408537 Do IMPLICIT_DEFs on incoming args' hard regs, to avoid confusing the regalloc. 
Support single-fp incoming args.
Support single-fp outgoing args ('call' operands).
Support double-fp return values.

llvm-svn: 14880
 2004-07-16 10:31:25 +00:00
Chris Lattner 2453818b8a The powerpc is now gone. However it is now just known as the Skeleton target. 
llvm-svn: 14877
 2004-07-16 07:14:34 +00:00
Chris Lattner c2726e63ed Delete the allocate*TargetMachine function, which is now dead . 
The shared command line options are now in a header that makes sense.

llvm-svn: 14756
 2004-07-11 04:17:10 +00:00
Chris Lattner 73eb9436ee Make these format a bit nicer 
llvm-svn: 14747
 2004-07-11 03:27:42 +00:00
Chris Lattner 4266f8017d Auto-registrate target 
llvm-svn: 14745
 2004-07-11 02:48:49 +00:00
Chris Lattner 6d6b3b3ce9 Fix the fixed stack offset, patch contributed by Vladimir Prus 
llvm-svn: 14110
 2004-06-10 06:19:25 +00:00