Commit Graph

111267 Commits

Author SHA1 Message Date
Michael Gottesman 77b1aa98ed Add an ArrayRef upcasting constructor from ArrayRef<U*> -> ArrayRef<T*> where T is a base of U.
llvm-svn: 225053
2014-12-31 23:33:18 +00:00
Sanjay Patel e68f71574f InstCombine: fsub nsz 0, X ==> fsub nsz -0.0, X
Some day the backend may handle instruction-level fast math flags and make
this transform unnecessary, but it's still better practice to use the canonical
representation of fneg when possible (use a -0.0).

This is a partial fix for PR20870 ( http://llvm.org/bugs/show_bug.cgi?id=20870 ).
See also http://reviews.llvm.org/D6723.

Differential Revision: http://reviews.llvm.org/D6731

llvm-svn: 225050
2014-12-31 22:14:05 +00:00
Rafael Espindola 54b435ec3c Add r224985 back with a fix.
The issues was that AArch64 has additional restrictions on when local
relocations can be used. We have to take those into consideration when
deciding to put a L symbol in the symbol table or not.

Original message:

Remove doesSectionRequireSymbols.

In an assembly expression like

bar:
.long L0 + 1

the intended semantics is that bar will contain a pointer one byte past L0.

In sections that are merged by content (strings, 4 byte constants, etc), a
single position in the section doesn't give the linker enough information.
For example, it would not be able to tell a relocation must point to the
end of a string, since that would look just like the start of the next.

The solution used in ELF to use relocation with symbols if there is a non-zero
addend.

In MachO before this patch we would just keep all symbols in some sections.

This would miss some cases (only cstrings on x86_64 were implemented) and was
inefficient since most relocations have an addend of 0 and can be represented
without the symbol.

This patch implements the non-zero addend logic for MachO too.

llvm-svn: 225048
2014-12-31 17:19:34 +00:00
Colin LeMahieu 5691eb5ee7 Reverting 225045 and 225043 and XFAIL multiline.ll on hexagon
llvm-svn: 225047
2014-12-31 17:14:35 +00:00
Rafael Espindola 35e42db3ed Add a test for the recent compiler-rt build failure.
llvm-svn: 225046
2014-12-31 16:58:05 +00:00
Colin LeMahieu 79e8ebada2 [Hexagon] Removing assertion to appease buildbot until I can reproduce the problem
llvm-svn: 225045
2014-12-31 16:20:00 +00:00
Rafael Espindola d4da9040de Revert "Remove doesSectionRequireSymbols."
This reverts commit r224985.

I am investigating why it made an Apple bot unhappy.

llvm-svn: 225044
2014-12-31 16:06:48 +00:00
Colin LeMahieu 94272611ac [Hexagon] Changing an llvm_unreachable to an assertion and returning 0. Relocations aren't implemented yet but we don't need to abort for this in release builds.
llvm-svn: 225043
2014-12-31 15:57:38 +00:00
Craig Topper a7a8c4c09e [X86] Update disassembler tests for absolute move instructions to check the encodings. This provides testing for r225036. 64-bit mode is still broken.
llvm-svn: 225037
2014-12-31 07:24:23 +00:00
Craig Topper 99bcab7b85 [X86] Fix disassembly of absolute moves to work correctly in 16 and 32-bit modes with all 4 combinations of OpSize and AdSize prefixes being present or not.
llvm-svn: 225036
2014-12-31 07:07:31 +00:00
Craig Topper 6e518776e3 [x86] Simplify detection of jcxz/jecxz/jrcxz in disassembler.
llvm-svn: 225035
2014-12-31 07:07:11 +00:00
David Majnemer f89dc3edc9 InstCombine: try to transform A-B < 0 into A < B
We are allowed to move the 'B' to the right hand side if we an prove
there is no signed overflow and if the comparison itself is signed.

llvm-svn: 225034
2014-12-31 04:21:41 +00:00
Alexey Samsonov 553185ee4b Revert "merge consecutive stores of extracted vector elements"
This reverts commit r224611. This change causes crashes
in X86 DAG->DAG Instruction Selection.

llvm-svn: 225031
2014-12-31 00:40:28 +00:00
Colin LeMahieu bc405294f0 [Hexagon] Adding accumulating add/sub, doubleword logic-not variants, doubleword bitfield extract, word parity, accumulating multiplies with saturation.
llvm-svn: 225024
2014-12-31 00:08:34 +00:00
David Blaikie 3927b97151 Fix a test case to not depend on asm comment syntax, so as to be portable
Too many different comment characters - instead of trying to account for
them all, instead disable the comments and just check for end-of-line
instead.

llvm-svn: 225020
2014-12-30 23:33:55 +00:00
David Blaikie 7a3f48292c Generalize even further, for ARM comment syntax (@)
llvm-svn: 225019
2014-12-30 23:23:58 +00:00
Colin LeMahieu 8971e055ae [Hexagon] Adding double-logic on predicate instructions.
llvm-svn: 225018
2014-12-30 23:22:39 +00:00
David Blaikie 56605aff6b Generalize test case to handle different asm syntax (# or // comments)
llvm-svn: 225017
2014-12-30 23:21:57 +00:00
Colin LeMahieu 65f3e12ed1 [Hexagon] Adding newvalue compare and jumps.
llvm-svn: 225015
2014-12-30 23:04:21 +00:00
Peter Collingbourne 64faca9b84 RTDyldMemoryManager.cpp: Make the reference to __morestack weak.
This fixes the DSO build for now. Eventually we should develop some
other mechanism to make this work correctly with DSOs.

llvm-svn: 225014
2014-12-30 22:52:33 +00:00
David Blaikie aeaa5bf55e DebugInfo: Omit is_stmt from line table entries on the same line.
GCC does this for non-zero discriminators and since GCC doesn't produce
column info, that was the only place it comes up there. For LLVM, since
we can emit discriminators and/or column info, it makes more sense to
invert the condition and just test for changes in line number.

This should resolve at least some of the GDB 7.5 test suite failures
created by recent Clang changes that increase the location fidelity
(which, since Clang defaults to including column info on Linux by
default created a bunch of cases that confused GDB).

In theory we could do this better/differently by grouping actual source
statements together in a similar manner to the way lexical scopes are
handled but given that GDB isn't really in a position to consume that (&
users are probably somewhat used to different lines being different
'statements') this seems the safest and cheapest change. (I'm concerned
that doing this 'right' would bloat the debugloc data even further -
something Duncan's working hard to address)

llvm-svn: 225011
2014-12-30 22:47:13 +00:00
Colin LeMahieu 0cba5f1b43 [Hexagon] Adding postincrement register newvalue stores.
llvm-svn: 225010
2014-12-30 22:34:08 +00:00
Colin LeMahieu 9014890819 [Hexagon] Removing old newvalue store variants. Adding postincrement immediate newvalue stores.
llvm-svn: 225009
2014-12-30 22:28:31 +00:00
Zoran Jovanovic 10646918d1 [mips][microMIPS] Relocate with symbol for micromips symbols
Differential Revision: http://reviews.llvm.org/D6796

llvm-svn: 225008
2014-12-30 22:04:16 +00:00
Colin LeMahieu 820d5cb608 [Hexagon] Adding indexed store new-value variants.
llvm-svn: 225007
2014-12-30 22:00:26 +00:00
Colin LeMahieu 2bad4a7177 [Hexagon] Adding indexed store of immediates.
llvm-svn: 225006
2014-12-30 21:01:38 +00:00
Colin LeMahieu 94a498bf0e [Hexagon] Adding indexed stores.
llvm-svn: 225005
2014-12-30 20:42:23 +00:00
Peter Collingbourne 7ef497b1f5 x86_64: Fix calls to __morestack under the large code model.
Under the large code model, we cannot assume that __morestack lives within
2^31 bytes of the call site, so we cannot use pc-relative addressing. We
cannot perform the call via a temporary register, as the rax register may
be used to store the static chain, and all other suitable registers may be
either callee-save or used for parameter passing. We cannot use the stack
at this point either because __morestack manipulates the stack directly.

To avoid these issues, perform an indirect call via a read-only memory
location containing the address.

This solution is not perfect, as it assumes that the .rodata section
is laid out within 2^31 bytes of each function body, but this seems to
be sufficient for JIT.

Differential Revision: http://reviews.llvm.org/D6787

llvm-svn: 225003
2014-12-30 20:05:19 +00:00
Kostya Serebryany aa185bfc4b [asan] change _sanitizer_cov_module_init to accept int* instead of int**
llvm-svn: 224999
2014-12-30 19:29:28 +00:00
Michael Kuperstein c43b063358 [COFF] Don't try to add quotes to already quoted linker directives
If a linker directive is already quoted, don't try to quote it again, otherwise it creates a mess.
This pops up in places like:
#pragma comment(linker,"\"/foo bar'\"")

Differential Revision: http://reviews.llvm.org/D6792

llvm-svn: 224998
2014-12-30 19:23:48 +00:00
Colin LeMahieu 9161d47476 [Hexagon] Adding reg-reg indexed load forms.
llvm-svn: 224997
2014-12-30 18:58:47 +00:00
Peter Collingbourne c5de311417 The __morestack function is only available on i386 and x86_64 architectures.
llvm-svn: 224994
2014-12-30 18:22:06 +00:00
Peter Collingbourne 06e8543cd0 Make the __morestack function available to the JIT memory manager under Linux.
This function's implementation lives in libgcc, a static library, so we need
to expose it explicitly, like the other such functions.

Differential Revision: http://reviews.llvm.org/D6788

llvm-svn: 224993
2014-12-30 18:06:52 +00:00
Colin LeMahieu 82fb8cba16 [Hexagon] Dropping old combine instructions without encodings.
llvm-svn: 224992
2014-12-30 17:53:54 +00:00
Colin LeMahieu 377ac65340 [Hexagon] Adding compare byte/halfword reg-reg/reg-imm forms. Adding compare to general register reg-imm form.
llvm-svn: 224991
2014-12-30 17:39:24 +00:00
Colin LeMahieu d7a56fd9ff [Hexagon] Updating constant extender def, adding alu-not instructions, compare to general register, and inverted compares.
llvm-svn: 224989
2014-12-30 15:44:17 +00:00
Elena Demikhovsky 84d1997b95 Some code improvements in Masked Load/Store.
No functional changes.

llvm-svn: 224986
2014-12-30 14:28:14 +00:00
Rafael Espindola b22d5aa49a Remove doesSectionRequireSymbols.
In an assembly expression like

bar:
.long L0 + 1

the intended semantics is that bar will contain a pointer one byte past L0.

In sections that are merged by content (strings, 4 byte constants, etc), a
single position in the section doesn't give the linker enough information.
For example, it would not be able to tell a relocation must point to the
end of a string, since that would look just like the start of the next.

The solution used in ELF to use relocation with symbols if there is a non-zero
addend.

In MachO before this patch we would just keep all symbols in some sections.

This would miss some cases (only cstrings on x86_64 were implemented) and was
inefficient since most relocations have an addend of 0 and can be represented
without the symbol.

This patch implements the non-zero addend logic for MachO too.

llvm-svn: 224985
2014-12-30 13:13:27 +00:00
Elena Demikhovsky 0705d0e8d4 reverted prev commit (it was a mistake)
llvm-svn: 224984
2014-12-30 10:17:21 +00:00
Elena Demikhovsky 74a35b4c5b v
llvm-svn: 224983
2014-12-30 10:13:38 +00:00
Philip Reames 4750dd18ea Add IRBuilder routines for gc.statepoints, gc.results, and gc.relocates
Nothing particularly interesting, just adding infrastructure for use by in tree users and out of tree users.

Note: These were extracted out of a working frontend, but they have not been well tested in isolation.

Differential Revision: http://reviews.llvm.org/D6807

llvm-svn: 224981
2014-12-30 05:55:58 +00:00
Rafael Espindola 2f471303c1 Simplify test a bit.
It looks like the original intent was to check which symbols were created.
With macho-dump the sections were being checked just to match which symbol
was in which section.

llvm-objdump prints the section a symbol is in.

llvm-svn: 224980
2014-12-30 05:09:17 +00:00
Peter Zotov ecb5c4f237 [OCaml] Fix bitrot in tests.
llvm-svn: 224979
2014-12-30 03:24:14 +00:00
Peter Zotov b45d5bd955 [lit] Make config.llvm_lib_dir available on cmake, too.
The OCaml tests require config.llvm_lib_dir to determine
the OCaml package search path.

llvm-svn: 224978
2014-12-30 03:24:11 +00:00
Peter Zotov 0bd44501c3 [OCaml] [cmake] Use LLVM_LIBRARY_DIR instead of LLVM_LIBRARY_OUTPUT_INTDIR.
The latter variable is internal.

Original patch by Ramkumar Ramachandra <artagnon@gmail.com>

llvm-svn: 224977
2014-12-30 03:24:07 +00:00
Craig Topper aa1c51ee01 Testcases for r224939.
llvm-svn: 224976
2014-12-30 02:35:56 +00:00
Rafael Espindola 81aef1bd52 Convert test to llvm-readobj. NFC.
llvm-svn: 224973
2014-12-30 01:34:06 +00:00
Philip Reames 5909ebcd6c Semantic tests for memory invalidation at statepoints
These are simply a collection of tests intended to show that information about the contents of gc references in the heap is lost at a statepoint. I've tried to write them so that they don't disallow correct transformations, while still being fairly easy to understand.

p.s. Ideas for additional tests are welcome.

Differential Revision: http://reviews.llvm.org/D6491

llvm-svn: 224971
2014-12-29 23:55:33 +00:00
Philip Reames 9db26ffc9a Carry facts about nullness and undef across GC relocation
This change implements four basic optimizations:

    If a relocated value isn't used, it doesn't need to be relocated.
    If the value being relocated is null, relocation doesn't change that. (Technically, this might be collector specific. I don't know of one which it doesn't work for though.)
    If the value being relocated is undef, the relocation is meaningless.
    If the value being relocated was known nonnull, the relocated pointer also isn't null. (Since it points to the same source language object.)

I outlined other planned work in comments.

Differential Revision: http://reviews.llvm.org/D6600

llvm-svn: 224968
2014-12-29 23:27:30 +00:00
Philip Reames b35f46ce06 Refine the notion of MayThrow in LICM to include a header specific version
In LICM, we have a check for an instruction which is guaranteed to execute and thus can't introduce any new faults if moved to the preheader. To handle a function which might unconditionally throw when first called, we check for any potentially throwing call in the loop and give up.

This is unfortunate when the potentially throwing condition is down a rare path. It prevents essentially all LICM of potentially faulting instructions where the faulting condition is checked outside the loop. It also greatly diminishes the utility of loop unswitching since control dependent instructions - which are now likely in the loops header block - will not be lifted by subsequent LICM runs.

define void @nothrow_header(i64 %x, i64 %y, i1 %cond) {
; CHECK-LABEL: nothrow_header
; CHECK-LABEL: entry
; CHECK: %div = udiv i64 %x, %y
; CHECK-LABEL: loop
; CHECK: call void @use(i64 %div)
entry:
  br label %loop
loop: ; preds = %entry, %for.inc
  %div = udiv i64 %x, %y
  br i1 %cond, label %loop-if, label %exit
loop-if:
  call void @use(i64 %div)
  br label %loop
exit:
  ret void
}

The current patch really only helps with non-memory instructions (i.e. divs, etc..) since the maythrow call down the rare path will be considered to alias an otherwise hoistable load.  The one exception is that it does kick in for loads which are known to be invariant without regard to other possible stores, i.e. those marked with either !invarant.load metadata of tbaa 'is constant memory' metadata.

Differential Revision: http://reviews.llvm.org/D6725

llvm-svn: 224965
2014-12-29 23:00:57 +00:00
Chandler Carruth cab512d629 [go] Teach the go cmake build functions to funnel the include directories down into the cgo-setup variables of llvm-go.
Summary:
This in turn allows us to use #includes with cgo that rely on CMake
provided include directories which is particularly useful for handling
generated headers that aren't reasonable to put in an "installable"
location.

Differential Revision: http://reviews.llvm.org/D6798

llvm-svn: 224962
2014-12-29 22:50:30 +00:00
Philip Reames 5ad26c353c Loading from null is valid outside of addrspace 0
This patches fixes a miscompile where we were assuming that loading from null is undefined and thus we could assume it doesn't happen.  This transform is perfectly legal in address space 0, but is not neccessarily legal in other address spaces.

We really should introduce a hook to control this property on a per target per address space basis.  We may be loosing valuable optimizations in some address spaces by being too conservative.

Original patch by Thomas P Raoux (submitted to llvm-commits), tests and formatting fixes by me.

llvm-svn: 224961
2014-12-29 22:46:21 +00:00
Rafael Espindola d351a18ebe Convert test to llvm-readobj. NFC.
llvm-svn: 224959
2014-12-29 22:14:35 +00:00
Colin LeMahieu 651b72095b [Hexagon] Adding allocframe, post-increment circular immediate stores, post-increment circular register stores, and bit reversed post-increment stores.
llvm-svn: 224957
2014-12-29 21:33:45 +00:00
Colin LeMahieu 488b6f7bbc [Hexagon] Fixing 224952 where an addressing mode update was missed.
llvm-svn: 224955
2014-12-29 21:18:02 +00:00
Alexey Samsonov 4c79845125 Remove unnecessary StringRef->std::string conversion.
llvm-svn: 224953
2014-12-29 20:59:02 +00:00
Colin LeMahieu bda31b42a0 [Hexagon] Adding post-increment register form stores and register-immediate form stores with tests.
llvm-svn: 224952
2014-12-29 20:44:51 +00:00
Colin LeMahieu 9a3cd3f58c [Hexagon] Replacing the remaining postincrement stores with versions that have encoding bits.
llvm-svn: 224951
2014-12-29 20:00:43 +00:00
Rafael Espindola 517b47232b Convert test to FileCheck. NFC.
llvm-svn: 224950
2014-12-29 19:50:32 +00:00
Colin LeMahieu 3d34afb32d [Hexagon] Renaming old multiclass for removal. Adding post-increment store classes and instruction defs.
llvm-svn: 224949
2014-12-29 19:42:14 +00:00
Chandler Carruth d86ab891c7 [py3] Teach the CMake build to reject Python versions older than 2.7.
Continue to require Python 2 however as recent experiments suggest
LLDB's build requires it.

llvm-svn: 224948
2014-12-29 19:36:05 +00:00
Craig Topper 31d6d9a0fb [X86] Fix some cases where some 8-bit instructions were marked as being convertible to three address instructions, but aren't really.
llvm-svn: 224940
2014-12-29 16:25:26 +00:00
Craig Topper 874a1966ae [X86] Add the 0x82 instructions to the disassebmler. They are identical in functionality to the 0x80 opcode instructions, but are not valid in 64-bit mode.
llvm-svn: 224939
2014-12-29 16:25:23 +00:00
Craig Topper c51b7993b8 [x86] Refactor some tablegen instruction info classes slightly to prepare for another change. NFC.
llvm-svn: 224938
2014-12-29 16:25:22 +00:00
Craig Topper 56c8e05c24 [x86] Remove unused classes from tablegen instruction info.
llvm-svn: 224937
2014-12-29 16:25:19 +00:00
Rafael Espindola 44eae72c40 Add segmented stack support for DragonFlyBSD.
Patch by Michael Neumann.

llvm-svn: 224936
2014-12-29 15:47:28 +00:00
Rafael Espindola bed67f3adc Refactor duplicated code.
No intended functionality change.

llvm-svn: 224935
2014-12-29 15:18:31 +00:00
Chandler Carruth 9db2b52468 [multilib] Add support to the autoconf build to substitute
a CLANG_LIBDIR_SUFFIX variable. This is necessary before I can add
support for using that variable to CMake and the C++ code in Clang, and
the autoconf build system does all substitutions in the LLVM tree.

As mentioned before, I'm not planning to add actual multilib support to
the autoconf build, just enough stubs for it to keep playing nicely with
the CMake build once that one has support.

llvm-svn: 224922
2014-12-29 11:58:17 +00:00
Chandler Carruth 7d58776fad [cmake] Teach the llvm-config program to respect LLVM_LIBDIR_SUFFIX.
For this to work, we have to encode it in the build variables and use it
from llvm-config.cpp. I've tried to do this reasonably cleanly, but the
code for llvm-config.cpp is pretty strange. However, with this,
llvm-config stops giving the wrong answer when using LLVM_LIBDIR_SUFFIX.

Note that the configure+make build just sets this to an empty string as
that build system has zero support for multilib of any form. I'm not
planning to add support there either, but this should leave a path for
anyone that wanted to.

llvm-svn: 224921
2014-12-29 11:16:25 +00:00
Chandler Carruth ab8df0b6c6 [cmake] Push LLVM_LIBDIR_SUFFIX through to the LLVMConfig.cmake file
that is used by other projects to build against LLVM. This will allow
subsequent patches to them to use LLVM_LIBDIR_SUFFIX, both when built as
part of the larger LLVM build an as part of a standalone build against
an installed set of LLVM libraries.

llvm-svn: 224920
2014-12-29 11:16:23 +00:00
Chandler Carruth a78e24e548 [cmake] Start making LLVM_LIBDIR_SUFFIX effective by adding it to
*numerous* places where it was missing in the CMake build. The primary
change here is that the suffix is now actually used for all of the lib
directories in the LLVM project's CMake. The various subprojects still
need similar treatment.

This is the first of a series of commits to try to make LLVM's cmake
effective in a multilib Linux installation. I don't think many people
are seriously using this variable so I'm hoping the fallout will be
minimal. A somewhat unfortunate consequence of the nature of these
commits is that until I land all of them, they will in part make the
brokenness of our multilib support more apparant. At the end, things
should actually work.

llvm-svn: 224919
2014-12-29 11:16:19 +00:00
Elena Demikhovsky e86c8c807f Fixed 2 minor typos in the documentation.
llvm-svn: 224917
2014-12-29 09:47:51 +00:00
NAKAMURA Takumi 4099328596 llvm/test/CodeGen/X86/fast-isel-call-bool.ll: Add explicit -mtriple=x86_64-unknown to satisfy x64.
llvm-svn: 224907
2014-12-28 23:37:11 +00:00
Keno Fischer fd22c6693b [X86][ISel] Fix a regression I introduced in r224884
The else case ResultReg was not checked for validity.
To my surprise, this case was not hit in any of the
existing test cases. This includes a new test cases
that tests this path.

Also drop the `target triple` declaration from the
original test as suggested by H.J. Lu, because
apparently with it the test won't be run on Linux

llvm-svn: 224901
2014-12-28 15:20:57 +00:00
Michael Kuperstein 683c3cde43 [X86] Add missing memory variants to AVX false dependency breaking
Adds missing memory instruction variants to AVX false dependency breaking handling. (SSE was handled in r224246)

Differential Revision: http://reviews.llvm.org/D6780

llvm-svn: 224900
2014-12-28 13:15:05 +00:00
Andrea Di Biagio 22ee3f63b9 [CodeGenPrepare] Teach when it is profitable to speculate calls to @llvm.cttz/ctlz.
If the control flow is modelling an if-statement where the only instruction in
the 'then' basic block (excluding the terminator) is a call to cttz/ctlz,
CodeGenPrepare can try to speculate the cttz/ctlz call and simplify the control
flow graph.

Example:
\code
entry:
  %cmp = icmp eq i64 %val, 0
  br i1 %cmp, label %end.bb, label %then.bb

then.bb:
  %c = tail call i64 @llvm.cttz.i64(i64 %val, i1 true)
  br label %end.bb

end.bb:
  %cond = phi i64 [ %c, %then.bb ], [ 64, %entry]
\code

In this example, basic block %then.bb is taken if value %val is not zero.
Also, the phi node in %end.bb would propagate the size-of in bits of %val
only if %val is equal to zero.

With this patch, CodeGenPrepare will try to hoist the call to cttz from %then.bb
into basic block %entry only if cttz is cheap to speculate for the target.

Added two new hooks in TargetLowering.h to let targets customize the behavior
(i.e. decide whether it is cheap or not to speculate calls to cttz/ctlz). The
two new methods are 'isCheapToSpeculateCtlz' and 'isCheapToSpeculateCttz'.
By default, both methods return 'false'.
On X86, method 'isCheapToSpeculateCtlz' returns true only if the target has
LZCNT. Method 'isCheapToSpeculateCttz' only returns true if the target has BMI.

Differential Revision: http://reviews.llvm.org/D6728

llvm-svn: 224899
2014-12-28 11:07:35 +00:00
Elena Demikhovsky 87700a734d Scalarizer for masked load and store intrinsics.
Masked vector intrinsics are a part of common LLVM IR, but they are really supported on AVX2 and AVX-512 targets. I added a code that translates masked intrinsic for all other targets. The masked vector intrinsic is converted to a chain of scalar operations inside conditional basic blocks.

http://reviews.llvm.org/D6436

llvm-svn: 224897
2014-12-28 08:54:45 +00:00
Craig Topper 6e3a582809 [x86] Prevent instruction selection of AVX512 cmp.ps/pd/ss/sd intrinsics with illegal immediates. Correctly this time. I did the wrong patterns the first time.
llvm-svn: 224891
2014-12-27 20:08:45 +00:00
David Majnemer d0bcef2040 PowerPC: CTR shouldn't fire if a TLS call is in the loop
Determining the address of a TLS variable results in a function call in
certain TLS models.  This means that a simple ICmpInst might actually
result in invalidating the CTR register.

In such cases, do not attempt to rely on the CTR register for loop
optimization purposes.

This fixes PR22034.

Differential Revision: http://reviews.llvm.org/D6786

llvm-svn: 224890
2014-12-27 19:45:38 +00:00
Aaron Ballman 4eb5c2e089 Fixing another -Wunused-variable warning, this time in release builds without asserts. NFC.
llvm-svn: 224889
2014-12-27 19:17:53 +00:00
Aaron Ballman b66d54c549 Removing a variable that is set but never used, to silence a -Wunused-but-set-variable warning; NFC.
llvm-svn: 224888
2014-12-27 19:01:19 +00:00
Craig Topper 1113fb343e [x86] Prevent instruction selection of AVX512 cmp.ps/pd/ss/sd intrinsics with illegal immediates. Forgot to do this when I did SSE/SSE2/AVX/AVX2.
llvm-svn: 224887
2014-12-27 18:51:06 +00:00
Craig Topper 53f75b9dc0 [x86] Assert on invalid immediates in the instruction printer for cmp.ps/pd/ss/sd instead of truncating the immediate. The assembly parser and instruction selection shouldn't generate invalid immediates.
llvm-svn: 224886
2014-12-27 18:11:00 +00:00
Craig Topper acc73445b7 [x86] Prevent llvm.x86.cmp.ps/pd/ss/sd from being selected with bad immediates. The frontend now checks this when the builtin is used. This will allow the instruction printer to not have to deal with invalid immediates on these instructions.
llvm-svn: 224885
2014-12-27 18:10:56 +00:00
Keno Fischer 8438b08663 [FastIsel][X86] Fix invalid register replacement for bool args
Summary:
Consider the following IR:

  %3 = load i8* undef
  %4 = trunc i8 %3 to i1
  %5 = call %jl_value_t.0* @foo(..., i1 %4, ...)
  ret %jl_value_t.0* %5

Bools (that are the result of direct truncs) are lowered as whatever
the argument to the trunc was and a "and 1", causing the part of the
MBB responsible for this argument to look something like this:

  %vreg8<def,tied1> = AND8ri %vreg7<kill,tied0>, 1, %EFLAGS<imp-def>; GR8:%vreg8,%vreg7

Later, when the load is lowered, it will insert

  %vreg15<def> = MOV8rm %vreg14, 1, %noreg, 0, %noreg; mem:LD1[undef] GR8:%vreg15 GR64:%vreg14

but remember to (at the end of isel) replace vreg7 by vreg15. Now for
the bug. In fast isel lowering, we mistakenly mark vreg8 as the result
of the load instead of the trunc. This adds a fixup to have
vreg8 replaced by whatever the result of the load is as well, so
we end up with

  %vreg15<def,tied1> = AND8ri %vreg15<kill,tied0>, 1, %EFLAGS<imp-def>; GR8:%vreg15

which is an SSA violation and causes problems later down the road.

This fixes PR21557.

Test Plan: Test test case from PR21557 is added to the test suite.

Reviewers: ributzka

Reviewed By: ributzka

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6245

llvm-svn: 224884
2014-12-27 13:10:15 +00:00
Rafael Espindola 47beb8ace0 Convert test to llvm-readobj. NFC.
llvm-svn: 224872
2014-12-26 22:47:39 +00:00
Colin LeMahieu 8233fb002d [Hexagon] Adding auto-incrementing loads with and without byte reversal.
llvm-svn: 224871
2014-12-26 21:09:25 +00:00
Colin LeMahieu 0a721cd4e1 [Hexagon] Adding locked loads.
llvm-svn: 224870
2014-12-26 20:42:27 +00:00
Colin LeMahieu ff370ed90e [Hexagon] Adding deallocframe and circular addressing loads.
llvm-svn: 224869
2014-12-26 20:30:58 +00:00
Colin LeMahieu c83cbbf6a1 [Hexagon] Adding remaining post-increment instruction variants. Removing unused classes.
llvm-svn: 224868
2014-12-26 19:31:46 +00:00
Colin LeMahieu fe9612e09d [Hexagon] Adding post-increment unsigned byte loads.
llvm-svn: 224867
2014-12-26 19:12:11 +00:00
Colin LeMahieu 96976a10a3 [Hexagon] Adding post-increment signed byte loads with tests.
llvm-svn: 224866
2014-12-26 18:57:13 +00:00
Rafael Espindola 1a7ef86add Use llvm-readobj. NFC.
llvm-svn: 224864
2014-12-26 18:22:05 +00:00
Craig Topper c4b12166f2 [X86] Add the debug registers DR8-DR15 so we can assemble and disassemble references to them.
llvm-svn: 224862
2014-12-26 18:20:05 +00:00
Craig Topper d5b39237a1 [X86] Don't fail disassembly if REX.R/REX.B is used on an MMX register. Similar fix to not fail to disassembler CR9-CR15 references.
llvm-svn: 224861
2014-12-26 18:19:44 +00:00
Timur Iskhodzhanov b6fa52f274 Band-aid fix for PR22032: don't emit DWARF debug info if AddressSanitizer is enabled on Windows
llvm-svn: 224860
2014-12-26 17:00:51 +00:00
Rafael Espindola 5d94634c13 No need to run llvm-as. NFC.
llvm-svn: 224859
2014-12-26 16:42:47 +00:00
David Majnemer b1296ec0fd InstCombine: Infer nuw for multiplies
A multiply cannot unsigned wrap if there are bitwidth, or more, leading
zero bits between the two operands.

llvm-svn: 224849
2014-12-26 09:50:35 +00:00
David Majnemer a55027f68a ValueTracking: Small cleanup in ComputeNumSignBits
Constant contains the isAllOnesValue and isNullValue predicates, not
ConstantInt.

llvm-svn: 224848
2014-12-26 09:20:17 +00:00
David Majnemer 54c2ca2539 InstCombe: Infer nsw for multiplies
We already utilize this logic for reducing overflow intrinsics, it makes
sense to reuse it for normal multiplies as well.

llvm-svn: 224847
2014-12-26 09:10:14 +00:00
Craig Topper ee9eef2fd8 Teach disassembler to handle illegal immediates on (v)cmpps/pd/ss/sd instructions. Instead of rejecting we'll just generate the _alt forms that don't try to alter the mnemonic. While I'm here, merge some common code in the Instruction printers for the condition code replacement and fix the mask on SSE to be 3-bits instead of 4.
llvm-svn: 224846
2014-12-26 06:36:28 +00:00
Craig Topper 2e44492b1d Use MCPhysReg for table of register encodings.
llvm-svn: 224845
2014-12-26 06:36:23 +00:00
Hal Finkel 0c505b08a5 [PowerPC] [FastISel] i1 constants must be zero extended
When materializing constant i1 values, they must be zero extended. We represent
i1 values as [0, 1], not [0, -1], in i32 registers. As it turns out, this code
path was dead for i1 values prior to r216006 (which is why this did not manifest in
miscompiles until recently).

Fixes -O0 self-hosting on PPC64/Linux.

llvm-svn: 224842
2014-12-25 23:08:25 +00:00
David Majnemer 25b383ac66 Silence GCC's -Wparentheses warning
No functionality change intended.

llvm-svn: 224833
2014-12-25 10:03:23 +00:00
Elena Demikhovsky 3d13f1c82c Documentation for Masked Load and Store intrinsics.
llvm-svn: 224832
2014-12-25 09:29:13 +00:00
Elena Demikhovsky fb81b93e17 Masked Load/Store - Changed the order of parameters in intrinsics.
No functional changes.
The documentation is coming.

llvm-svn: 224829
2014-12-25 07:49:20 +00:00
David Majnemer 2913eca4e2 CodeGen: Error on redefinitions instead of asserting
It's possible to have a prior definition of a symbol in module asm.
Raise an error instead of crashing.

llvm-svn: 224828
2014-12-24 23:06:55 +00:00
David Majnemer 8e92dfee20 CodeGen: Allow aliases to be overridden by variables
llvm-svn: 224827
2014-12-24 22:44:29 +00:00
Saleem Abdulrasool 747ec2dda3 MC: address some comments in deprecation checks
Bob Wilson pointed out the unnecessary checks that had been committed to the
instruction check predicates.  The check was meant to ensure that the check was
not accidentally applied to non-ARM instructions.  This is better served as an
assertion rather than a condition check.

llvm-svn: 224825
2014-12-24 18:40:42 +00:00
David Majnemer 58cb80c940 MC: Label definitions are permitted after .set directives
.set directives may be overridden by other .set directives as well as
label definitions.

This fixes PR22019.

llvm-svn: 224811
2014-12-24 10:27:50 +00:00
Saleem Abdulrasool 4d6ed7c778 IAS: correct debug line info for asm macros
Correct the line information generation for preprocessed assembly.  Although we
tracked the source information for the macro instantiation, we failed to account
for the fact that we were instantiating a macro, which is populated into a new
buffer and that the line information would be relative to the definition rather
than the actual instantiation location.  This could cause the line number
associated with the statement to be very high due to wrapping of the difference
calculated for the preprocessor line information emitted into the stream.
Properly calculate the line for the macro instantiation, referencing the line
where the macro is actually used as GCC/gas do.

The test case uses x86, though the same problem exists on any other target using
the LLVM IAS.

llvm-svn: 224810
2014-12-24 06:32:43 +00:00
Craig Topper b86338f7b2 [X86] Remove the single AdSize indicator and replace it with separate AdSize16/32/64 flags.
This removes a hardcoded list of instructions in the CodeEmitter. Eventually I intend to remove the predicates on the affected instructions since in any given mode two of them are valid if we supported addr32/addr16 prefixes in the assembler.

llvm-svn: 224809
2014-12-24 06:05:22 +00:00
David Majnemer 0fe246e079 MC: Don't emit .no_dead_strip on targets which don't support it
llvm-svn: 224808
2014-12-24 04:11:42 +00:00
Matthias Braun 51ca510094 LiveInterval: Remove accidentally committed debug code.
llvm-svn: 224807
2014-12-24 02:35:07 +00:00
Matthias Braun dbcca0dbb4 LiveInterval: Introduce createMainRangeFromSubranges().
This function constructs the main liverange by merging all subranges if
subregister liveness tracking is available. This should be slightly
faster to compute instead of performing the liveness calculation again
for the main range. More importantly it avoids cases where the main
liverange would cover positions where no subrange was live. These cases
happened for partial definitions where the actual defined part was dead
and only the undefined parts used later.

The register coalescing requires that every part covered by the main
live range has at least one subrange live.

I also expect this function to become usefull later for places where the
subranges are modified in a way that it is hard to correctly fix the
main liverange in the machine scheduler, we can simply reconstruct it
from subranges then.

llvm-svn: 224806
2014-12-24 02:11:51 +00:00
Matthias Braun 7030dda8d5 RegisterCoalescer: With subrange liveness there may be no RedefVNI for unused lanes.
llvm-svn: 224805
2014-12-24 02:11:48 +00:00
Matthias Braun 36768c684f LiveRangeEdit: Check for completely empy subranges after removing ValNos.
Completely empty subranges are not allowed and must be removed when
subreg liveness is enabled.

llvm-svn: 224804
2014-12-24 02:11:46 +00:00
Matthias Braun f603c88d13 LiveIntervalAnalysis: Fix performance bug that I introduced in r224663.
Without a reference the code did not remember when moving the iterators
of the subranges/registerunit ranges forward and instead would scan from
the beginning again at the next position.

llvm-svn: 224803
2014-12-24 02:11:43 +00:00
Peter Zotov 283e20219e [OCaml] PR21901: Update tests.
This finishes the fix partially applied by r224782.

llvm-svn: 224802
2014-12-24 01:58:45 +00:00
Peter Zotov af6535bf12 [OCaml] Expose Llvm_executionengine.get_{global_value,function}_address.
Patch by Ramkumar Ramachandra <artagnon@gmail.com>.

Also remove Llvm_executionengine.get_pointer_to_global, as it
is actually deprecated and didn't appear in a stable release.

llvm-svn: 224801
2014-12-24 01:52:51 +00:00
Chandler Carruth ffb7ce56a6 [SROA] Update the documentation and names for accessing the slices
within a partition of an alloca in SROA.

This reflects the fact that the organization of the slices isn't really
ideal for analysis, but is the naive way in which the slices are
available while we're processing them in the core partitioning
algorithm.

It is possible we could improve matters, and I've left a FIXME with
one of my ideas for how to do this, but it is a lot of work, the benefit
is somewhat minor, and it isn't clear that it would be strictly better.
=/ Not really satisfying, but I'm out of really good ideas.

This also improves one place where the debug logging failed to mark some
split partitions. Now we log in one place, slightly later, and with
accurate information about whether the slice is split by the partition
being rewritten.

llvm-svn: 224800
2014-12-24 01:48:09 +00:00
Adrian Prantl 3026a54aa2 Debug Info: In symmetry to DW_TAG_pointer_type, do not emit the byte size
of a DW_TAG_ptr_to_member_type.
This restores the behavior from before r224780-r224781.

llvm-svn: 224799
2014-12-24 01:17:51 +00:00
Chandler Carruth 5031bbe86a [SROA] Refactor the integer and vector promotion testing logic to
operate in terms of the new Partition class, and generally have a more
clear set of arguments. No functionality changed.

The most notable improvements here are consistently using the
terminology of 'partition' for a collection of slices that will be
rewritten together and 'slice' for a region of an alloca that is used by
a particular instruction.

This also makes it more clear that the split things are actually slices
as well, just ones that will be split by the proposed partition.

This doesn't yet address the confusing aspects of the partition's
interface where slices that will be split by the partition and start
prior to the partition are accesssed via Partition::splitSlices() while
the core range of slices exposed by a Partition includes both unsplit
slices and slices which will be split by the end, but started within the
offset range of the partition. This is particularly hard to address
because the algorithm which computes partitions quite literally doesn't
know which slices these will end up being until too late. I'm looking at
whether I can fix that or not, but I'm not optimistic. I'll update the
comments and/or names to further explain this either way. I've also
added one FIXME in this patch relating to this confusion so that I don't
forget about it.

llvm-svn: 224798
2014-12-24 01:05:14 +00:00
Colin LeMahieu e193e1c48b [Hexagon] Removing old classes.
llvm-svn: 224795
2014-12-24 00:43:00 +00:00
Kevin Enderby aefb00337f Another attempt to fix the LLVM Windows build bot lld-x86_64-win7, one last place to fix I think.
llvm-svn: 224794
2014-12-24 00:16:51 +00:00
Kevin Enderby 227df348cc Attempt to fix the LLVM Windows build bot lld-x86_64-win7.
llvm-svn: 224793
2014-12-23 23:43:59 +00:00
Kevin Enderby 48ef534b74 Add printing the LC_THREAD load commands with llvm-objdump’s -private-headers.
llvm-svn: 224792
2014-12-23 22:56:39 +00:00
Kostya Serebryany 9fdeb37bd3 [asan] change the coverage collection scheme so that we can easily emit coverage for the entire process as a single bit set, and if coverage_bitset=1 actually emit that bitset
llvm-svn: 224789
2014-12-23 22:32:17 +00:00
Hal Finkel fc096c98f3 [PowerPC] Ensure that the TOC reload directly follows bctrl on PPC64
On non-Darwin PPC64, the TOC reload needs to come directly after the bctrl
instruction (for indirect calls) because the 'bctrl/ld 2, 40(1)' instruction
sequence is interpreted by the unwinding code in libgcc. To make sure these
occur as a pair, as with other pairings interpreted by the linker, fuse the two
instructions into one instruction (for code generation only).

In the future, we might wish to do this by emitting CFI directives instead,
but this solution is simpler, and mirrors what GCC does. Additional discussion
on this point is contained in the PR.

Fixes PR22015.

llvm-svn: 224788
2014-12-23 22:29:40 +00:00
Colin LeMahieu 947cd70413 [Hexagon] Adding doubleword load.
llvm-svn: 224787
2014-12-23 20:44:59 +00:00
Colin LeMahieu 026e88d317 [Hexagon] Reapplying 224775 load words.
llvm-svn: 224786
2014-12-23 20:02:16 +00:00
Jozef Kolek ab6d1cce3e [mips][microMIPS] Implement CACHE, PREF, SSNOP, EHB and PAUSE instructions
Differential Revision: http://reviews.llvm.org/D5204

llvm-svn: 224785
2014-12-23 19:55:34 +00:00
Colin LeMahieu 20be15718b Reverting 224775 until mayLoad flag is addressed.
llvm-svn: 224783
2014-12-23 19:22:59 +00:00
Rafael Espindola c6c58d5e71 Finish removing DestroySource.
Fixes pr21901.

llvm-svn: 224782
2014-12-23 19:16:45 +00:00
Adrian Prantl 48af2ef40f DIBuilder: Similar to createPointerType, make createMemberPointerType take
a size and alignment. Several assertions in DwarfDebug rely on all variable
types to report back a size, or to be derived from a type with a size.

Tested in CFE.

llvm-svn: 224780
2014-12-23 19:11:47 +00:00
Mehdi Amini d38920891e Always assert in DAGCombine and not only when -debug is enabled
Right now in DAG Combine check the validity of the returned type 
only when -debug is given on the command line. However usually 
the test cases in the validation does not use -debug. 
An Assert build should always check this.

llvm-svn: 224779
2014-12-23 18:59:02 +00:00
Rafael Espindola eeb4d46c71 Pass LSAN_OPTIONS down so that it is possible to add suppressions.
llvm-svn: 224777
2014-12-23 18:39:02 +00:00
Rafael Espindola 538c9a88d9 Fix a leak found by asan.
llvm-svn: 224776
2014-12-23 18:18:37 +00:00
Colin LeMahieu 122aeaafea [Hexagon] Adding word loads.
llvm-svn: 224775
2014-12-23 18:06:56 +00:00
Colin LeMahieu 8e39cad934 [Hexagon] Adding signed halfword loads.
llvm-svn: 224774
2014-12-23 17:25:57 +00:00
Rafael Espindola 5c014f509b Fix a leak found by asan.
llvm-svn: 224773
2014-12-23 17:20:23 +00:00
Colin LeMahieu a9386d28a5 [Hexagon] Adding unsigned halfword load.
llvm-svn: 224772
2014-12-23 16:42:57 +00:00
Jozef Kolek 12c6982b3b [mips][microMIPS] Implement LWSP and SWSP instructions
Differential Revision: http://reviews.llvm.org/D6416

llvm-svn: 224771
2014-12-23 16:16:33 +00:00
Peter Zotov 4ab66cdfcb [OCaml] PR22014: OCaml bindings didn't link to libLLVM-*.so with -Wl,--as-needed
Patch by Evangelos Foutras <evangelos@foutrelis.com>.

llvm-svn: 224766
2014-12-23 13:09:59 +00:00
Michael Kuperstein be8032c875 [ValueTracking] Move GlobalAlias handling to be after the max depth check in computeKnownBits()
GlobalAlias handling used to be after GlobalValue handling, which meant it was, in practice, dead code. r220165 moved GlobalAlias handling to be before GlobalValue handling, but also moved it to be before the max depth check, causing an assert due to a recursion depth limit violation. 

This moves GlobalAlias handling forward to where it's safe, and changes the GlobalValue handling to only look at GlobalObjects.

Differential Revision: http://reviews.llvm.org/D6758

llvm-svn: 224765
2014-12-23 11:33:41 +00:00
Elena Demikhovsky fcea06acb5 AVX-512: Added FMA instructions, intrinsics an tests for KNL and SKX targets
by Asaf Badouh

http://reviews.llvm.org/D6456

llvm-svn: 224764
2014-12-23 10:30:39 +00:00
Hal Finkel 6e27c6d450 [PowerPC] Don't mark the return-address slot as immutable
It is tempting to mark the fixed stack slot used to store the return address as
immutable when lowering @llvm.returnaddress(i32 0). Unfortunately, within the
function, it is not completely immutable: it is written during the function
prologue. When using post-RA instruction scheduling, the prologue instructions
are available for scheduling, and we're not free to interchange the order of a
particular store in the prologue with loads from that stack location.

Fixes PR21976.

llvm-svn: 224761
2014-12-23 09:45:06 +00:00
Elena Demikhovsky 3121449f0b AVX-512: BLENDM - fixed encoding of the broadcast version
Added more intrinsics and encoding tests.

llvm-svn: 224760
2014-12-23 09:36:28 +00:00
Michael Kuperstein f4536ea6e8 [DagCombine] Improve DAGCombiner BUILD_VECTOR when it has two sources of elements
This partially fixes PR21943.

For AVX, we go from:

vmovq   (%rsi), %xmm0
vmovq   (%rdi), %xmm1
vpermilps       $-27, %xmm1, %xmm2 ## xmm2 = xmm1[1,1,2,3]
vinsertps       $16, %xmm2, %xmm1, %xmm1 ## xmm1 = xmm1[0],xmm2[0],xmm1[2,3]
vinsertps       $32, %xmm0, %xmm1, %xmm1 ## xmm1 = xmm1[0,1],xmm0[0],xmm1[3]
vpermilps       $-27, %xmm0, %xmm0 ## xmm0 = xmm0[1,1,2,3]
vinsertps       $48, %xmm0, %xmm1, %xmm0 ## xmm0 = xmm1[0,1,2],xmm0[0]

To the expected:

vmovq   (%rdi), %xmm0
vmovhpd (%rsi), %xmm0, %xmm0
retq

Fixing this for AVX2 is still open.

Differential Revision: http://reviews.llvm.org/D6749

llvm-svn: 224759
2014-12-23 08:59:45 +00:00
Hal Finkel 04b16b51ec [PowerPC] Don't attempt a 64-bit pow2 division on PPC32
In r224033, in moving the signed power-of-2 division expansion into
BuildSDIVPow2, I accidentally made it possible to attempt the lowering for a
64-bit division on PPC32. This later asserts.

Fixes PR21928.

llvm-svn: 224758
2014-12-23 08:38:50 +00:00