Commit Graph

24 Commits

Author SHA1 Message Date
Chris Lattner 61d703183e Force 64-bit register availability in 64-bit mode. For real.
llvm-svn: 28837
2006-06-16 20:05:06 +00:00
Chris Lattner a7d9db2fa5 Remove the -darwin and -aix llc options, inferring darwinism and aixism from
the target triple & subtarget info.  woo.

llvm-svn: 28835
2006-06-16 18:50:48 +00:00
Chris Lattner 16682fff2b Document the subtarget features better, make sure that 64-bit mode, 64-bit
support, and 64-bit register use are all consistent with each other.

Add a new "IsPPC" feature, to distinguish ppc32 vs ppc64 targets, use this
to configure TargetData differently.  This not makes ppc64 blow up on lots
of stuff :)

llvm-svn: 28825
2006-06-16 17:50:12 +00:00
Chris Lattner a35f306740 Rename some subtarget features. A CPU now can *have* 64-bit instructions,
can in 32-bit mode we can choose to optionally *use* 64-bit registers.

llvm-svn: 28824
2006-06-16 17:34:12 +00:00
Chris Lattner 0c4aa14deb First baby step towards ppc64 support. This adds a new -march=ppc64 backend
that is currently just like ppc32 :)

llvm-svn: 28813
2006-06-16 01:37:27 +00:00
Chris Lattner 27f5345b1f Compile this:
void foo(float a, int *b) { *b = a; }

to this:

_foo:
        fctiwz f0, f1
        stfiwx f0, 0, r4
        blr

instead of this:

_foo:
        fctiwz f0, f1
        stfd f0, -8(r1)
        lwz r2, -4(r1)
        stw r2, 0(r4)
        blr

This implements CodeGen/PowerPC/stfiwx.ll, and also incidentally does the
right thing for GCC bugzilla 26505.

llvm-svn: 26447
2006-03-01 05:50:56 +00:00
Evan Cheng 73136dfecc - Added option -relocation-model to set relocation model. Valid values include static, pic,
dynamic-no-pic, and default.
PPC and x86 default is dynamic-no-pic for Darwin, pic for others.
- Removed options -enable-pic and -ppc-static.

llvm-svn: 26315
2006-02-22 20:19:42 +00:00
Chris Lattner 0c7b4666a3 add a note about how we should implement this FIXME from the legalizer:
// FIXME: revisit this when we have some kind of mechanism by which targets
    // can decided legality of vector constants, of which there may be very
    // many.

llvm-svn: 25733
2006-01-28 05:40:47 +00:00
Chris Lattner 3570cf456b add an option to generate completely non-pic code, corresponding to what
gcc -static produces on PPC.  This is used for building kexts and other things.

With this, materializing the address of a global looks like:

        lis r2, ha16(L_H$non_lazy_ptr)
        la r3, lo16(L_H$non_lazy_ptr)(r2)

we're still emitting stubs for functions, which is wrong.  That is next.

llvm-svn: 24399
2005-11-17 18:55:48 +00:00
Jim Laskey 802748cd61 Allow itineraries to be passed through the Target Machine.
llvm-svn: 24139
2005-11-01 20:06:59 +00:00
Jim Laskey a2b5235fac Give full control of subtarget features over to table generated code.
llvm-svn: 24013
2005-10-26 17:30:34 +00:00
Jim Laskey db4621a5f5 Preparation of supporting scheduling info. Need to find info based on selected
CPU.

llvm-svn: 23974
2005-10-25 15:15:28 +00:00
Chris Lattner d36c34822e Simplify this, matching changes in the tblgen emitter
llvm-svn: 23909
2005-10-23 22:34:25 +00:00
Jim Laskey 9ed9032e22 Plugin new subtarget backend into the build.
llvm-svn: 23870
2005-10-21 19:05:19 +00:00
Nate Begeman e74dfbb9ce Do the right thing and enable 64 bit regs under the control of a subtarget
option.  Currently the only way to enable this is to specify the
64bitregs mattr flag.  It is never enabled by default on any config yet.

llvm-svn: 23779
2005-10-18 00:56:42 +00:00
Chris Lattner bfca1ab79d Rename PowerPC*.h to PPC*.h
llvm-svn: 23743
2005-10-14 23:51:18 +00:00
Chris Lattner 5ea0ee7b19 On non-apple systems, when using -march=ppc32, do not print:
'' is not a recognized processor for this target (ignoring processor)

Default to "generic" instead of "" for the default CPU.

llvm-svn: 23257
2005-09-07 05:45:33 +00:00
Nate Begeman 2dded8302a Add accessor for 64bit flag, so that we can tell when it is safe to
generate the fun in-register fp<->long instructions.

llvm-svn: 23244
2005-09-06 15:30:12 +00:00
Jim Laskey 27d628dfc9 Add help support for -mcpu and -mattr.
llvm-svn: 23222
2005-09-02 19:27:43 +00:00
Chris Lattner aa3b1fcc58 Decouple fsqrt from gpul optimizations, implementing fsqrt.ll.
Remove the -enable-gpopt option which is subsumed by feature flags.

llvm-svn: 23218
2005-09-02 18:33:05 +00:00
Jim Laskey 19058c3989 1. Use SubtargetFeatures in llc/lli.
2. Propagate feature "string" to all targets.

3. Implement use of SubtargetFeatures in PowerPCTargetSubtarget.

llvm-svn: 23192
2005-09-01 21:38:21 +00:00
Chris Lattner 983a415b6a Consolidate the GPOpt stuff to all use the Subtarget, instead of still
depending on the command line option.  Now the command line option just
sets the subtarget as appropriate.  G5 opts will now default to on on
G5-enabled nightly testers among other machines.

llvm-svn: 22688
2005-08-05 22:05:03 +00:00
Chris Lattner 431b8d80bd Enable gp optimizations by default when available, even when a target triple
is available, since the target triple doesn't specify whether to use gpopts
or not.

llvm-svn: 22685
2005-08-05 21:25:13 +00:00
Nate Begeman 3bcfcd9474 Add Subtarget support to PowerPC. Next up, using it.
llvm-svn: 22644
2005-08-04 07:12:09 +00:00