928de16793
Testcase for r127630.
...
llvm-svn: 127648
2011-03-15 01:49:08 +00:00
f2f4837de3
Basic sanity checks to ensure that 2- and 3-byte
...
VEX prefixes are working for triadic AVX
instructions. This concludes the patch set to
enable AVX support for the X86 disassebler.
llvm-svn: 127647
2011-03-15 01:32:46 +00:00
b60b0bc47e
Enabled disassembler support for AVX instructions
...
in the instruction tables and fixed a few bugs that
were causing decode conflicts. Rudimentary tests
are coming up in the next patch.
llvm-svn: 127646
2011-03-15 01:28:15 +00:00
c3fd523731
X86 table-generator and disassembler support for the AVX
...
instruction set. This code adds support for the VEX prefix
and for the YMM registers accessible on AVX-enabled
architectures. Instruction table support that enables AVX
instructions for the disassembler is in an upcoming patch.
llvm-svn: 127644
2011-03-15 01:23:15 +00:00
a34f1b1f10
Remove getMinusSCEVForExitTest().
...
This function performed acrobatics to prove no-self-wrap, which we now
have for free.
llvm-svn: 127643
2011-03-15 01:16:14 +00:00
7a2873dfbe
Fixed an ARM disassembler bug where it does not handle STRi12 correctly because an extra
...
register operand was erroneously added. Remove an incorrect assert which triggers the bug.
rdar://problem/9131529
llvm-svn: 127642
2011-03-15 01:13:17 +00:00
5c25a92011
There are some situations which can cause the URoR hack to infinitely recurse
...
and then go kablooie. The problem was that it was tracking the PHI nodes anew
each time into this function. But it didn't need to. And because the recursion
didn't know that a PHINode was visited before, it would go ahead and call
itself.
There is a testcase, but unfortunately it's too big to add. This problem will go
away with the EH rewrite.
<rdar://problem/8856298>
llvm-svn: 127640
2011-03-15 01:03:17 +00:00
f6b01ff422
Propagate SCEV no-wrap flags whenever possible.
...
This needs review.
llvm-svn: 127638
2011-03-15 00:37:00 +00:00
3af6fe66b9
Clean up ARM tail calls a bit. They're pseudo-instructions for normal branches.
...
Also more cleanly separate the ARM vs. Thumb functionality. Previously, the
encoding would be incorrect for some Thumb instructions (the indirect calls).
llvm-svn: 127637
2011-03-15 00:30:40 +00:00
2139d3148f
If we don't know how long a string is we can't fold an _chk version to the
...
normal version.
Fixes rdar://9123638
llvm-svn: 127636
2011-03-15 00:25:41 +00:00
dfeda09345
Make llvm::Consumer a class (to remove a MSVC warning since Consumer is later forward declared as a struct)
...
llvm-svn: 127632
2011-03-14 23:07:21 +00:00
e1fd78f2bc
Generate a VTBL instruction instead of a series of loads and stores when we
...
can. As Nate pointed out, VTBL isn't super performant, but it *has* to be better
than this:
_shuf:
@ BB#0: @ %entry
push {r4, r7, lr}
add r7, sp, #4
sub sp, #12
mov r4, sp
bic r4, r4, #7
mov sp, r4
mov r2, sp
vmov d16, r0, r1
orr r0, r2, #6
orr r3, r2, #7
vst1.8 {d16[0]}, [r3]
vst1.8 {d16[5]}, [r0]
subs r4, r7, #4
orr r0, r2, #5
vst1.8 {d16[4]}, [r0]
orr r0, r2, #4
vst1.8 {d16[4]}, [r0]
orr r0, r2, #3
vst1.8 {d16[0]}, [r0]
orr r0, r2, #2
vst1.8 {d16[2]}, [r0]
orr r0, r2, #1
vst1.8 {d16[1]}, [r0]
vst1.8 {d16[3]}, [r2]
vldr.64 d16, [sp]
vmov r0, r1, d16
mov sp, r4
pop {r4, r7, pc}
The "illegal" testcase in vext.ll is no longer illegal.
<rdar://problem/9078775>
llvm-svn: 127630
2011-03-14 23:02:38 +00:00
e2eb807601
Version N of the llvm_unreachable patch: VC++ doesn't recognize that abort()
...
doesn't return, so just go back to using the old runtime function instead
of trying to use abort() when __builtin_unreachable (or an equivalent) isn't
supported.
llvm-svn: 127629
2011-03-14 22:41:50 +00:00
4b6ae939ca
This patch is a big refactoring of llvm-diff. It doesn't add new features, but it re-organizes the old features, so I can insert the MetadataEngine to use the same infrastructure.
...
llvm-svn: 127627
2011-03-14 22:22:46 +00:00
c9a16d581d
Check that the AsmParser exists for the native target to enable initialization
...
function.
llvm-svn: 127626
2011-03-14 22:12:35 +00:00
d3cc9fdd8e
Fix this test up a bit.
...
llvm-svn: 127621
2011-03-14 21:05:21 +00:00
d97a665cff
Trailing whitespace.
...
llvm-svn: 127620
2011-03-14 20:59:06 +00:00
0fabf10388
Ignore isCodeGenOnly instructions when generating diassembly tables.
...
llvm-svn: 127619
2011-03-14 20:58:49 +00:00
59a549b7ec
Place context in member variables instead of passing around pointers.
...
Use the opportunity to get rid of the trailing underscore variable names.
llvm-svn: 127618
2011-03-14 20:57:14 +00:00
c525e3a114
Okay, some compilers complain if you provide the exception-specification
...
where none was before. Just don't declare it and hope it's declared
in every translation unit that needs it.
llvm-svn: 127612
2011-03-14 20:20:29 +00:00
b9b8ea4018
Fix the exception-specification of abort() when declaring it in C++.
...
llvm-svn: 127610
2011-03-14 20:10:50 +00:00
0491c0124f
Make llvm_unreachable evaluate to __builtin_unreachable() in -Asserts
...
builds, which was the apparent consensus of PR8973 and llvmdev.
llvm-svn: 127608
2011-03-14 20:01:21 +00:00
a00bab24c2
Rename members to match LLVM naming conventions more closely.
...
Remove the unused reserved_ bit vector, no functional change intended.
This doesn't break 'svn blame', this file really is all my fault.
llvm-svn: 127607
2011-03-14 19:56:43 +00:00
c5efcbad71
Remove some dead patterns.
...
llvm-svn: 127601
2011-03-14 18:34:35 +00:00
37139edc8c
BIT_CONVERT has been renamed to BITCAST.
...
llvm-svn: 127600
2011-03-14 18:19:52 +00:00
d2f3b01797
Minor optimization. sign-ext/anyext of undef is still undef.
...
llvm-svn: 127598
2011-03-14 18:15:55 +00:00
383ecd873b
Indentation.
...
llvm-svn: 127595
2011-03-14 18:02:30 +00:00
e92dcceab7
Negating a recurrence preserves no-self-wrap.
...
llvm-svn: 127593
2011-03-14 17:38:54 +00:00
876ee079fc
Trailing whitespace.
...
llvm-svn: 127592
2011-03-14 17:32:49 +00:00
f1781db622
HowFarToZero can compute a trip count as long as the recurrence has no-self-wrap.
...
llvm-svn: 127591
2011-03-14 17:28:02 +00:00
8b55b736b1
Added SCEV::NoWrapFlags to manage unsigned, signed, and self wrap
...
properties.
Added the self-wrap flag for SCEV::AddRecExpr.
A slew of temporary FIXMEs indicate the intention of the no-self-wrap flag
without changing behavior in this revision.
llvm-svn: 127590
2011-03-14 16:50:06 +00:00
328b223bb1
whitespace
...
llvm-svn: 127589
2011-03-14 16:48:10 +00:00
fbc8d301bf
PTX: Emit global arrays with proper sizes
...
- Emit all arrays as type .b8 and proper sizes in bytes to conform
to the output of nvcc
llvm-svn: 127584
2011-03-14 15:40:11 +00:00
8509380f83
PTX: Add support for sqrt/sin/cos intrinsics
...
llvm-svn: 127578
2011-03-14 14:09:33 +00:00
a19f075974
ptx: add set.p instruction and related changes to predicate execution
...
llvm-svn: 127577
2011-03-14 11:26:01 +00:00
6e2d823235
Emacs mode string.
...
llvm-svn: 127576
2011-03-14 04:20:57 +00:00
0fc06eefad
Correct small comment order typo.
...
llvm-svn: 127575
2011-03-14 02:30:32 +00:00
b452db02f0
This case is solved by Scalar Replacement of Aggregates (DT) and
...
Early CSE pass so this patch reverts it to original source code.
llvm-svn: 127574
2011-03-14 01:21:00 +00:00
58bae0e957
ptx: add basic support of predicate execution
...
llvm-svn: 127569
2011-03-13 17:26:00 +00:00
b7538c71e1
Add comment as following:
...
load and store reference same memory location, the memory location
is represented by getelementptr with two uses (load and store) and
the getelementptr's base is alloca with single use. At this point,
instructions from alloca to store can be removed.
(this pattern is generated when bitfield is accessed.)
For example,
%u = alloca %struct.test, align 4 ; [#uses=1]
%0 = getelementptr inbounds %struct.test* %u, i32 0, i32 0;[#uses=2]
%1 = load i8* %0, align 4 ; [#uses=1]
%2 = and i8 %1, -16 ; [#uses=1]
%3 = or i8 %2, 5 ; [#uses=1]
store i8 %3, i8* %0, align 4
llvm-svn: 127565
2011-03-13 14:05:51 +00:00
ac824ee462
LTO is not ready for Windows.
...
llvm-svn: 127562
2011-03-13 03:06:59 +00:00
e1539cc5b6
Now that we are deleting unused live intervals during allocation, pointers may be reused.
...
Use the virtual register number as a cache tag instead. They are not reused.
llvm-svn: 127561
2011-03-13 01:29:32 +00:00
43a87501b3
Tell the register allocator about new unused virtual registers.
...
This allows the allocator to free any resources used by the virtual register,
including physical register assignments.
llvm-svn: 127560
2011-03-13 01:23:11 +00:00
3685f2762b
Build EnhancedDisassembly as a shared library too.
...
llvm-svn: 127555
2011-03-12 22:01:47 +00:00
dc352c4c04
Build CompilerDriver library.
...
llvm-svn: 127554
2011-03-12 22:01:42 +00:00
02c446a73a
Build LTO as a static library too.
...
llvm-svn: 127553
2011-03-12 22:01:36 +00:00
68c1f55fdc
Build LTO as a static library too.
...
llvm-svn: 127549
2011-03-12 17:32:30 +00:00
5acc751b6f
Teach ComputeMaskedBits about sub nsw.
...
llvm-svn: 127548
2011-03-12 17:18:11 +00:00
cc48b9ac0f
Whe we build a shared library, add its list of used libraries to the
...
link command.
Fixed a pair of IF expressions too.
llvm-svn: 127546
2011-03-12 16:48:54 +00:00
1fc0c8ab78
Update link components for llvm-dis and LTO.
...
llvm-svn: 127545
2011-03-12 16:48:49 +00:00
b847bf547b
Speculatively revert commit 127478 (jsjodin) in an attempt to fix the
...
llvm-gcc-i386-linux-selfhost and llvm-x86_64-linux-checks buildbots.
The original log entry:
Remove optimization emitting a reference insted of label difference, since
it can create more relocations. Removed isBaseAddressKnownZero method,
because it is no longer used.
llvm-svn: 127540
2011-03-12 13:07:37 +00:00
2e939f7c3c
This patch removes some of useless instructions generated by bitfield access.
...
llvm-svn: 127539
2011-03-12 12:18:44 +00:00
e77005ef88
Include snippets in the live stack interval.
...
llvm-svn: 127530
2011-03-12 04:25:36 +00:00
a86595e06b
Spill multiple registers at once.
...
Live range splitting can create a number of small live ranges containing only a
single real use. Spill these small live ranges along with the large range they
are connected to with copies. This enables memory operand folding and maximizes
the spill to fill distance.
Work in progress with known bugs.
llvm-svn: 127529
2011-03-12 04:17:20 +00:00
47f660aeaf
Fixed the comparison operator for the enhanced
...
disassembler's disassembler map.
llvm-svn: 127527
2011-03-12 03:27:54 +00:00
dae1dc1f01
That's it, I am declaring this a failure of the C++03 STL.
...
There are too many compatibility problems with using mixed types in
std::upper_bound, and I don't want to spend 110 lines of boilerplate setting up
a call to a 10-line function. Binary search is not /that/ hard to implement
correctly.
I tried terminating the binary search with a linear search, but that actually
made the algorithm slower against my expectation. Most live intervals have less
than 4 segments. The early test against endIndex() does pay, and this version is
25% faster than plain std::upper_bound().
llvm-svn: 127522
2011-03-12 01:50:35 +00:00
c313d94068
Saving files before committing is overrated.
...
Add a RUN line to this test.
llvm-svn: 127520
2011-03-12 01:36:23 +00:00
174d872702
Sometimes isPredicable lies to us and tells us we don't need the operands.
...
Go ahead and add them on when we might want to use them and let
later passes remove them.
Fixes rdar://9118569
llvm-svn: 127518
2011-03-12 01:09:29 +00:00
fcc34cacd9
Remove no-longer-correct special case for disasm of ARM BL instructions.
...
llvm-svn: 127517
2011-03-12 01:05:29 +00:00
965fe994c2
Add FIXME.
...
llvm-svn: 127516
2011-03-12 00:51:00 +00:00
3f2096eafe
Pseudo-ize the ARM Darwin *r9 call instruction definitions. They're the same
...
actual instruction as the non-Darwin defs, but have different call-clobber
semantics and so need separate patterns. They don't need to duplicate the
encoding information, however.
llvm-svn: 127515
2011-03-12 00:45:26 +00:00
b7c6e8f575
Add a FIXME.
...
llvm-svn: 127511
2011-03-11 23:25:21 +00:00
f026d9ed53
Pseudo-ize the ARM 'B' instruction.
...
llvm-svn: 127510
2011-03-11 23:24:15 +00:00
2fee5327aa
Remove dead code. These ARM instruction definitions no longer exist.
...
llvm-svn: 127509
2011-03-11 23:15:02 +00:00
376d5e8772
Remove dead code. These ARM instruction definitions no longer exist.
...
llvm-svn: 127508
2011-03-11 23:11:41 +00:00
bb0547d9c4
Pseudo-ize VMOVDcc and VMOVScc.
...
llvm-svn: 127506
2011-03-11 23:09:50 +00:00
9f2b3b569b
80 columns
...
llvm-svn: 127505
2011-03-11 23:00:16 +00:00
6d371ce37e
Properly pseudo-ize the ARM LDMIA_RET instruction. This has the nice side-
...
effect that we get proper instruction printing using the "pop" mnemonic for it.
llvm-svn: 127502
2011-03-11 22:51:41 +00:00
338d362200
Roll r127459 back in:
...
Optimize trivial branches in CodeGenPrepare, which often get created from the
lowering of objectsize intrinsics. Unfortunately, a number of tests were relying
on llc not optimizing trivial branches, so I had to add an option to allow them
to continue to test what they originally tested.
This fixes <rdar://problem/8785296> and <rdar://problem/9112893>.
llvm-svn: 127498
2011-03-11 21:52:04 +00:00
4d7d728594
Fix the GCC test suite issue exposed by r127477, which was caused by stack
...
protector insertion not working correctly with unreachable code. Since that
revision was rolled out, this test doesn't actual fail before this fix.
llvm-svn: 127497
2011-03-11 21:51:56 +00:00
66443c034d
Teach FastISel to support register-immediate-immediate instructions.
...
llvm-svn: 127496
2011-03-11 21:33:55 +00:00
ec62d28ae1
80 columns.
...
llvm-svn: 127495
2011-03-11 21:02:27 +00:00
d767d06b26
Trailing whitespace.
...
llvm-svn: 127493
2011-03-11 20:59:19 +00:00
52594d99e4
Remove dead code. These ARM instruction definitions don't exist.
...
llvm-svn: 127491
2011-03-11 20:51:07 +00:00
59eea670f8
ARM VDUPfd and VDUPfq can just be patterns. The instruction is the same
...
as for VDUP32d and VDUP32q, respectively.
llvm-svn: 127489
2011-03-11 20:44:08 +00:00
6c609d626f
Remove dead code. These ARM instruction definitions don't exist.
...
llvm-svn: 127488
2011-03-11 20:38:18 +00:00
c77dea7f55
ARM VDUPLNfq and VDUPLNfd definitions can just be Pat<>s for VDUPLN32q
...
and VDUPLN32d, respectively.
llvm-svn: 127486
2011-03-11 20:31:17 +00:00
24fe5e36ea
ARM VREV64df and VREV64qf can just be patterns. The instruction is the same
...
as for VREV64d32 and VREV64q32, respectively.
llvm-svn: 127485
2011-03-11 20:18:05 +00:00
0b5119315b
This FIXME has been fixed.
...
llvm-svn: 127483
2011-03-11 20:07:37 +00:00
fa56bca781
Properly pseudo-ize ARM MVNCCi.
...
llvm-svn: 127482
2011-03-11 19:55:55 +00:00
730e1c2c9e
Add missing 'return on failure'. Previously we'd crash after emitting
...
the diagnostic.
llvm-svn: 127480
2011-03-11 19:52:52 +00:00
f3f78583f9
Remove optimization emitting a reference insted of label difference, since it can create more relocations. Removed isBaseAddressKnownZero method, because it is no longer used.
...
llvm-svn: 127478
2011-03-11 19:37:02 +00:00
94ccb27b43
Revert r127459, "Optimize trivial branches in CodeGenPrepare, which often get
...
created from the", it broke some GCC test suite tests.
llvm-svn: 127477
2011-03-11 19:30:30 +00:00
0122841626
Force re-linking of LLVMgold.so when its exports file changes.
...
llvm-svn: 127473
2011-03-11 18:27:13 +00:00
87e4a4da0d
Fix processing of gold.exports.
...
llvm-svn: 127471
2011-03-11 18:07:46 +00:00
982efb5c89
While printing annotations, print line number and variable name if debug info is present.
...
llvm-svn: 127470
2011-03-11 18:07:33 +00:00
f541bfd7d4
Fix MOVCCi32imm to be have ARM-mode Requires and a proper size (8 bytes, was 4).
...
llvm-svn: 127469
2011-03-11 18:00:42 +00:00
710d5da306
Replace -dag-chain-limit flag with constant. It has survived a release cycle without being touched, so no longer needs to pollute the hidden-help text.
...
llvm-svn: 127468
2011-03-11 17:46:59 +00:00
64d05bc281
Add LTO and gold plugin to the CMake build. Linux-only, support for
...
other systems pending.
PR9456.
llvm-svn: 127466
2011-03-11 15:44:24 +00:00
391a946fa9
ComputeMaskedBits: sub falls through to add, and sub doesn't have the same overflow semantics as add.
...
Should fix the selfhost failures that started with r127463.
llvm-svn: 127465
2011-03-11 14:46:49 +00:00
51897bcd3e
InstCombine: Fix a thinko where transform an icmp under the assumption that it's a zero comparison when it's not.
...
Fixes PR9454.
llvm-svn: 127464
2011-03-11 11:37:40 +00:00
cc79973856
Teach ComputeMaskedBits about nsw on add. I don't think there's anything we can
...
do with nuw here, but sub and mul should be given similar treatment.
Fixes PR9343 #15 !
llvm-svn: 127463
2011-03-11 09:00:19 +00:00
8559f5914c
Fix use of CompEnd predicate to be standards conforming
...
The existing CompEnd predicate does not define a strict weak order as required
by the C++03 standard; therefore, its use as a predicate to std::upper_bound
is invalid. For a discussion of this issue, see
http://www.open-std.org/jtc1/sc22/wg21/docs/lwg-defects.html#270
This patch replaces the asymmetrical comparison with an iterator adaptor that
achieves the same effect while being strictly standard-conforming by ensuring
an apples-to-apples comparison.
llvm-svn: 127462
2011-03-11 08:54:34 +00:00
cc27b3acc4
Optimize trivial branches in CodeGenPrepare, which often get created from the
...
lowering of objectsize intrinsics. Unfortunately, a number of tests were relying
on llc not optimizing trivial branches, so I had to add an option to allow them
to continue to test what they originally tested.
This fixes <rdar://problem/8785296> and <rdar://problem/9112893>.
llvm-svn: 127459
2011-03-11 04:54:27 +00:00
f17b0031f3
Teach TableGen to pre-calculate register enum values when creating the
...
CodeGenRegister entries. Use this information to more intelligently build
the literal register entires in the DAGISel matcher table. Specifically,
use a single-byte OPC_EmitRegister entry for registers with a value of
less than 256 and OPC_EmitRegister2 entry for registers with a larger value.
rdar://9066491
llvm-svn: 127456
2011-03-11 02:19:02 +00:00
05a23b1e61
silence a conditional assignment -Wuninitialized warning.
...
llvm-svn: 127453
2011-03-11 02:12:51 +00:00
eb52c23646
Make the register enum value part of the CodeGenRegister struct.
...
llvm-svn: 127448
2011-03-11 01:33:54 +00:00
f910bf29a9
Trailing whitespace.
...
llvm-svn: 127447
2011-03-11 01:27:24 +00:00
b1ac770fa3
Trailing whitespace.
...
llvm-svn: 127446
2011-03-11 01:19:05 +00:00
d0fc231e13
Tidy up since ARM MOVCCi and MOVCCi16 are now pseudos.
...
llvm-svn: 127445
2011-03-11 01:16:49 +00:00
d025498271
Properly pseudo-ize ARM MOVCCi and MOVCCi16.
...
llvm-svn: 127442
2011-03-11 01:09:28 +00:00
cf56a5034f
Change the x86 32-bit scheduler to register pressure and fix up the
...
corresponding testcases back to the previous versions.
Fixes some performance regressions only seen on 32-bit.
llvm-svn: 127441
2011-03-11 01:05:58 +00:00
adb9c03e41
Avoid replacing the value of a directly stored load with the stored value if the load is indexed. rdar://9117613.
...
llvm-svn: 127440
2011-03-11 00:48:56 +00:00
62a7b473af
Properly pseudo-ize MOVCCr and MOVCCs.
...
llvm-svn: 127434
2011-03-10 23:56:09 +00:00
affbc66f60
RecursivelyDeleteTriviallyDeadInstructions only needs a
...
Value, not an Instruction, so casting is not necessary. Also,
it's theoretically possible that the Value is not an
Instruction, since WeakVH follows RAUWs.
llvm-svn: 127427
2011-03-10 20:57:44 +00:00
cbe6a1ae86
Don't compute the file size if we don't need to.
...
llvm-svn: 127426
2011-03-10 20:54:07 +00:00
154ed49784
Fix reassociate to postpone certain instruction deletions until
...
after it has finished all of its reassociations, because its
habit of unlinking operands and holding them in a datastructure
while working means that it's not easy to determine when an
instruction is really dead until after all its regular work is
done. rdar://9096268.
llvm-svn: 127424
2011-03-10 19:51:54 +00:00
e5ccac85d3
DMB can just be a pat referencing MCR.
...
llvm-svn: 127423
2011-03-10 19:27:17 +00:00
b75c0db9d2
Reorganize a bit. No functional change, just moving patterns up.
...
llvm-svn: 127422
2011-03-10 19:21:08 +00:00
e175682781
Pseudo-instructions are codegenonly by definition.
...
llvm-svn: 127420
2011-03-10 19:06:39 +00:00
a186cadcaa
Memory barrier instructions don't need special handling in tblgen anymore.
...
llvm-svn: 127419
2011-03-10 19:05:48 +00:00
b49b964b98
InstCombine: Turn umul_with_overflow into mul nuw if we can prove that it cannot overflow.
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This happens a lot in clang-compiled C++ code because it adds overflow checks to operator new[]:
unsigned *foo(unsigned n) { return new unsigned[n]; }
We can optimize away the overflow check on 64 bit targets because (uint64_t)n*4 cannot overflow.
llvm-svn: 127418
2011-03-10 18:40:14 +00:00
258a605fce
Add r127409 back now that the windows file was updated.
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llvm-svn: 127417
2011-03-10 18:33:29 +00:00
510b00c67c
Try to fix the windows build.
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llvm-svn: 127416
2011-03-10 18:30:48 +00:00
e413d9d341
Revert r127409 which broke all the Windows bots.
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llvm-svn: 127413
2011-03-10 18:01:43 +00:00
72ff7e4fa9
PTX: Add preliminary support for floating-point divide and multiply-and-add
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llvm-svn: 127410
2011-03-10 16:57:18 +00:00
ea5a137e55
Add support for MemoryBuffers that are not null terminated and add
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support for creating buffers that cover only a part of a file.
llvm-svn: 127409
2011-03-10 16:10:30 +00:00
0d364306be
rip out llvm 2.8 release notes to make room for llvm 2.9 notes.
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llvm-svn: 127399
2011-03-10 07:43:44 +00:00
7930407339
Add an option to disable critical edge splitting in PHIElimination.
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llvm-svn: 127398
2011-03-10 05:59:17 +00:00
6e9fb0d056
ptx: add the rest of special registers of ISA version 2.0
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llvm-svn: 127397
2011-03-10 04:05:57 +00:00
4d6eafa138
Change the Spiller interface to take a LiveRangeEdit reference.
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This makes it possible to register delegates and get callbacks when the spiller
edits live ranges.
llvm-svn: 127389
2011-03-10 01:51:42 +00:00
c6cc485051
Make SpillIs an optional pointer. Avoid creating a bunch of temporary SmallVectors.
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llvm-svn: 127388
2011-03-10 01:21:58 +00:00
241bdc0de7
Unbreak the CMake build.
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llvm-svn: 127383
2011-03-10 00:51:01 +00:00
d17ae4e939
Revert 127359; it broke lencod.
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llvm-svn: 127382
2011-03-10 00:25:53 +00:00
fa31d38aad
Introduce DebugInfoProbe. This is used to monitor how llvm optimizer is treating debugging information.
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It generates output that lools like
8 times line number info lost by Scalar Replacement of Aggregates (SSAUp)
1 times line number info lost by Simplify well-known library calls
12 times variable info lost by Jump Threading
llvm-svn: 127381
2011-03-10 00:21:25 +00:00
b4c6a34415
Re-commit 127368 and 127371. They are exonerated.
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llvm-svn: 127380
2011-03-10 00:16:32 +00:00
d4b3f8e009
Revert 127368 and 127371 for now.
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llvm-svn: 127376
2011-03-09 23:53:17 +00:00
a319876559
Restore the default implementation of getCrossCopyRegClass: no need for cross-regclass copies.
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llvm-svn: 127371
2011-03-09 23:15:40 +00:00
66559ba79a
Revert "Re-enable test and hope to silence the buildbots", still broken.
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llvm-svn: 127369
2011-03-09 22:48:46 +00:00
ca9a936332
Change the definition of TargetRegisterInfo::getCrossCopyRegClass to be more
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flexible.
If it returns a register class that's different from the input, then that's the
register class used for cross-register class copies.
If it returns a register class that's the same as the input, then no cross-
register class copies are needed (normal copies would do).
If it returns null, then it's not at all possible to copy registers of the
specified register class.
llvm-svn: 127368
2011-03-09 22:47:38 +00:00
1885d21700
Fix mistyped CHECK lines.
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llvm-svn: 127366
2011-03-09 22:07:31 +00:00
801c9afd94
Fix a pasto that broke all x86_64-elf targets.
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llvm-svn: 127365
2011-03-09 22:07:13 +00:00
3d8584f60e
Tweak test to work on Linux.
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llvm-svn: 127364
2011-03-09 21:35:10 +00:00
9ba3013ed9
Disable this test temporarily to reduce BuildBot complaints.
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llvm-svn: 127363
2011-03-09 21:33:47 +00:00
13f8c7d48e
Preserve line number information while simplifying libcalls.
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llvm-svn: 127362
2011-03-09 21:27:52 +00:00
9955e2f912
X86 byval copies no longer always_inline. <rdar://problem/8706628>
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llvm-svn: 127359
2011-03-09 21:10:30 +00:00
6492ef1237
Add a testcase for the addc improvements introduced some commits ago. Patch by Akira Hatanaka
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llvm-svn: 127358
2011-03-09 21:05:32 +00:00
961908982f
Re-enable test and hope to silence the buildbots
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llvm-svn: 127357
2011-03-09 21:00:16 +00:00
bd2f81c87b
try to make o32 cc tests less specific to silence some buildbots. The test isn't enabled yet, this is will be done in a subsequent commit. Patch by Akira Hatanaka.
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llvm-svn: 127356
2011-03-09 20:59:05 +00:00
9363d41f14
LLVM combines the offset mode of A8.6.199 A1 & A2 into STRBT.
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The insufficient encoding information of the combined instruction confuses the decoder wrt
UQADD16. Add extra logic to recover from that.
Fixed an assert reported by Sean Callanan
llvm-svn: 127354
2011-03-09 20:01:14 +00:00
787ba0bf9b
Make these options hidden to reduce the amount of text -help puts on the
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command line, they'll still be seen with -help-hidden.
llvm-svn: 127353
2011-03-09 19:46:51 +00:00
a10794ab7b
These llvm.dbg.* constants are not used anymore.
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llvm-svn: 127352
2011-03-09 19:41:33 +00:00
d0db705256
Make physreg coalescing independent on the number of uses of the virtual register.
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The damage done by physreg coalescing only depends on the number of instructions
the extended physreg live range covers. This fixes PR9438.
The heuristic is still luck-based, and physreg coalescing really should be
disabled completely. We need a register allocator with better hinting support
before that is possible.
Convert a test to FileCheck and force spilling by inserting an extra call. The
previous spilling behavior was dependent on misguided physreg coalescing
decisions.
llvm-svn: 127351
2011-03-09 19:27:06 +00:00
456e104c13
Delete a test case that is very sensitive to coalescer behavior.
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The test is derived from an old miscompilation of
MultiSource/Benchmarks/VersaBench/8b10b which is run regularly, so we are not
losing coverage.
llvm-svn: 127350
2011-03-09 19:27:02 +00:00
048ffabe78
Improve varags handling, with testcases. Patch by Sasa Stankovic
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llvm-svn: 127349
2011-03-09 19:22:22 +00:00
0f6d098bd1
This test case should work with list-ilp or list-burr.
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llvm-svn: 127348
2011-03-09 19:17:10 +00:00
072ed2ee0d
Improve pre-RA-sched register pressure tracking for duplicate operands.
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This helps cases like 2008-07-19-movups-spills.ll, but doesn't have an obvious impact on benchmarks
llvm-svn: 127347
2011-03-09 19:12:43 +00:00
6348dc0566
Add createELFObjectTargetWriter method to TargetAsmBackend, which enables construction of non-standard ELFObjectWriters that can be used in MCJIT.
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llvm-svn: 127346
2011-03-09 18:44:41 +00:00
531f9d1241
Missing file from previous commmit (127341) for InitializeTargetAsmParser function.
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llvm-svn: 127345
2011-03-09 18:36:40 +00:00
745fc89f62
Add constructors to MCElfStreamer and MCObjectStreamer to take an extra MCAssembler * argument.
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llvm-svn: 127343
2011-03-09 17:33:05 +00:00
2afa325811
When SCEV can determine the loop test is X < X, set ExactBECount=0.
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When ExactBECount is a constant, use it for MaxBECount.
When MaxBECount cannot be computed, replace it with ExactBECount.
Fixes PR9424.
llvm-svn: 127342
2011-03-09 17:29:58 +00:00
27e07c32c6
Add InitializeNativeAsmParser function.
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llvm-svn: 127341
2011-03-09 17:25:46 +00:00
2a3b71684a
whitespace
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llvm-svn: 127340
2011-03-09 17:23:39 +00:00
b2e4d84305
Fix typo, make helper static.
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llvm-svn: 127335
2011-03-09 16:19:12 +00:00
e503506048
Process some link components that map to other expandable components
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before the main loop. This is necessary because the loop ignores the
items added to `link_components' after it is entered.
llvm-svn: 127333
2011-03-09 14:44:46 +00:00
84fccb64c3
Remove unused virtual dtor.
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llvm-svn: 127331
2011-03-09 14:20:28 +00:00
58d1f93b03
Target/X86: Tweak va_arg for Win64 not to miss taking va_start when number of fixed args > 4.
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llvm-svn: 127328
2011-03-09 11:33:15 +00:00
2035ab2816
Makefile.rules: [PR2928] "make install" may install include files along explicit pattern, not to install CMake's building stuff.
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llvm-svn: 127325
2011-03-09 09:11:27 +00:00
774647d974
Fix two cases I forgot to update when doing a mental "getSwappedPredicate".
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Thanks Duncan Sands!
llvm-svn: 127323
2011-03-09 08:20:06 +00:00
718918b07a
Add a test case for r127320.
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llvm-svn: 127321
2011-03-09 08:11:02 +00:00
19f2b3c652
Fix a crasher introduced by r127317 that is seen on the bots when using an
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alloca as both integer and floating-point vectors of the same size. Bugpoint is
not cooperating with me, but I'll try to find a manual testcase tomorrow.
llvm-svn: 127320
2011-03-09 07:34:11 +00:00
980104d1d6
Add another micro-optimization. Apologies for the lack of refactoring, but I
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gave up when I realized I couldn't come up with a good name for what the
refactored function would be, to describe what it does.
This is PR9343 test12, which is test3 with arguments reordered. Whoops!
llvm-svn: 127318
2011-03-09 06:26:03 +00:00
3b649f4d01
Add support to scalar replacement for partial vector accesses of an alloca, e.g.
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a union of a float, <2 x float>, and <4 x float>. This mostly comes up with the
use of vector intrinsics, especially in NEON when programmers know the layout of
the register file. This enables codegen to eliminate a lot of the subregister
traffic it would otherwise generate.
This commit only enables this for a small number of floating-point cases, but a
lot more integer cases. I assume this is okay for all ports, but I did not do
extensive testing of the quality of code involving i512 vectors and the like. If
there is a use case where this generates worse code than before, let me know and
we can scale it back.
This fixes <rdar://problem/9036264>.
llvm-svn: 127317
2011-03-09 05:43:05 +00:00
43a241fa06
Move vector type merging to a separate function in preparation for it getting
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more complicated.
llvm-svn: 127316
2011-03-09 05:43:01 +00:00
72ee53ef6a
Add a RUN line to the test case to make it functional. <rdar://problem/9055247>
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llvm-svn: 127312
2011-03-09 04:02:40 +00:00
df72652fd0
Add a virtual dtor to Delegate to silence -Wnon-virtual-dtor
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llvm-svn: 127311
2011-03-09 04:02:15 +00:00
d528660759
Test cases for r127309. <rdar://problem/9055247>
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llvm-svn: 127310
2011-03-09 03:59:52 +00:00
5100c00fa6
Build bots hate me.
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llvm-svn: 127307
2011-03-09 01:37:39 +00:00
a81a82dcaf
PR9346: Prevent SimplifyDemandedBits from incorrectly introducing
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INT_MIN % -1.
llvm-svn: 127306
2011-03-09 01:28:35 +00:00
20a6fcabd3
Testcase for r127301.
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llvm-svn: 127304
2011-03-09 01:05:00 +00:00
8e089640e0
Add a LiveRangeEdit::Delegate protocol.
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This will we used for keeping register allocator data structures up to date
while LiveRangeEdit is trimming live intervals.
llvm-svn: 127300
2011-03-09 00:57:29 +00:00
aac35b3fbb
PR9420; an instruction before an unreachable is guaranteed not to have any
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reachable uses, but there still might be uses in dead blocks. Use the
standard solution of replacing all the uses with undef. This is
a rare case because it's very sensitive to phase ordering in SimplifyCFG.
llvm-svn: 127299
2011-03-09 00:48:33 +00:00
4fa0f3040d
Fix testcase.
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llvm-svn: 127298
2011-03-09 00:41:41 +00:00
5e57137e87
* Correct encoding for VSRI.
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* Add tests for VSRI and VSLI.
llvm-svn: 127297
2011-03-09 00:33:17 +00:00
06b72e338a
Delete dead code.
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llvm-svn: 127295
2011-03-09 00:07:39 +00:00
a7f303de71
Correct the encoding for VRSRA and VSRA instructions.
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llvm-svn: 127294
2011-03-09 00:00:35 +00:00
e313f16ad9
* Fix VRSHR and VSHR to have the correct encoding for the immediate.
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* Update the NEON shift instruction test to expect what 'as' produces.
llvm-svn: 127293
2011-03-08 23:48:09 +00:00
ea5ebfed15
Delete dead code after rematerializing.
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LiveRangeEdit::eliminateDeadDefs() will eventually be used by coalescing,
splitting, and spilling for dead code elimination. It can delete chains of dead
instructions as long as there are no dependency loops.
llvm-svn: 127287
2011-03-08 22:46:11 +00:00
fbb482b314
llvm.dbg.declare intrinsic does not use any llvm::Values. It's magic!
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llvm-svn: 127282
2011-03-08 22:12:11 +00:00
e6fbe056b8
Reverting testcase at 4126896; r126672 broke something else. <rdar://problem/9055247>
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llvm-svn: 127278
2011-03-08 21:54:17 +00:00
c90ca36e29
Once again try to appease the buildbot gods.
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llvm-svn: 127272
2011-03-08 21:36:29 +00:00
128e9f0fe9
Strip cruft.
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llvm-svn: 127269
2011-03-08 20:19:10 +00:00
eee5413f3b
Add a testcase for r127263.
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llvm-svn: 127266
2011-03-08 19:49:15 +00:00
2e1e1c1e36
Try to fix the compilation error due to type incombatibility.
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llvm-svn: 127265
2011-03-08 19:39:35 +00:00
880e0b7760
Fix the build for MSVC 9 whose upper_bound() wants to compare elements in the sorted array.
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Patch by Olaf Krzikalla!
llvm-svn: 127264
2011-03-08 19:37:54 +00:00
7238cba180
Fix some latent bugs if the nodes are unschedulable. We'd gotten away
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with this before since none of the register tracking or nightly tests
had unschedulable nodes.
This should probably be refixed with a special default Node that just
returns some "don't touch me" values.
Fixes PR9427
llvm-svn: 127263
2011-03-08 19:35:47 +00:00
8030932290
Stop building PPC parts on OSX. Radar 8637926.
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llvm-svn: 127262
2011-03-08 19:28:28 +00:00
a28879b824
Revert "Make a comparator's argument `const'. This fixes the build for
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MSVC 9."
The "fix" was meaningless.
This reverts commit r127245.
llvm-svn: 127260
2011-03-08 19:26:21 +00:00
14be61aeee
Darwin 'as' silently ignores the '.ident' directive.
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llvm-svn: 127258
2011-03-08 19:17:19 +00:00
cd5d3ee8c4
Typo. Patch by arrowdodger.
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llvm-svn: 127256
2011-03-08 18:01:22 +00:00
b8ca01fff5
Reduce vector reallocations.
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llvm-svn: 127254
2011-03-08 17:28:36 +00:00
c7b48d40d4
fix incorrect comment.
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llvm-svn: 127252
2011-03-08 16:59:03 +00:00
e1aa67cff5
Since last couple of days, argument number is encoded using 8 bits from line number field in argument's debug info.
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llvm-svn: 127250
2011-03-08 16:29:40 +00:00
fb30b85e7c
Update DILexicalBlock doc to mention new fields.
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llvm-svn: 127249
2011-03-08 16:25:29 +00:00
679cfb54ec
X86: Fix the (saddo/ssub x, 1) -> incl/decl selection to check the right operand for 1.
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Found by inspection.
llvm-svn: 127247
2011-03-08 15:20:20 +00:00
42e9aaa4b1
PTX: Add intrinsic support for ntid, ctaid, and nctaid registers
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llvm-svn: 127246
2011-03-08 14:10:18 +00:00
6ec5983a0c
Make a comparator's argument `const'. This fixes the build for MSVC 9.
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llvm-svn: 127245
2011-03-08 13:52:07 +00:00
a693632dfd
Remove remnant of my experimentation with CMake.
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llvm-svn: 127244
2011-03-08 13:30:52 +00:00
7dc3d47c34
Fix PR9331. Simplified version of a patch by Jakub Staszak.
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llvm-svn: 127243
2011-03-08 12:39:03 +00:00
5918457b5b
lib/Support/regcomp.c: Fix cygwin warning.
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llvm-svn: 127241
2011-03-08 12:25:29 +00:00
Bill Wendling