Commit Graph

160674 Commits

Author SHA1 Message Date
Aaron Smith fbe65404fd [PDB] Implement more find methods for PDB symbols
Summary:
Add additional find methods on PDB raw symbols.

findChildrenByAddr()
findChildrenByVA()
findInlineFramesByAddr()
findInlineFramesByVA()
findInlineLines()
findInlineLinesByAddr()
findInlineLinesByRVA()
findInlineLinesByVA()




Reviewers: zturner, llvm-commits

Reviewed By: zturner

Differential Revision: https://reviews.llvm.org/D43637

llvm-svn: 325824
2018-02-22 19:47:43 +00:00
Easwaran Raman 385d8ea8b5 [ThinLTO] Represent relative BF using a scaled representation .
Summary:
The current integer representation of relative block frequency prevents
representing relative block frequencies below 1. This change uses a 8 of
the 29 bits to represent the decimal part by using a fixed scale of -8.

Reviewers: tejohnson, davidxl

Subscribers: mehdi_amini, inglorion, llvm-commits

Differential Revision: https://reviews.llvm.org/D43520

llvm-svn: 325823
2018-02-22 19:44:08 +00:00
Peter Collingbourne 32f5405bff Fix DataFlowSanitizer instrumentation pass to take parameter position changes into account for custom functions.
When DataFlowSanitizer transforms a call to a custom function, the
new call has extra parameters. The attributes on parameters must be
updated to take the new position of each parameter into account.

Patch by Sam Kerner!

Differential Revision: https://reviews.llvm.org/D43132

llvm-svn: 325820
2018-02-22 19:09:07 +00:00
Vitaly Buka a139b69e12 [ThinLTO] Always create linked objects file for --thinlto-index-only=
Summary:
ThinLTO indexing may decide to skip all objects. If we don't write something to
the list build system may consider this as failure or linker can reuse a file
from the previews build.

Reviewers: pcc, tejohnson

Subscribers: mehdi_amini, inglorion, eraman, hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D43415

llvm-svn: 325819
2018-02-22 19:06:15 +00:00
Vitaly Buka ffbf7dbeff [gold] Extract runLTO to avoid exit(0) from function with non-trivial objects on the stack
Reviewers: tejohnson, pcc

Subscribers: inglorion, llvm-commits

Differential Revision: https://reviews.llvm.org/D43537

llvm-svn: 325818
2018-02-22 19:06:05 +00:00
Matt Morehouse ddf352b953 [libFuzzer] Include TEMP_MAX_LEN in Fuzzer::PrintStats.
Reviewers: kcc

Reviewed By: kcc

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D43597

llvm-svn: 325817
2018-02-22 19:00:17 +00:00
Daniel Neilson 20c9207be3 [AlignmentFromAssumptions] Set source and dest alignments of memory intrinsiscs separately
Summary:
This change is part of step five in the series of changes to remove alignment argument from
memcpy/memmove/memset in favour of alignment attributes. In particular, this changes the
AlignmentFromAssumptions pass to cease using the old getAlignment()/setAlignment API of
MemoryIntrinsic in favour of getting/setting source & dest specific alignments through
the new API. This allows us to simplify some of the code in this pass and also be more
aggressive about setting the source and destination alignments separately.

Steps:
Step 1) Remove alignment parameter and create alignment parameter attributes for
memcpy/memmove/memset. ( rL322965, rC322964, rL322963 )
Step 2) Expand the IRBuilder API to allow creation of memcpy/memmove with differing
source and dest alignments. ( rL323597 )
Step 3) Update Clang to use the new IRBuilder API. ( rC323617 )
Step 4) Update Polly to use the new IRBuilder API. ( rL323618 )
Step 5) Update LLVM passes that create memcpy/memmove calls to use the new IRBuilder API,
and those that use use MemIntrinsicInst::[get|set]Alignment() to use [get|set]DestAlignment()
and [get|set]SourceAlignment() instead. ( rL323886, rL323891, rL324148, rL324273, rL324278,
rL324384, rL324395, rL324402, rL324626, rL324642, rL324653, rL324654, rL324773, rL324774,
rL324781, rL324784, rL324955, rL324960 )
Step 6) Remove the single-alignment IRBuilder API for memcpy/memmove, and the
MemIntrinsicInst::[get|set]Alignment() methods.

Reference
   http://lists.llvm.org/pipermail/llvm-dev/2015-August/089384.html
   http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20151109/312083.html

Reviewers: hfinkel, bollu, reames

Reviewed By: reames

Subscribers: reames, llvm-commits

Differential Revision: https://reviews.llvm.org/D43081

llvm-svn: 325816
2018-02-22 18:55:59 +00:00
Simon Pilgrim be72fe1fda [SelectionDAG] Move matchUnaryPredicate/matchBinaryPredicate into SelectionDAGNodes.h
This allows us to improve vector constant matching in more DAG code (backends, TargetLowering etc.).

Differential Revision: https://reviews.llvm.org/D43466

llvm-svn: 325815
2018-02-22 18:45:13 +00:00
Simon Pilgrim 8831f6e57d [MC] Don't crash on modulo by zero (PR35650)
Extension to D12776, handle modulo by zero in the same way we handle divide by zero.

Differential Revision: https://reviews.llvm.org/D43631

llvm-svn: 325810
2018-02-22 18:06:48 +00:00
Sanjay Patel 8f2996fbdf [IRBuilder] add creators for FP with FMF; NFCI
Also, add a helper for the constant folder to reduce duplication.

It seems out-of-place for and/or to be doing simplifications here?
Otherwise, I could have used the helper on those opcodes too. 

llvm-svn: 325808
2018-02-22 17:33:20 +00:00
Simon Pilgrim b8237d2e2b [X86][AVX512] Add DQ+VLX scalar int<->fp tests cases for D43441
llvm-svn: 325804
2018-02-22 16:29:08 +00:00
Alexey Bataev bd786944b9 [DEBUGINFO] Do not output labels for empty macinfo sections.
Summary:
If there is no debug info for macros, do not emit labels for empty
macinfo sections.

Reviewers: probinson, echristo

Subscribers: aprantl, llvm-commits, JDevlieghere

Differential Revision: https://reviews.llvm.org/D43589

llvm-svn: 325803
2018-02-22 16:20:30 +00:00
Nicolai Haehnle d9f0b07ff7 TableGen: Add strict assertions to sanity check earlier type checking
Summary:
Both of these errors should have been caught by type-checking during
parsing.

Change-Id: I891087936fd1a91d21bcda57c256e3edbe12b94d

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D43558

llvm-svn: 325800
2018-02-22 15:27:12 +00:00
Nicolai Haehnle 8fb962c04e TableGen: Allow implicit casting between string and code
Summary:
Perhaps the distinction between the two should be removed entirely
in the long term, and the [{ ... }] syntax should just be a convenient
way of writing multi-line strings.

In the meantime, a lot of existing .td files are quite relaxed about
string vs. code, and this change allows switching on more consistent
type checks without breaking those.

Change-Id: If85e3e04469e41b58e2703b62ac0032d2711713c

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D43557

llvm-svn: 325799
2018-02-22 15:27:03 +00:00
Nicolai Haehnle 81097ba6b5 TableGen: Fix type of resolved and converted lists
Summary:
There are no new test cases, but a subsequent patch will introduce
assertions that would be triggered by existing test cases without this
fix.

Change-Id: I6a82d4b311b012aff3932978ae86f6a2dcfbf725

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D43556

llvm-svn: 325798
2018-02-22 15:26:45 +00:00
Nicolai Haehnle 6d64915c87 TableGen: Fix type deduction for !foreach
Summary:
In the case of !foreach(id, input-list, transform) where the type of
input-list is list<A> and the type of transform is B, we now correctly
deduce list<B> as the type of the !foreach.

Change-Id: Ia19dd65eecc5991dd648280ba6a15f6a20fd61de

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D43555

llvm-svn: 325797
2018-02-22 15:26:35 +00:00
Nicolai Haehnle e4a2cf5761 TableGen: Generalize type deduction for !listconcat
Summary:
This way, it should work even with complex operands.

Change-Id: Iaccf5bbb50bd5882a0ba5d59689e4381315fb361

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D43554

llvm-svn: 325796
2018-02-22 15:26:28 +00:00
Nicolai Haehnle f19083d1ed TableGen: Add some more helpful error messages
Summary: Some fairly simple changes to start with.

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D43552

Change-Id: I0c92731b36d309c6edfcae42595ae1a70cc051c9
llvm-svn: 325795
2018-02-22 15:26:21 +00:00
Nicolai Haehnle 40b140fef1 AMDGPU: Stop using .NAME in .td files
Summary:
.NAME is a bit of an odd duck, in that we should really treat it like
a template argument, but we currently don't, and so when and where
NAME is initialized and how is pretty inconsistent. Best to just avoid
using it as a field of already instantiated records, and use cast to
string instead.

Change-Id: I5a0c202401cede3d5c3827ab9c7858ea48b29108

Reviewers: arsenm, rampitec

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D43551

llvm-svn: 325794
2018-02-22 15:25:11 +00:00
Shiva Chen 7c17242b92 [RISCV] Implement c.lui immediate operand constraint
Implement c.lui immediate constraint to [1, 31] and [0xfffe0, 0xfffff].
The RISC-V ISA describes the constraint as [1, 63], with that value
being loaded in to bits 17-12 of the destination register and sign extended
from bit 17. Therefore, this 6-bit immediate can represent values in the
ranges [1, 31] and [0xfffe0, 0xfffff].

Differential Revision: https://reviews.llvm.org/D42834

llvm-svn: 325792
2018-02-22 15:02:28 +00:00
Luke Cheeseman 6c1e6bbe0c [FunctionAttrs][ArgumentPromotion][GlobalOpt] Disable some optimisations passes for naked functions
- Fix for bug 36078.
- Prevent the functionattrs, function-attrs, globalopt and argpromotion passes
  from changing naked functions.
- These passes can perform some alterations to the functions that should not be
  applied. An example is removing parameters that are seemingly not used because
  they are only referenced in the inline assembly. Another example is marking
  the function as fastcc.

llvm-svn: 325788
2018-02-22 14:42:08 +00:00
Sanjay Patel 92b7371113 [InstCombine] add fmul multi-use test; NFC
Also, rename tests to make their intent clearer.

llvm-svn: 325785
2018-02-22 14:27:16 +00:00
Stefan Maksimovic ed797a3049 [mips] Generate memory dependencies for byVal arguments
There were no memory dependencies made between stores generated
when lowering formal arguments and loads generated when
call lowering byVal arguments which made the Post-RA scheduler
place a load before a matching store.

Make the fixed object stored to mutable so that the load
instructions can have their memory dependencies added

Set the frame object as isAliased which clears the underlying
objects vector in ScheduleDAGInstrs::buildSchedGraph().
This results in addition of all stores as dependenies for loads.

This problem appeared when passing a byVal parameter
coupled with a fastcc function call.

Differential Revision: https://reviews.llvm.org/D37515

llvm-svn: 325782
2018-02-22 13:40:42 +00:00
Serge Guelton 1fb81bcb9b Syndicate duplicate code between CallInst and InvokeInst
NFC intended, syndicate common code to a parametric base class. Part of the original problem is that InvokeInst is a TerminatorInst, unlike CallInst. the problem is solved by introducing a parametrized class paramtertized by its base.

Differential Revision: https://reviews.llvm.org/D40727

llvm-svn: 325778
2018-02-22 13:30:32 +00:00
Simon Pilgrim 753c0d20f7 Fix Wdocumentation warning - remove param tag for old argument
llvm-svn: 325777
2018-02-22 13:28:42 +00:00
Alex Bradbury 8d8d0a733f [RISCV][NFC] Make logic in RISCVMCCodeEmitter::getImmOpValue more defensive
As pointed out by @sabuasal in a comment on D23568, the logic in  
RISCVMCCodeEmitter::getImmOpValue could be more defensive. Although with the  
current instruction definitions it is always the case that `VK_RISCV_LO` is  
always used with either an I- or S-format instruction, this may not always be  
the case in the future. Add a check to ensure we will get an assertion in  
debug builds if that changes.

llvm-svn: 325775
2018-02-22 13:24:25 +00:00
Simon Pilgrim 864949d5e9 [SLPVectorizer][X86] Add load extend tests (PR36091)
llvm-svn: 325772
2018-02-22 12:19:34 +00:00
Simon Dardis 16596471d9 [mips] Regenerate tests for D38128 (NFC)
llvm-svn: 325770
2018-02-22 11:53:01 +00:00
Jonas Devlieghere 989cd551da [dsymutil] Remove \brief from comments. NFC
With autobrief enabled, these server no purpose anymore. Most of them
were already removed but this makes everything consistent.

llvm-svn: 325769
2018-02-22 11:43:43 +00:00
Jonas Devlieghere fa5c1b11cc [dsymutil] Fix typos and formatting. NFC.
Some over-due gardening: this fixes a bunch of typos and makes the
formatting consistent with LLVM's style guide.

llvm-svn: 325768
2018-02-22 11:32:51 +00:00
Sjoerd Meijer d31a8c0595 Recommit: [ARM] f16 constant pool fix
This recommits r325754; the modified and failing test case
actually didn't need any modifications.

llvm-svn: 325765
2018-02-22 10:43:57 +00:00
Jonas Devlieghere d47268ecc2 [dsymutil] Replace PATH_MAX in SmallString with fixed value.
Apparently the Windows bots don't know this define, so just going with a
sensible default.

Failing builds:
  http://lab.llvm.org:8011/builders/lldb-x86-windows-msvc2015/builds/19179
  http://lab.llvm.org:8011/builders/lld-x86_64-win7/builds/19263

llvm-svn: 325762
2018-02-22 09:42:10 +00:00
David Green 01e0f25a9f [ARM] Fix issue with large xor constants.
Fixup to rL325573 for large xor constants.

Thanks to Eli Friedman for the catch.

Differential revision: https://reviews.llvm.org/D43549

llvm-svn: 325761
2018-02-22 09:38:57 +00:00
Jonas Devlieghere 26e943106b [dsymutil] Be smarter in caching calls to realpath
Calling realpath is expensive but necessary to perform the uniqueing in
dsymutil. Although we already cached the results for every individual
file in the line table, we had reports of it taking 40 seconds of a 3.5
minute link.

This patch adds a second level of caching. When we do have to call
realpath, we cache its result for its parents path. We didn't replace
the existing caching, because it's fast (indexed) and saves us from
reading the line table for entries we've already seen.

For WebkitCore this results in a decrease of 11% in linking time: from
85.79 to 76.11 seconds (average over 3 runs).

Differential revision: https://reviews.llvm.org/D43511

llvm-svn: 325757
2018-02-22 09:20:40 +00:00
Sjoerd Meijer 9a25247f80 Revert r325754 and r325755 (f16 literal pool) because buildbots were unhappy.
llvm-svn: 325756
2018-02-22 08:41:55 +00:00
Sjoerd Meijer f98e32cf53 Added a test that I forgot to svn add in my previous commit r325754.
llvm-svn: 325755
2018-02-22 08:20:50 +00:00
Sjoerd Meijer 7d5909eb0f [ARM] f16 constant pool fix
This is a follow up of r325012, that allowed half types in constant pools.
Proper alignment was enforced when a big basic block was split up, but not when
a CPE was placed before/after a block; the successor block had the wrong
alignment.

Differential Revision: https://reviews.llvm.org/D43580

llvm-svn: 325754
2018-02-22 08:16:05 +00:00
Hiroshi Inoue 7f9f92f8b6 [NFC] fix trivial typos in comments
"a a" -> "a"

llvm-svn: 325752
2018-02-22 07:48:29 +00:00
Craig Topper 1d104b996a [DAGCombiner] Add two calls to isVector before making calls to getVectorElementType/getVectorNumElements to avoid an assert.
We looked through a BITCAST, but the bitcast might be a from a scalar type rather than a vector.

I don't have a test case. I stumbled onto it while prototyping another change that isn't ready yet.

llvm-svn: 325750
2018-02-22 07:05:27 +00:00
Mircea Trofin 56950974d4 [SampleProf] NFC. Expose reusable functionality in SampleProfile.
Summary:
Exposing getOffset and findFunctionSamples as members of
SampleProfile. They are intimately tied to design choices of the
sample profile format - using offsets instead of line numbers, and
traversing inlined functions stack, respectively.

Reviewers: davidxl

Reviewed By: davidxl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D43605

llvm-svn: 325747
2018-02-22 06:42:57 +00:00
Max Kazantsev 80843a0acc [SCEV][NFC] Factor out common logic into a separate method
SCEV has multiple occurences of code when we need to prove some predicate on
every iteration of a loop and do it with invocations of couple `isLoopEntryGuardedByCond`,
`isLoopBackedgeGuardedByCond`. This patch factors out these two calls into a separate
method. It is a preparation step to extend this logic: it is not the only way how we can prove
such conditions.

Differential Revision: https://reviews.llvm.org/D43373

llvm-svn: 325745
2018-02-22 06:27:32 +00:00
Nemanja Ivanovic e54a9ee8ac [PowerPC] Do not produce invalid CTR loop with an FRem
An FRem instruction inside a loop should prevent the loop from being converted
into a CTR loop since this is not an operation that is legal on any PPC
subtarget. This will always be a call to a library function which means the
loop will be invalid if this instruction is in the body.

Fixes PR36292.

llvm-svn: 325739
2018-02-22 03:02:41 +00:00
Vedant Kumar 1ceabcf080 [Utils] Avoid a hash table lookup in salvageDI, NFC
According to the current coverage report salvageDebugInfo() is called
5.12 million times during testing and almost always returns early.

The early return depends on LocalAsMetadata::getIfExists returning null,
which involves a DenseMap lookup in an LLVMContextImpl. We can probably
speed this up by simply checking the IsUsedByMD bit in Value.

llvm-svn: 325738
2018-02-22 01:29:41 +00:00
Simon Pilgrim 55b7e01116 [X86][MMX] Generlize MMX_MOVD64rr combines to accept v4i16/v8i8 build vectors as well as v2i32
Also handle both cases where the lower 32-bits of the MMX is undef or zero extended.

llvm-svn: 325736
2018-02-21 23:07:30 +00:00
Yonghong Song 9fdd139b41 bpf: disable DwarfUsesRelocationsAcrossSections
The pahole does not work with BPF backend properly:

  -bash-4.2$ cat test.c
  struct test_t {
    int a;
    int b;
  };
  int test(struct test_t *s) {
    return s->a;
  }
  -bash-4.2$ clang -g -O2 -target bpf -c test.c
  -bash-4.2$ pahole test.o
  struct clang version 7.0.0 (trunk 325446) (llvm/trunk 325464) {
          clang version 7.0.0 (trunk 325446) (llvm/trunk 325464) clang version 7.0.0 (trunk 325446) (llvm/trunk 325464); /*     0     4 */
          clang version 7.0.0 (trunk 325446) (llvm/trunk 325464) clang version 7.0.0 (trunk 325446) (llvm/trunk 325464); /*     4     4 */

          /* size: 8, cachelines: 1, members: 2 */
          /* last cacheline: 8 bytes */
  };
  -bash-4.2$

The reason is that BPF backend is not yet implemented in elfutils backend
  https://github.com/threatstack/elfutils/tree/master/backends
and pahole depends on elfutils for dwarf parsing and resolving relocation.

More specifically, the unsupported relocation in .debug_info for type/member name
against symbol table caused the incorrect result above. The following is
the raw .rel.debug_info for the above example,
  Hex dump of section '.rel.debug_info':
    0x00000000 06000000 00000000 0a000000 0b000000 ................
    0x00000010 0c000000 00000000 0a000000 01000000 ................
    0x00000020 12000000 00000000 0a000000 02000000 ................
    0x00000030 16000000 00000000 0a000000 0e000000 ................
    0x00000040 1a000000 00000000 0a000000 03000000 ................
               ----------------- -------- --------
                reloc location     type   symtab index

  Hex dump of section '.debug_info':
    0x00000000 7b000000 04000000 00000801 00000000 {...............
    0x00000010 0c000000 00000000 00000000 00000000 ................
    0x00000020 00000000 00001000 00000200 00000000 ................

Based on "type", the proper value will be extracted from symbol table
and filled in .debug_info so later on .debug_info can be properly
resolved against debug strings.

There are two ways to fix this problem. One is to fix elfutils by adding
BPF support which is desirable. This could take a long time and won't work
with already deployed pahole. For a short term workaround, we can disable
dwarf cross-section relation which specifically avoids debug_info and
symbol table cross relocation. This should help any dwarf-related tool
which has not implement BPF specific relocations yet.

Now .rel.debug_info does not have any relocation for symbol table and
.debug_info itself contains necessary relocation information by itself.
  Hex dump of section '.debug_info':
    0x00000000 7b000000 04000000 00000801 00000000 {...............
    0x00000010 0c003700 00000000 00003e00 00000000 ..7.......>.....
    0x00000020 00000000 00001000 00000200 00000000 ................
  location 0xc has 0, 0x12 has 0x37, 0x1a has 0x3e in place which
  will be used in relocation resolution. Here, the values of 0, 0x37 and 0x3e
  are offset in .debug_str section.
Please note the difference between two above .debug_info dumps.

With the fix, pahole works properly with BPF backend:
  -bash-4.2$ clang -O2 -g -target bpf -c test.c
  -bash-4.2$ pahole test.o
  struct test_t {
          int                        a;                    /*     0     4 */
          int                        b;                    /*     4     4 */

          /* size: 8, cachelines: 1, members: 2 */
          /* last cacheline: 8 bytes */
  };

Signed-off-by: Yonghong Song <yhs@fb.com>
llvm-svn: 325735
2018-02-21 22:59:14 +00:00
Sanjay Patel 9befaeb582 [InstCombine] add some random FMF to tests so we know it's not dropped; NFC
llvm-svn: 325734
2018-02-21 22:48:28 +00:00
Pavel Labath 3b17b84b9c Resubmit r325107 (case folding DJB hash)
The issue was that the has function was generating different results depending
on the signedness of char on the host platform. This commit fixes the issue by
explicitly using an unsigned char type to prevent sign extension and
adds some extra tests.

The original commit message was:

This patch implements a variant of the DJB hash function which folds the
input according to the algorithm in the Dwarf 5 specification (Section
6.1.1.4.5), which in turn references the Unicode Standard (Section 5.18,
"Case Mappings").

To achieve this, I have added a llvm::sys::unicode::foldCharSimple
function, which performs this mapping. The implementation of this
function was generated from the CaseMatching.txt file from the Unicode
spec using a python script (which is also included in this patch). The
script tries to optimize the function by coalescing adjecant mappings
with the same shift and stride (terms I made up). Theoretically, it
could be made a bit smarter and merge adjecant blocks that were
interrupted by only one or two characters with exceptional mapping, but
this would save only a couple of branches, while it would greatly
complicate the implementation, so I deemed it was not worth it.

Since we assume that the vast majority of the input characters will be
US-ASCII, the folding hash function has a fast-path for handling these,
and only whips out the full decode+fold+encode logic if we encounter a
character outside of this range. It might be possible to implement the
folding directly on utf8 sequences, but this would also bring a lot of
complexity for the few cases where we will actually need to process
non-ascii characters.

Reviewers: JDevlieghere, aprantl, probinson, dblaikie

Subscribers: mgorny, hintonda, echristo, clayborg, vleschuk, llvm-commits

Differential Revision: https://reviews.llvm.org/D42740

llvm-svn: 325732
2018-02-21 22:36:31 +00:00
Tobias Edler von Koch ba7a1f08da [Hexagon] Add TargetRegisterInfo::getPointerRegClass() override
llvm-svn: 325731
2018-02-21 22:27:07 +00:00
Sanjay Patel 5a6f904520 [InstCombine] add and use Create*FMF functions; NFC
llvm-svn: 325730
2018-02-21 22:18:55 +00:00
Simon Pilgrim 664582b781 [X86][MMX] Add MMX_MOVD64rr build vector tests showing undef elements in the lower half
llvm-svn: 325729
2018-02-21 22:10:48 +00:00
Lang Hames a944589cc5 [ORC] Switch to shared_ptr ownership for SymbolSources in VSOs.
This makes it easy to free a SymbolSource (and any related
resources) when the last reference in a VSO is dropped.

llvm-svn: 325727
2018-02-21 21:55:57 +00:00
Lang Hames 40c9e5436d [ORC] Switch from a StringMap to an internal VSO in RTDyldObjectLinkingLayer.
This is a first step towards switching to VSOs as the primary symbol tables in
ORC.

llvm-svn: 325726
2018-02-21 21:55:54 +00:00
Lang Hames 589eece132 [ORC] Switch RTDyldObjectLinkingLayer to take a unique_ptr<MemoryBuffer> rather
than a shared ObjectFile/MemoryBuffer pair.

There's no need to pre-parse the buffer into an ObjectFile before passing it
down to the linking layer, and moving the parsing into the linking layer allows
us remove the parsing code at each call site.

llvm-svn: 325725
2018-02-21 21:55:49 +00:00
Sanjay Patel d53da082a0 [AArch64] fix IR names to not be 'tmp' because that gives the CHECK script problems
llvm-svn: 325718
2018-02-21 20:48:14 +00:00
Sanjay Patel ffe51e450f [AArch64] add SLP test for matmul (PR36280); NFC
This is a slight reduction of one of the benchmarks
that suffered with D43079. Cost model changes should
not cause this test to remain scalarized.

llvm-svn: 325717
2018-02-21 20:34:16 +00:00
Rafael Espindola 9a2bf413a0 Revert "[IRMover] Implement name based structure type mapping"
This reverts commit r325686.

There was a misunderstanding and this has not been approved yet.

llvm-svn: 325715
2018-02-21 20:12:18 +00:00
Rafael Espindola 92f3578c03 Fix a memory leak and a cross module reference.
llvm-svn: 325712
2018-02-21 19:55:11 +00:00
Evgeniy Stepanov 43271b1803 [hwasan] Fix inline instrumentation.
This patch changes hwasan inline instrumentation:

Fixes address untagging for shadow address calculation (use 0xFF instead of 0x00 for the top byte).
Emits brk instruction instead of hlt for the kernel and user space.
Use 0x900 instead of 0x100 for brk immediate (0x100 - 0x800 are unavailable in the kernel).
Fixes and adds appropriate tests.

Patch by Andrey Konovalov.

Differential Revision: https://reviews.llvm.org/D43135

llvm-svn: 325711
2018-02-21 19:52:23 +00:00
Vedant Kumar b3568ec928 asan: add kernel inline instrumentation test (retry)
Add a test that checks that kernel inline instrumentation works.

Patch by Andrey Konovalov!

Differential Revision: https://reviews.llvm.org/D42473

llvm-svn: 325710
2018-02-21 19:40:55 +00:00
Simon Pilgrim 7f078eabda [X86][MMX] Run MMX bitcast test on 32 and 64-bit targets
llvm-svn: 325707
2018-02-21 18:52:16 +00:00
Frederich Munch 33ef594c58 Handle IMAGE_REL_AMD64_ADDR32NB in RuntimeDyldCOFF
Summary:
IMAGE_REL_AMD64_ADDR32NB relocations are currently set to zero in all cases.
This patch sets the relocation to the correct value when possible and shows an error when not.

Reviewers: enderby, lhames, compnerd

Reviewed By: compnerd

Subscribers: LepelTsmok, compnerd, martell, llvm-commits

Differential Revision: https://reviews.llvm.org/D30709

llvm-svn: 325700
2018-02-21 17:18:20 +00:00
Alexey Bataev 650f639d33 [LV] Fix test checks, NFC
llvm-svn: 325699
2018-02-21 16:48:23 +00:00
Simon Pilgrim 01da1191a3 [X86][MMX] Regenerate MMX MASKMOV test
llvm-svn: 325698
2018-02-21 16:38:08 +00:00
Jonas Paulsson 77cdf3881c [Hexagon] Return true in enableMultipleCopyHints().
Enable multiple COPY hints to eliminate more COPYs during register allocation.

Note that this is something all targets should do, see
https://reviews.llvm.org/D38128.

Review: Krzysztof Parzyszek
llvm-svn: 325697
2018-02-21 16:37:45 +00:00
Simon Pilgrim 3679c95ae4 [X86][MMX] Regenerate MMX arithmetic tests
llvm-svn: 325696
2018-02-21 16:37:10 +00:00
Simon Pilgrim 82d33b7c44 [X86] LowerBITCAST - pull out repeated calls to getOperand(0). NFCI.
llvm-svn: 325695
2018-02-21 16:35:40 +00:00
Alexey Bataev cdd0675ddc [SLP] Fix test checks, NFC.
llvm-svn: 325689
2018-02-21 15:32:58 +00:00
Jonas Devlieghere e0af7c390d [Sparc] Include __tls_get_addr in symbol table for TLS calls to it
Global Dynamic and Local Dynamic call relocations only implicitly
reference __tls_get_addr; there is no connection in the ELF file between
the relocations and the symbol other than the specification for the
relocations' semantics. However, it still needs to be in the symbol
table despite the lack of explicit references to the symbol table entry,
since it needs to be bound at link time for these relocations, otherwise
any objects will fail to link.

For details, see https://sourceware.org/bugzilla/show_bug.cgi?id=22832.

Path by: James Clarke (jrtc27)

Differential revision: https://reviews.llvm.org/D43271

llvm-svn: 325688
2018-02-21 15:25:26 +00:00
Silviu Baranga 10ad93c6bf [SCEV] Temporarily disable loop versioning for the purpose
of turning SCEVUnknowns of PHIs into AddRecExprs.

This feature is now hidden behind the -scev-version-unknown flag.

Fixes PR36032 and PR35432.

llvm-svn: 325687
2018-02-21 15:20:32 +00:00
Eugene Leviant c556974f72 [IRMover] Implement name based structure type mapping
Differential revision: https://reviews.llvm.org/D43199

llvm-svn: 325686
2018-02-21 15:13:48 +00:00
Simon Pilgrim 9c669e13c9 [X86][MMX] Regenerate MMX PSUB commutation test
llvm-svn: 325685
2018-02-21 15:07:47 +00:00
Simon Pilgrim e1f3de55ac [X86] Regenerate GPR:XMM bitcast test
llvm-svn: 325684
2018-02-21 15:05:47 +00:00
Nicolai Haehnle 770397f4cd AMDGPU: Do not combine loads/store across physreg defs
Summary:
Since this pass operates on machine SSA form, this should only really
affect M0 in practice.

Fixes various piglit variable-indexing/vs-varying-array-mat4-index-*

Change-Id: Ib2a1dc3a8d7b08225a8da49a86f533faa0986aa8
Fixes: r317751 ("AMDGPU: Merge S_BUFFER_LOAD_DWORD_IMM into x2, x4")

Reviewers: arsenm, mareko, rampitec

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D40343

llvm-svn: 325677
2018-02-21 13:31:35 +00:00
Dmitry Preobrazhensky d6e1a9404d [AMDGPU][MC] Added lds support for MUBUF instructions
See bug 28234: https://bugs.llvm.org/show_bug.cgi?id=28234

Differential Revision: https://reviews.llvm.org/D43472

Reviewers: vpykhtin, artem.tamazov, arsenm
llvm-svn: 325676
2018-02-21 13:13:48 +00:00
Simon Pilgrim b21518a8cc [X86][MMX] Add PR29222 test case
llvm-svn: 325675
2018-02-21 12:06:27 +00:00
Simon Pilgrim cf7640564a [X86][MMX] Add some MMX build vector tests
llvm-svn: 325674
2018-02-21 12:01:30 +00:00
Martell Malone 51f7b63732 RISCV: Add COFF address space
PE spec defines and reserves to following for RISCV

IMAGE_FILE_MACHINE_RISCV32  0x5032
IMAGE_FILE_MACHINE_RISCV64  0x5064
IMAGE_FILE_MACHINE_RISCV128 0x5128

https://msdn.microsoft.com/en-us/library/windows/desktop/ms680547(v=vs.85).aspx

Reviewers: asb, rnk, compnerd

Differential Revision: https://reviews.llvm.org/D41571

llvm-svn: 325667
2018-02-21 06:42:38 +00:00
Vedant Kumar 56492f9177 [BDCE] Salvage debug info from dying insts
This results in 15 additional unique source variables in a stage2 build
of FileCheck (at '-Os -g'), with a negligible increase in the size of
the .debug_loc section.

llvm-svn: 325660
2018-02-21 01:55:33 +00:00
Sanjay Patel e6143904b9 revert r325515: [TTI CostModel] change default cost of FP ops to 1 (PR36280)
There are too many perf regressions resulting from this, so we need to 
investigate (and add tests for) targets like ARM and AArch64 before 
trying to reinstate.

llvm-svn: 325658
2018-02-21 01:42:52 +00:00
Aaron Smith 24e28629d7 [lit] Fix a problem with spaces in the python path by adding quotes around it
These are the last tests left to fix after D43265.

llvm-svn: 325657
2018-02-21 00:41:30 +00:00
Craig Topper d710adac2d [X86] Disable CLWB for Cannon Lake
Cannon Lake does not support CLWB, therefore it
does not include all features listed under SKX anymore.

Instead, enumerate all SKX features with the exception of CLWB.

Patch by Gabor Buella

Differential Revision: https://reviews.llvm.org/D43380

llvm-svn: 325654
2018-02-21 00:15:48 +00:00
Simon Dardis 7bc8ad5849 [mips] Spectre variant two mitigation for MIPSR2
This patch provides mitigation for CVE-2017-5715, Spectre variant two,
which affects the P5600 and P6600. It implements the LLVM part of
-mindirect-jump=hazard. It is _not_ enabled by default for the P5600.

The migitation strategy suggested by MIPS for these processors is to use
hazard barrier instructions. 'jalr.hb' and 'jr.hb' are hazard
barrier variants of the 'jalr' and 'jr' instructions respectively.

These instructions impede the execution of instruction stream until
architecturally defined hazards (changes to the instruction stream,
privileged registers which may affect execution) are cleared. These
instructions in MIPS' designs are not speculated past.

These instructions are used with the attribute +use-indirect-jump-hazard
when branching indirectly and for indirect function calls.

These instructions are defined by the MIPS32R2 ISA, so this mitigation
method is not compatible with processors which implement an earlier
revision of the MIPS ISA.

Performance benchmarking of this option with -fpic and lld using
-z hazardplt shows a difference of overall 10%~ time increase
for the LLVM testsuite. Certain benchmarks such as methcall show a
substantially larger increase in time due to their nature.

Reviewers: atanasyan, zoran.jovanovic

Differential Revision: https://reviews.llvm.org/D43486

llvm-svn: 325653
2018-02-21 00:06:53 +00:00
Sanjay Patel 6f716a7c5e [InstCombine] C / -X --> -C / X
We already do this in DAGCombiner, but it should
also be good to eliminate the fsub use in IR.

This is similar to rL325648.

llvm-svn: 325649
2018-02-21 00:01:45 +00:00
Sanjay Patel d8dd0151fc [InstCombine] -X / C --> X / -C for FP
We already do this in DAGCombiner, but it should 
also be good to eliminate the fsub use in IR.

llvm-svn: 325648
2018-02-20 23:51:16 +00:00
Sanjay Patel 8357371861 [InstCombine] add tests for fdiv with negated op and constant op; NFC
llvm-svn: 325644
2018-02-20 23:34:43 +00:00
Konstantin Zhuravlyov 5c1237a1fd Revert "[AMDGPU] Increased vector length for global/constant loads."
https://reviews.llvm.org/rL325518

It breaks following OpenCL conformance tests:
  - Basic - parameter_types
  - Basic - vload_private

llvm-svn: 325643
2018-02-20 23:30:21 +00:00
Sanjay Patel 3e569ac0cc [PatternMatch] allow vector matches with m_FNeg
llvm-svn: 325642
2018-02-20 23:29:05 +00:00
Sanjoy Das 737fa40ffa [DSE] Don't DSE stores that subsequent memmove calls read from
Summary:
We used to remove the first memmove in cases like this:

  memmove(p, p+2, 8);
  memmove(p, p+2, 8);

which is incorrect.  Fix this by changing isPossibleSelfRead to what was most
likely the intended behavior.

Historical note: the buggy code was added in https://reviews.llvm.org/rL120974
to address PR8728.

Reviewers: rsmith

Subscribers: mcrosier, llvm-commits, jlebar

Differential Revision: https://reviews.llvm.org/D43425

llvm-svn: 325641
2018-02-20 23:19:34 +00:00
Sanjay Patel 4f65e0d008 [InstCombine] auto-generate full checks; NFC
llvm-svn: 325639
2018-02-20 23:08:47 +00:00
Sanjay Patel 088f4690f5 [InstCombine] add test for vector -X/-Y; NFC
m_FNeg doesn't match vector types.

llvm-svn: 325637
2018-02-20 22:46:38 +00:00
Craig Topper 63dd97513b [X86] Fix copy/paste mistake in test.
The contents of the test case didnt' match the name of the test case. And they were identical to the test above.

llvm-svn: 325635
2018-02-20 22:33:23 +00:00
Benjamin Kramer 1516dd70bb Fix broken test from r325630.
llvm-svn: 325634
2018-02-20 22:30:16 +00:00
Lang Hames 919f15a1b4 [PBQP] Fix PR33038 by pruning empty intervals in initializeGraph.
Spilling may cause previously non-empty intervals (both for the spilled vreg
and others) to become empty. Moving the pruning into initializeGraph catches
these cases and fixes PR33038.

llvm-svn: 325632
2018-02-20 22:15:09 +00:00
Benjamin Kramer fd0630665b [MemoryBuiltins] Check nobuiltin status when identifying calls to free.
This is usually not a problem because this code's main purpose is
eliminating unused new/delete pairs. We got deletes of nullptr or
nobuiltin deletes of builtin new wrong though.

llvm-svn: 325630
2018-02-20 22:00:33 +00:00
Sanjay Patel 7365b44b85 [InstCombine] remove unneeded operand swap: NFCI
FMul is commutative, so complexity-based canonicalization should always 
take care of the swap via SimplifyAssociativeOrCommutative(). 

llvm-svn: 325628
2018-02-20 21:52:46 +00:00
Craig Topper 7fbea20b90 [SelectionDAG] Support known true/false SimplifySetCC cases for comparing against vector splats of constants.
This is split off from D42948 and includes just the cases that constant fold to true or false. It also includes some refactoring to keep predicate checks together.

This supports things like

(setcc uge X, 0) -> true

Differential Revision: https://reviews.llvm.org/D43489

llvm-svn: 325627
2018-02-20 21:48:14 +00:00
Sanjay Patel e29caaa9c5 [PatternMatch] enhance m_SignMask() to ignore undef elements in vectors
llvm-svn: 325623
2018-02-20 21:02:40 +00:00
Sanjay Patel ff7b777bbe [InstSimplify] add tests for m_SignMask with undef vector elements; NFC
llvm-svn: 325622
2018-02-20 20:53:35 +00:00
Evandro Menezes 72f3983633 [AArch64] Refactor instructions using SIMD immediates
Get rid of icky goto loops and make the code easier to maintain.  Otherwise,
NFC.

Restore r324903 and fix PR36369.

Differentail revision: https://reviews.llvm.org/D43364

llvm-svn: 325621
2018-02-20 20:31:45 +00:00
Teresa Johnson a344fd3db6 [LTO] Remove unused Path parameter to AddBufferFn
Summary:
With D43396, no clients use the Path parameter anymore.

Depends on D43396.

Reviewers: pcc

Subscribers: mehdi_amini, inglorion, llvm-commits

Differential Revision: https://reviews.llvm.org/D43400

llvm-svn: 325619
2018-02-20 20:21:53 +00:00
Teresa Johnson b145cca85e [ThinLTO/gold] Avoid race with cache pruner by copying to temp files
Summary:
This will avoid the race condition described in the review for D37993.

I believe that the Path parameter to AddBufferFn is no longer utilized.
I would prefer to remove that as a follow up clean up patch to reduce
the diffs in this patch.

Reviewers: pcc

Reviewed By: pcc

Subscribers: inglorion, llvm-commits

Differential Revision: https://reviews.llvm.org/D43396

llvm-svn: 325618
2018-02-20 19:51:30 +00:00
Alexey Bataev 42bcec7d38 [LV] Fix test checks, NFC.
llvm-svn: 325617
2018-02-20 19:49:25 +00:00
Sjoerd Meijer 4d5c40492a [ARM] Lower BR_CC for f16
This case wasn't handled yet.

Differential Revision: https://reviews.llvm.org/D43508

llvm-svn: 325616
2018-02-20 19:28:05 +00:00
Stanislav Mekhanoshin a3b6d95db4 [AMDGPU] Removed redundant run lines for fmuladd.f16 test. NFC.
llvm-svn: 325615
2018-02-20 19:19:56 +00:00
David Blaikie 0e5506838e [llvm-objdump] Use unique_ptr to simplify memory ownership
Followup to r325099/r325100 to simplify further.

llvm-svn: 325612
2018-02-20 18:48:51 +00:00
Simon Pilgrim 75853bf149 [X86][MMX] Regenerate MMX bitcast test
llvm-svn: 325611
2018-02-20 18:48:29 +00:00
Simon Pilgrim 2cf3769a7e [X86][3DNow] Regenerate intrinsics tests
llvm-svn: 325609
2018-02-20 18:44:21 +00:00
Sanjay Patel a604370004 [IRBuilder] fix CreateMaxNum to actually produce maxnum (PR36454)
The bug was introduced here:
https://reviews.llvm.org/rL296409
...but the patch doesn't use maxnum and nothing else in 
trunk has tried since then, so the bug went unnoticed.

llvm-svn: 325607
2018-02-20 18:21:43 +00:00
Krzysztof Parzyszek f9f2005f94 [Hexagon] Handle *Low8 register classes in early if-conversion
llvm-svn: 325606
2018-02-20 18:19:17 +00:00
Alexey Bataev 47dfd249f0 [SLP] Fix tests checks, NFC.
llvm-svn: 325605
2018-02-20 18:11:50 +00:00
Craig Topper df0c22fcd3 [X86] Correct SHRUNKBLEND creation to work correctly when there are multiple uses of the condition.
SimplifyDemandedBits forces the demanded mask to all 1s if the node has multiple uses, unless the AssumeSingleUse flag is set.

So previously we were only really likely to simplify something if the condition had a single use. And on the off chance we did simplify with multiple uses the demanded mask being used was all ones so there was no reason to create a shrunkblend.

This patch now checks that the condition is only used by selects first, and then sets the AssumeSingleUse flag for the simplifcation. Then we convert the selects to shrunkblend, and finally replace condition.

Differential Revision: https://reviews.llvm.org/D43446

llvm-svn: 325604
2018-02-20 17:58:17 +00:00
Craig Topper 35801fa5ce [SelectionDAG] Add LegalTypes flag to getShiftAmountTy. Use it to unify and simplify DAGCombiner and simplifySetCC code and fix a bug.
DAGCombiner and SimplifySetCC both use getPointerTy for shift amounts pre-legalization. DAGCombiner uses a single helper function to hide this. SimplifySetCC does it in multiple places.

This patch adds a defaulted parameter to getShiftAmountTy that can make it return getPointerTy for scalar types. Use this parameter to simplify the SimplifySetCC and DAGCombiner.

Additionally, there were two places in SimplifySetCC that were creating shifts using the target's preferred shift amount pre-legalization. If the target uses a narrow type and the type is illegal, this can cause SimplfiySetCC to create a shift with an amount that can't represent all possible shift values for the type. To fix this we should use pointer type there too.

Alternatively we could make getScalarShiftAmountTy for each target return a safe value for large types as proposed in D43445. And maybe we should still do that, but fixing the SimplifySetCC code keeps other targets from tripping over this in the future.

Fixes PR36250.

Differential Revision: https://reviews.llvm.org/D43449

llvm-svn: 325602
2018-02-20 17:41:05 +00:00
Craig Topper 010ae8dcbb [X86] Promote 16-bit cmovs to 32-bits
This allows us to avoid an opsize prefix. And forcing some move immediates to i32 avoids a length changing prefix on those instructions.

This mostly replaces the existing combine we had for zext/sext+cmov of constants. I left in a case for sign extending a 32 bit cmov of constants to 64 bits.

Differential Revision: https://reviews.llvm.org/D43327

llvm-svn: 325601
2018-02-20 17:41:00 +00:00
Jonas Devlieghere 563c901bac [dsymutil] Correctly handle DW_TAG_label
This patch contains logic for handling DW_TAG_label that's present in
darwin's dsymutil implementation, but not yet upstream.

Differential revision: https://reviews.llvm.org/D43438

llvm-svn: 325600
2018-02-20 17:34:29 +00:00
Mikhail Maltsev 581a7f0bef [vim] Recognize more FileCheck comments
Summary:
Currently vim syntax highlighting recognizes 'CHECK:' as a special
comment, but not CHECK-DAG, CHECK-NOT and other CHECKs. This patch
adds rules for these comments.

Reviewers: chandlerc, compnerd, rogfer01

Reviewed By: rogfer01

Subscribers: rogfer01, llvm-commits

Differential Revision: https://reviews.llvm.org/D43289

llvm-svn: 325599
2018-02-20 17:27:44 +00:00
Sanjay Patel 29b98ae337 [InstCombine] remove unneeded dyn_cast to prevent unused variable warning
llvm-svn: 325597
2018-02-20 17:14:53 +00:00
Sanjay Patel b2d978682b [InstCombine] remove compound fdiv pattern folds
These are fdiv-with-constant-divisor, so they already become
reciprocal multiplies. The last gap for vector ops should be
closed with rL325590.

It's possible that we're missing folds for some edge cases 
with denormal intermediate constants after deleting these,
but there are no tests for those patterns, and it would be 
better to handle denormals more consistently (and less 
conservatively) as noted in TODO comments.

llvm-svn: 325595
2018-02-20 16:52:17 +00:00
Sanjay Patel 90f4c8ec29 [InstCombine] fold fdiv with non-splat divisor to fmul: X/C --> X * (1/C)
llvm-svn: 325590
2018-02-20 16:08:15 +00:00
Simon Dardis d3860e6670 [mips] Correct the definition of cvt.d.w
An upcoming patch D41434, changes the ordering of the matcher table
for assembly. This patch corrects the definition of the normal MIPS
cvt.d.w not to be available in microMIPS.

llvm-svn: 325589
2018-02-20 15:55:17 +00:00
Alexey Bataev 0d6aeadc40 [DEBUGINFO] Add support for emission of the inlined strings.
Summary:
Patch adds an option for emission of inlined strings rather than
.debug_str section.

Reviewers: echristo, jlebar

Subscribers: eraman, llvm-commits, JDevlieghere

Differential Revision: https://reviews.llvm.org/D43390

llvm-svn: 325583
2018-02-20 15:28:08 +00:00
Lei Huang dfd41552f4 [PowerPC] Reduce stack frame for fastcc functions by only allocating parameter save area when needed
Current implementation always allocates the parameter save area conservatively
for fastcc functions. There is no reason to allocate the parameter save area if
all the parameters can be passed via registers.

Differential Revision: https://reviews.llvm.org/D42602

llvm-svn: 325581
2018-02-20 15:09:45 +00:00
Krzysztof Parzyszek b404fae9e3 [Hexagon] Fix alignment calculation of stack objects in Hexagon bit tracker
llvm-svn: 325580
2018-02-20 14:29:43 +00:00
Simon Pilgrim 61ba223704 [X86] Regenerate XOR tests
llvm-svn: 325579
2018-02-20 14:08:39 +00:00
Simon Pilgrim 2f29afb439 [VectorLegalizer] Fix uint64_t typo in ExpandUINT_TO_FLOAT (PR36391)
ExpandUINT_TO_FLOAT can accept vXi32 or vXi64 inputs, so we need to use a uint64_t shift to generate the 2^(BW/2) constant.

No test case unfortunately as no upstream target uses this, but its affecting a downstream target.

llvm-svn: 325578
2018-02-20 13:24:24 +00:00
David Green 056476497e [ARM] Mark -1 as cheap in xor's for thumb1
We can always convert xor %a, -1 into MVN, even in thumb 1 where the -1
would not otherwise be considered a cheap constant. This prevents the
-1's from being pulled out into constants and potentially hoisted.

Differential Revision: https://reviews.llvm.org/D43451

llvm-svn: 325573
2018-02-20 11:07:35 +00:00
George Rimar da4f43a4b4 [llvm-mc] - Produce R_X86_64_PLT32 for "call/jmp foo".
For instructions like call foo and jmp foo patch changes
relocation produced from R_X86_64_PC32 to R_X86_64_PLT32.
Relocation can be used as a marker for 32-bit PC-relative branches.
Linker will reduce PLT32 relocation to PC32 if function is defined locally.

Differential revision: https://reviews.llvm.org/D43383

llvm-svn: 325569
2018-02-20 10:17:57 +00:00
Tim Renouf 8234b4893a [AMDGPU] stop buffer_store being moved illegally
Summary:
The machine instruction scheduler was illegally moving a buffer store
past a buffer load with the same descriptor and offset. Fixed by marking
buffer ops as mayAlias and isAliased. This may be overly conservative,
and we may need to revisit.

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D43332

Change-Id: Iff3173d9e0653e830474546276ab9d30318b8ef7
llvm-svn: 325567
2018-02-20 10:03:38 +00:00
George Rimar 9712113f8b [MC] - Don't crash on unclosed frame.
llvm-mc can crash when
there is cfi_startproc without cfi_end_proc:

.text
.globl foo
foo:
 .cfi_startproc

Testcase shows the issue, patch fixes it.

Differential revision: https://reviews.llvm.org/D43456

llvm-svn: 325564
2018-02-20 09:04:13 +00:00
Gadi Haber 2cede2e229 [X86][CET]: Adding full coverage of MC encoding for the CET instructions.<NFC>
NFC.
Adding MC regressions tests to cover the CET instructions.
This patch is part of a larger task to cover MC encoding of all X86 isa sets started in revision: https://reviews.llvm.org/D39952

Reviewers: zvi, craig.topper, RKSimon, AndreiGrischenko, oren_ben_simhon
Differential Revision: https://reviews.llvm.org/D41329

Change-Id: I9c133d4ba07508ce8fd738a1230edd586e2c2f1b
llvm-svn: 325561
2018-02-20 08:00:31 +00:00
Craig Topper 9256ac1a58 [X86] Add 512-bit unmasked pmulhrsw/pmulhw/pmulhuw intrinsics. Remove and auto upgrade 128/256/512 bit masked pmulhrsw/pmulhw/pmulhuw intrinsics.
The 128 and 256 bit versions were already not used by clang. This adds an equivalent unmasked 512 bit version. Then autoupgrades all sizes to use unmasked intrinsics plus select.

llvm-svn: 325559
2018-02-20 07:28:14 +00:00
Craig Topper 8e31ef948c [X86] Remove GCCBuiltin from a bunch of intrinsics that aren't used by clang and should be removed.
llvm-svn: 325552
2018-02-20 05:49:22 +00:00
Serge Pavlov 76d8ccee2e Report fatal error in the case of out of memory
This is the second part of recommit of r325224. The previous part was
committed in r325426, which deals with C++ memory allocation. Solution
for C memory allocation involved functions `llvm::malloc` and similar.
This was a fragile solution because it caused ambiguity errors in some
cases. In this commit the new functions have names like `llvm::safe_malloc`.

The relevant part of original comment is below, updated for new function
names.

Analysis of fails in the case of out of memory errors can be tricky on
Windows. Such error emerges at the point where memory allocation function
fails, but manifests itself when null pointer is used. These two points
may be distant from each other. Besides, next runs may not exhibit
allocation error.

In some cases memory is allocated by a call to some of C allocation
functions, malloc, calloc and realloc. They are used for interoperability
with C code, when allocated object has variable size and when it is
necessary to avoid call of constructors. In many calls the result is not
checked for null pointer. To simplify checks, new functions are defined
in the namespace 'llvm': `safe_malloc`, `safe_calloc` and `safe_realloc`.
They behave as corresponding standard functions but produce fatal error if
allocation fails. This change replaces the standard functions like 'malloc'
in the cases when the result of the allocation function is not checked
for null pointer.

Finally, there are plain C code, that uses malloc and similar functions. If
the result is not checked, assert statement is added.

Differential Revision: https://reviews.llvm.org/D43010

llvm-svn: 325551
2018-02-20 05:41:26 +00:00
Amara Emerson db211892ed [AArch64][GlobalISel] When copying from a gpr32 to an fpr16 reg, convert to fpr32 first.
This is a follow on commit to r[x] where we fix the other direction of copy.
For this case, after converting the source from gpr32 -> fpr32, we use a
subregister copy, which is essentially what EXTRACT_SUBREG does in SDAG land.

https://reviews.llvm.org/D43444

llvm-svn: 325550
2018-02-20 05:11:57 +00:00
Craig Topper 41f64c3204 [X86] Mark XOP vpmac* and vpmadc intrinsics as being commutative so that tablegen will generate patterns with the load in operand 0.
This allows loads to be folded during isel without the peephole pass.

llvm-svn: 325548
2018-02-20 03:58:14 +00:00
Craig Topper a05ed17316 [X86] Make XOP VPCOM instructions commutable to fold loads during isel.
llvm-svn: 325547
2018-02-20 03:58:13 +00:00
Craig Topper 9b64bf54b9 [X86] Make a helper function for commuting AVX512 VPCMP immediates since we do it in two places.
llvm-svn: 325546
2018-02-20 03:58:11 +00:00
Aditya Nandakumar bab2d3e2b9 [GISel]: Add pattern matchers for G_BITCAST/PTRTOINT/INTTOPTR
Adds pattern matchers for the above along with unit tests for the same.
https://reviews.llvm.org/D43479

llvm-svn: 325542
2018-02-19 23:11:53 +00:00
Sanjay Patel 2816560b2c [InstCombine] use CreateWithCopiedFlags to reduce code; NFCI
Also, move the folds with constants closer to make it easier to follow. 

llvm-svn: 325541
2018-02-19 23:09:03 +00:00
Brian Gesiak d1eabb1810 Revert "[mem2reg] Use range loops (NFCI)"
This reverts commit r325532.

llvm-svn: 325539
2018-02-19 22:48:51 +00:00
Craig Topper b195ed8ce3 [X86] Use vpmovq2m/vpmovd2m for truncate to vXi1 when possible.
Previously we used vptestmd, but the scheduling data for SKX says vpmovq2m/vpmovd2m is lower latency. We already used vpmovb2m/vpmovw2m for byte/word truncates. So this is more consistent anyway.

llvm-svn: 325534
2018-02-19 22:07:31 +00:00
Sanjay Patel 1d14779aed [InstCombine] allow fdiv with constant dividend folds with less than full -ffast-math
It's possible that we could allow this either 'arcp' or 'reassoc' alone, but this
should be conservatively better than what we have right now. GCC allows this with
only -freciprocal-math.

The last test is changed to show a case that is expected to fold, but we need D43398.

llvm-svn: 325533
2018-02-19 21:46:52 +00:00
Brian Gesiak 49a9d1a4e6 [mem2reg] Use range loops (NFCI)
Summary:
Several for loops in PromoteMemoryToRegister.cpp leave their increment
expression empty, instead incrementing the iterator within the for loop
body. I believe this is because these loops were previously implemented
as while loops; see https://reviews.llvm.org/rL188327.

Incrementing the iterator within the body of the for loop instead of
in its increment expression makes it seem like the iterator will be
modified or conditionally incremented within the loop, but that is not
the case in these loops.

Instead, use range loops.

Test Plan: `check-llvm`

Reviewers: davide, bkramer

Reviewed By: davide, bkramer

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D43473

llvm-svn: 325532
2018-02-19 21:44:52 +00:00
Sanjay Patel e412954953 [InstCombine] refactor fdiv with constant dividend folds; NFC
The last fold that used to be here was not necessary. That's a 
combination of 2 folds (and there's a regression test to show that).

The transforms are guarded by isFast(), but that should be loosened.

llvm-svn: 325531
2018-02-19 21:17:58 +00:00
Sanjay Patel e82cc6fcc5 [InstCombine] move fdiv tests; NFC
Also, use vector constants just to prove that already works.

llvm-svn: 325530
2018-02-19 21:13:39 +00:00
Brian Gesiak 58434db098 [Coroutines] Move debug statement before assert
Summary:
Move a debug statement to above where an assertion is hit, so that the debug
statement can be inspected before a stack trace.

Test Plan: `check-llvm`

llvm-svn: 325529
2018-02-19 20:50:09 +00:00
Alexander Richardson 6c85992c6d [llvm-objcopy] Use the full filename in --add-gnu-debuglink
Summary:
The current implementation was writing the file name without the extension
whereas GNU objcopy writes the full filename. With this change GDB will now
load the .debug file instead of silently ignoring it.

Reviewers: jakehehrlich, jhenderson

Reviewed By: jakehehrlich

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D43474

llvm-svn: 325528
2018-02-19 19:53:44 +00:00
Craig Topper e60f1472f1 [X86] Stop swapping the operands of AVX512 setge.
We swapped the operands and used setle, but I don't see any reason to do that. I think this is a holdover from SSE where we swap and the invert to use pcmpgt. But with AVX512 we don't want an invert so we won't use pcmpgt. So there's no need to swap.

llvm-svn: 325527
2018-02-19 19:23:35 +00:00
Craig Topper 9471a7c898 [X86] Reduce the number of isel pattern variations needed for VPTESTM/VPTESTNM matching.
Canonicalize EQ/NE PCMPM to have build vector all zeros on the RHS so we don't have to pattern match it in both locations. This significantly reduces the number of isel patterns needed since we also had to multiply it out with loads being in either operand of the 'and' input node and in the 'and' masking node.

This removes over 24000 bytes from the isel table.

llvm-svn: 325526
2018-02-19 19:23:31 +00:00
Steven Wu 545d34a272 bitcode support change for fast flags compatibility
Summary: The discussion and as per need, each vendor needs a way to keep the old fast flags and the new fast flags in the auto upgrade path of the IR upgrader.  This revision addresses that issue.

Patched by Michael Berg

Reviewers: qcolombet, hans, steven_wu

Reviewed By: qcolombet, steven_wu

Subscribers: dexonsmith, vsk, mehdi_amini, andrewrk, MatzeB, wristow, spatel

Differential Revision: https://reviews.llvm.org/D43253

llvm-svn: 325525
2018-02-19 19:22:28 +00:00
Mark Searles 65207923f6 [AMDGPU] Make note of existing waitcnt instrs; this is add-on work related to suppression of redundant waitcnt instrs. It is necessary to make note of these existing waitcnt instrs so that we do not fall into an infinite loop when handling loops. Also, [NFC] some minor code clean-up.
llvm-svn: 325524
2018-02-19 19:19:59 +00:00
Simon Pilgrim 70eb508605 [SelectionDAG] ComputeKnownBits - add support for SMIN+SMAX clamp patterns
If we have a clamp pattern, SMIN(SMAX(X, LO),HI) or SMAX(SMIN(X, HI),LO) then we can deduce that the number of signbits (zeros/ones) will be at least the minimum of the LO and HI constants.

ComputeKnownBits equivalent of D43338.

Differential Revision: https://reviews.llvm.org/D43463

llvm-svn: 325521
2018-02-19 18:08:16 +00:00
Mark Searles 419bdab759 [AMDGPU] Increased vector length for global/constant loads.
Summary: GCN ISA supports instructions that can read 16 consecutive dwords from memory through the scalar data cache; loadstoreVectorizer should take advantage of the wider vector length and pack 16/8 elements of dwords/quadwords.

Author: FarhanaAleen

Reviewed By: rampitec

Subscribers: llvm-commits, AMDGPU

Differential Revision: https://reviews.llvm.org/D43275

llvm-svn: 325518
2018-02-19 16:42:49 +00:00
David Green bc35f069f4 [Dominators] Update DominatorTree compare in case roots are different
The compare function, unusually, returns false on same, true on
different. This fixes the conditions for different roots.

Reviewed as a part of D41298.

llvm-svn: 325517
2018-02-19 16:28:24 +00:00
Pavel Labath a7c457d288 [CodeGen] Refactor AppleAccelTable
Summary:
This commit separates the abstract accelerator table data structure
from the code for writing out an on-disk representation of a specific
accelerator table format. The idea is that former (now called
AccelTable<T>) can be reused for the DWARF v5 accelerator tables
as-is, without any further customizations.

Some bits of the emission code (now living in the EmissionContext class)
can be reused for DWARF v5 as well, but the subtle differences in the
layout of various subtables mean the sharing is not always possible.
(Also, the individual emit*** functions are fairly simple so there's a
tradeoff between making a bigger general-purpose function, and two
smaller targeted functions.)

Another advantage of this setup is that more of the serialization logic
can be hidden in the .cpp file -- I have moved declarations of the
header and all the emission functions there.

Reviewers: JDevlieghere, aprantl, probinson, dblaikie

Subscribers: echristo, clayborg, vleschuk, llvm-commits

Differential Revision: https://reviews.llvm.org/D43285

llvm-svn: 325516
2018-02-19 16:12:20 +00:00
Sanjay Patel 3e8a76abfd [TTI CostModel] change default cost of FP ops to 1 (PR36280)
This change was mentioned at least as far back as:
https://bugs.llvm.org/show_bug.cgi?id=26837#c26
...and I found a real program that is harmed by this: 
Himeno running on AMD Jaguar gets 6% slower with SLP vectorization:
https://bugs.llvm.org/show_bug.cgi?id=36280
...but the change here appears to solve that bug only accidentally.

The div/rem costs for x86 look very wrong in some cases, but that's already true, 
so we can fix those in follow-up patches. There's also evidence that more cost model
changes are needed to solve SLP problems as shown in D42981, but that's an independent 
problem (though the solution may be adjusted after this change is made).

Differential Revision: https://reviews.llvm.org/D43079

llvm-svn: 325515
2018-02-19 16:11:44 +00:00
Rafael Espindola c7e51805ff Bring back r323297.
It was reverted because it broke the grub build. The reason the grub
build broke is because grub does its own relocation processing and was
not handing R_386_PLT32. Since grub has no dynamic linker, the fix is
trivial: handle R_386_PLT32 exactly like R_386_PC32.

On the report it was noted that they are using
-fno-integrated-assembler. The upstream GAS (starting with
451875b4f976a527395e9303224c7881b65e12ed) will already be producing a
R_386_PLT32 anyway, so they have to update their code one way or the
other

Original message:

Don't assume a null GV is local for ELF and MachO.

This is already a simplification, and should help with avoiding a plt
reference when calling an intrinsic with -fno-plt.

With this change we return false for null GVs, so the caller only
needs to check the new metadata to decide if it should use foo@plt or
*foo@got.

llvm-svn: 325514
2018-02-19 16:02:38 +00:00
Francis Visoiu Mistrih 7f0f8bb4bd [CodeGen] Fix tests breaking after r325505
llvm-svn: 325512
2018-02-19 15:51:17 +00:00
Charles Saternos b040fcc693 [ThinLTO] Add GraphTraits for FunctionSummaries
Add GraphTraits definitions to the FunctionSummary and ModuleSummaryIndex classes. These GraphTraits will be used to construct find SCC's in ThinLTO analysis passes.

Third attempt - moved function from lambda to static function due to build failures.

llvm-svn: 325506
2018-02-19 15:14:50 +00:00
Francis Visoiu Mistrih 68ced40a23 Revert "[CodeGen] Move printing '\n' from MachineInstr::print to MachineBasicBlock::print"
This reverts commit r324681.

llvm-svn: 325505
2018-02-19 15:08:49 +00:00
Simon Pilgrim c302a581a0 [X86][SSE] combineTruncateWithSat - use truncateVectorWithPACK down to 64-bit subvectors
Add support for chaining PACKSS/PACKUS down to 64-bit vectors by using only a single 128-bit input.

llvm-svn: 325494
2018-02-19 13:29:20 +00:00
Ivan A. Kosarev f03f579d1d [Transforms] Propagate new-format TBAA tags on simplification of memory-transfer intrinsics
With this patch in place, when a new-format TBAA tag is available
for a memory-transfer intrinsic call, we prefer propagating that
new-format tag. Otherwise, we fallback to the old approach where
we try to construct a proper TBAA access tag from 'tbaa.struct'
metadata.

Differential Revision: https://reviews.llvm.org/D41543

llvm-svn: 325488
2018-02-19 12:10:20 +00:00
Igor Laevsky fd3a56e876 [llvm-opt-fuzzer] Add another pack of passes for continuous fuzzing
Differential Revision: https://reviews.llvm.org/D43384

llvm-svn: 325487
2018-02-19 11:57:07 +00:00
Dylan McKay 9a2a996c1c [AVR] Set the program address space in the data layout
This adds the program memory address space setting to the AVR data
layout.

This setting was very recently added under r325479.

At the moment, there are no uses of this setting. In the future, things
such as switch lookup tables should reside there.

llvm-svn: 325481
2018-02-19 10:40:59 +00:00
Dylan McKay ced2fe68f3 Add default address space for functions to the data layout (1/3)
Summary:
This adds initial support for letting targets specify which address
spaces their functions should reside in by default.

If a function is created by a frontend, it will get the default address space specified in the DataLayout, unless the frontend explicitly uses a more general `llvm::Function` constructor. Function address spaces will become a part of the bitcode and textual IR forms, as we do not have access to a data layout whilst parsing LL.

It will be possible to write IR that explicitly has `addrspace(n)` on a function. In this case, the function will reside in the specified space, ignoring the default in the DL.

This is the first step towards placing functions into the correct
address space for Harvard architectures.

Full patchset
* Add program address space to data layout D37052
* Require address space to be specified when creating functions D37054
* [clang] Require address space to be specified when creating functions D37057

Reviewers: pcc, arsenm, kparzysz, hfinkel, theraven

Reviewed By: theraven

Subscribers: arichardson, simoncook, rengolin, wdng, uabelho, bjope, asb, llvm-commits

Differential Revision: https://reviews.llvm.org/D37052

llvm-svn: 325479
2018-02-19 09:56:22 +00:00
Dylan McKay 05d3e41076 [AVR] Fix a lowering bug in AVRISelLowering.cpp
The parseFunctionArgs() method was directly reading the
arguments from a Function object, but is should have used the
arguments supplied by the SelectionDAGBuilder.

This was causing
the lowering code to only lower one argument, not two in some cases.

Thanks to @brainlag on GitHub for coming up with the working fix!

Patch-by: @brainlag on GitHub
llvm-svn: 325474
2018-02-19 08:28:38 +00:00
Eric Christopher 8fad26e5f3 Add LanaiMCTargetDesc.h to LanaiInstrInfo.h to make it self contained
with instruction enum definitions.

llvm-svn: 325473
2018-02-19 05:26:49 +00:00
Craig Topper 9cf812e1ed [X86] Correct a typo I made in combineToExtendCMOV recently.
We're accidentally checking that the same node is a constant twice instead of checking the other node.

This isn't a functional problem since we didn't do anything below that explicitly requires constants. It just means we may have introduced a sign_extend or zero_extend that won't fold out.

llvm-svn: 325469
2018-02-18 20:41:25 +00:00
Sanjay Patel adf6e88c74 [PatternMatch, InstSimplify] enhance m_AllOnes() to ignore undef elements in vectors
Loosening the matcher definition reveals a subtle bug in InstSimplify (we should not
assume that because an operand constant matches that it's safe to return it as a result).

So I'm making that change here too (that diff could be independent, but I'm not sure how 
to reveal it before the matcher change).

This also seems like a good reason to *not* include matchers that capture the value.
We don't want to encourage the potential misstep of propagating undef values when it's
not allowed/intended.

I didn't include the capture variant option here or in the related rL325437 (m_One), 
but it already exists for other constant matchers.

llvm-svn: 325466
2018-02-18 18:05:08 +00:00
Sanjay Patel 7faceaed31 [InstSimplify] add tests with vector undef elts; NFC
llvm-svn: 325465
2018-02-18 17:39:09 +00:00
Amara Emerson 242efdb54b Fix unused assertion variable warning.
llvm-svn: 325464
2018-02-18 17:28:34 +00:00
Amara Emerson 7e9f348b2d [AArch64][GlobalISel] Fix an assert fail/miscompile when fp16 types are copied
to gpr register banks.

PR36345.

rdar://36478867

Differential Revision: https://reviews.llvm.org/D43310

llvm-svn: 325463
2018-02-18 17:10:49 +00:00
Amara Emerson bc03baef77 [AArch64][GlobalISel] Support G_INSERT/G_EXTRACT of types < s32 bits.
These are needed for operations on fp16 types in a later patch.

llvm-svn: 325462
2018-02-18 17:03:02 +00:00
Sanjay Patel e8329735b6 [PatternMatch] reformatting and comment clean-ups; NFC
llvm-svn: 325461
2018-02-18 16:19:22 +00:00
Benjamin Kramer 92387a8744 [Support] Replace hand-written scope_exit with make_scope_exit.
No functionality change intended.

llvm-svn: 325460
2018-02-18 16:05:40 +00:00
Haicheng Wu aed6e52b3c [AArch64] Coalesce Copy Zero during instruction selection
Add special case for copy of zero to avoid a double copy.

Differential Revision: https://reviews.llvm.org/D36104

llvm-svn: 325459
2018-02-18 13:51:33 +00:00
Jonas Paulsson 891789c299 [BPF] Return true in enableMultipleCopyHints().
Enable multiple COPY hints to eliminate more COPYs during register allocation.

Note that this is something all targets should do, see
https://reviews.llvm.org/D38128.

Review: Yonghong Song
llvm-svn: 325457
2018-02-18 10:09:54 +00:00
Craig Topper 1040f236a3 [X86] Make masked pcmpeq commutable during isel so we can fold loads in other operand to the shorter encoding.
Previously we used the immediate encoding if the load was in operand 0 and the short encoding if the load was in operand 1.

This added an insane number of bytes to the size of the isel table. I'm wondering if we should always use the immediate form during isel and change to the short form during emission. This would remove the need to pattern match every combination for both the immediate form and the short form during isel. We could do the same with vpcmpgt

llvm-svn: 325456
2018-02-18 02:37:33 +00:00
Craig Topper b824050658 [X86] Add -show-mc-encoding to the avx512-vec-cmp.ll test and add test case to show that we're failing to use the shorter pcmpeq encoding when the memory arguemnt is the first argument.
This can't be spotted without showing the encodings since they have the same mnemonic.

llvm-svn: 325455
2018-02-18 02:37:32 +00:00
Simon Pilgrim 0efed32577 Revert: [llvm] r325448 - [ThinLTO] Add GraphTraits for FunctionSummaries
Add GraphTraits definitions to the FunctionSummary and ModuleSummaryIndex classes. These GraphTraits will be used to construct find SCC's in ThinLTO analysis passes.

Second attempt, since last patch caused stage2 build to fail (now using function_ref rather than std::function).

Reverted due to buildbot failures

llvm-svn: 325454
2018-02-18 00:01:36 +00:00
Simon Pilgrim 6740df386c Fix Wparentheses warning. NFCI
llvm-svn: 325451
2018-02-17 22:45:56 +00:00
Simon Pilgrim 7fae42eb27 [SelectionDAG] ComputeNumSignBits - add support for SMIN+SMAX clamp patterns
If we have a clamp pattern, SMIN(SMAX(X, LO),HI) or SMAX(SMIN(X, HI),LO) then we can deduce that the number of signbits will be at least the minimum of the LO and HI constants.

I haven't bothered with the UMIN/UMAX equivalent as (1) we don't have any current use cases and (2) I wonder if we'd be better off immediately falling back for ComputeKnownBits for UMIN/UMAX which already has optimization patterns useful for unsigned cases.

Differential Revision: https://reviews.llvm.org/D43338

llvm-svn: 325450
2018-02-17 22:19:50 +00:00
Simon Pilgrim 8da142bff1 [SelectionDAG] SimplifyDemandedVectorElts - add support for VECTOR_INSERT_ELT
Differential Revision: https://reviews.llvm.org/D43431

llvm-svn: 325449
2018-02-17 21:49:40 +00:00
Charles Saternos 35878ee7a4 [ThinLTO] Add GraphTraits for FunctionSummaries
Add GraphTraits definitions to the FunctionSummary and ModuleSummaryIndex classes. These GraphTraits will be used to construct find SCC's in ThinLTO analysis passes.

Second attempt, since last patch caused stage2 build to fail (now using function_ref rather than std::function).

llvm-svn: 325448
2018-02-17 21:39:24 +00:00
Simon Pilgrim 386b8ddd5f [MIPS][MSA] Convert vector integer min/max opcodes to use generic implementation
Found while investigating D43338

Simon^3 - the LLVM project needs more Simons.

Differential Revision: https://reviews.llvm.org/D43433

llvm-svn: 325447
2018-02-17 21:29:45 +00:00
Sjoerd Meijer c9bde5404a [ARM] Add LLVM tests for the vcvtr builtins
Follow up of Clang commit r325351; this adds the LLVM tests, which
were also missing.

Differential Revision: https://reviews.llvm.org/D43395

llvm-svn: 325443
2018-02-17 19:59:29 +00:00
Alex Bradbury 2cd14e16a6 [RISCV] Revert r324172 now r323991 was reverted
This fixes the build, now that r325421 was commited to revert r323991.

llvm-svn: 325441
2018-02-17 18:17:47 +00:00
Sander de Smalen d01cb72f7e Made test dbg_value_fastisel.ll specific to AArch64 fast-isel.
Some buildbots failed on this test (rL325438) because they don't
build all targets. I set the triple to aarch64 and moved the test
to test/CodeGen/AArch64/fast-isel-dbg-value.ll.

llvm-svn: 325440
2018-02-17 17:43:24 +00:00
Craig Topper 8d02be3bf3 [X86] Add 'sahf' to getHostCPUFeatures so -march=native will pick it up correctly.
Summary: We probably mostly get this right due to family/model/stepping mapping to CPU names. But we should detect it explicitly.

Reviewers: RKSimon, echristo, dim, spatel

Reviewed By: dim

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D43418

llvm-svn: 325439
2018-02-17 16:52:49 +00:00
Sander de Smalen 47952b0c03 [DebugInfo][FastISel] Fix dropping dbg.value()
Summary:
https://llvm.org/PR36263 shows that when compiling at -O0 a dbg.value()
instruction (that remains from an original dbg.declare()) is dropped
by FastISel. Since FastISel selects instructions by iterating a basic
block backwards, it drops the dbg.value if one of its operands is not
yet instantiated by a previously selected instruction.

Instead of calling 'lookUpRegForValue()' we can call 'getRegForValue()'
instead that will insert a placeholder for the operand to be filled in
when continuing the instruction selection.

Reviewers: aprantl, dblaikie, probinson

Reviewed By: aprantl

Subscribers: llvm-commits, dstenb, JDevlieghere

Differential Revision: https://reviews.llvm.org/D43386

llvm-svn: 325438
2018-02-17 16:42:54 +00:00
Sanjay Patel f569578373 [PatternMatch] enhance m_One() to ignore undef elements in vectors
llvm-svn: 325437
2018-02-17 16:00:42 +00:00
Sanjay Patel a6a1426cf1 [InstSimplify, InstCombine] add tests with vector undef elts; NFC
These would fold if the m_One pattern matcher accounted for undef elts.

llvm-svn: 325436
2018-02-17 15:55:40 +00:00
Simon Pilgrim dbcbaee7fd [X86][3DNow!] Add PFRCP reg-reg disassembler test case (PR21168)
llvm-svn: 325435
2018-02-17 14:58:16 +00:00
Sanjay Patel ac3952052b [InstSimplify] move select undef cond fold with other constant cond folds; NFCI
llvm-svn: 325434
2018-02-17 14:50:13 +00:00
Martin Storsjo a63a5b993e [AArch64] Implement dynamic stack probing for windows
This makes sure that alloca() function calls properly probe the
stack as needed.

Differential Revision: https://reviews.llvm.org/D42356

llvm-svn: 325433
2018-02-17 14:26:32 +00:00
Simon Pilgrim 63db669013 Fix unused variable warning. NFCI.
We were casting to AArch64InstrInfo but only using it for static methods which some compilers complain about.

llvm-svn: 325432
2018-02-17 13:48:23 +00:00
Jonas Devlieghere 7d4a974d8b [dwarfdump] Fix spurious verification errors for DW_AT_location attributes
Verifying any DWARF file that is optimized and contains at least one tag
with a DW_AT_location with a location list offset as a
DW_AT_form_dataXXX results in dwarfdump spuriously claiming that the
location list is invalid.

Differential revision: https://reviews.llvm.org/D40199

llvm-svn: 325430
2018-02-17 13:06:37 +00:00
Simon Pilgrim d6beac3b76 [DAGCombiner] Remove simplifyShuffleMask - now handled more generally by SimplifyDemandedVectorElts.
llvm-svn: 325429
2018-02-17 12:36:56 +00:00
Simon Pilgrim e4d40f9b7d Fix signed/unsigned comparison warning in AsmGenMatcher generated code. NFCI.
llvm-svn: 325428
2018-02-17 12:29:47 +00:00
Sander de Smalen bf83be9e2a [DebugInfo] Removed assert on missing CountVarDIE
Summary:
The assert for a DISubrange's CountVarDIE to be available fails
when the dbg.value() has been optimized away for any reason.
Having the assert for that is a little heavy, so instead removing
it now in favor of not generating the 'count' expression.

Addresses http://llvm.org/PR36263 .

Reviewers: aprantl, dblaikie, probinson

Reviewed By: aprantl

Subscribers: JDevlieghere, llvm-commits, dstenb

Differential Revision: https://reviews.llvm.org/D43387

llvm-svn: 325427
2018-02-17 11:06:53 +00:00
Serge Pavlov d48042efa8 Report fatal error in the case of out of memory
This is partial recommit of r325224, reverted in 325227. The relevant
part of original comment is below.

Analysis of fails in the case of out of memory errors can be tricky on
Windows. Such error emerges at the point where memory allocation function
fails, but manifests itself when null pointer is used. These two points
may be distant from each other. Besides, next runs may not exhibit
allocation error.

Usual programming practice does not require checking result of 'operator
new' because it throws 'std::bad_alloc' in the case of allocation error.
However, LLVM is usually built with exceptions turned off, so 'new' can
return null pointer. This change installs custom new handler, which causes
fatal error in the case of out of memory. The handler is installed
automatically prior to call to 'main' during construction of a static
object defined in 'lib/Support/ErrorHandling.cpp'. If the application does
not use this file, the handler may be installed manually by a call to
'llvm::install_out_of_memory_new_handler', declared in
'include/llvm/Support/ErrorHandling.h".

Differential Revision: https://reviews.llvm.org/D43010

llvm-svn: 325426
2018-02-17 10:21:33 +00:00