Commit Graph

180122 Commits

Author SHA1 Message Date
Jim Ingham 6d8873f94b Probably should initialize that new ivar while I'm at it...
llvm-svn: 214941
2014-08-06 00:24:38 +00:00
Quentin Colombet 33ea1681ce [X86][SchedModel] Fixed some wrong scheduling model found by code inspection.
Source: Agner Fog's Instruction tables.

Related to <rdar://problem/15607571>

llvm-svn: 214940
2014-08-06 00:22:39 +00:00
David Blaikie fb0412f039 DebugInfo: Assert that any CU for which debug_loc lists are emitted, has at least one range.
This was coming in weird debug info that had variables (and hence
debug_locs) but was in GMLT mode (because it was missing the 13th field
of the compile_unit metadata) so no ranges were constructed. We should
always have at least one range for any CU with a debug_loc in it -
because the range should cover the debug_loc.

The assertion just ensures that the "!= 1" range case inside the
subsequent loop doesn't get entered for the case where there are no
ranges at all, which should never reach here in the first place.

llvm-svn: 214939
2014-08-06 00:21:25 +00:00
Jim Ingham 3b652621a9 Add a variant of the CommandOverrideCallback that takes a
CommandReturnObject.  Otherwise, all the overridden command
can do is say it overrode the command, not say what it did...

Also removed the duplicate definition of CommandOverrideCallback
from the private interfaces.

Now to figure out how to get this through the SB API's...

<rdar://problem/17911629>

llvm-svn: 214938
2014-08-06 00:10:12 +00:00
David Blaikie cabf54a313 DebugInfo: Fix a bunch of tests that, owing to their compile_unit metadata not including a 13th field, had some subtle behavior.
Without the 13th field, the "emission kind" field defaults to 0 (which
is not equal to either of the values of the emission kind enum (1 ==
full debug info, 2 == line tables only)).

In this particular instance, the comparison with "FullDebugInfo" was
done when adding elements to the ranges list - so for these test cases
no values were added to the ranges list.

This got weirder when emitting debug_loc entries as the addresses should
be relative to the range of the CU if the CU has only one range (the
reasonable assumption is that if we're emitting debug_loc lists for a CU
that CU has at least one range - but due to the above situation, it has
zero) so the ranges were emitted relative to the start of the section
rather than relative to the start of the CU's singular range.

Fix these tests by accounting for the difference in the description of
debug_loc entries (in some cases making the test ignorant to these
differences, in others adding the extra label difference expression,
etc) or the presence/absence of high/low_pc on the CU, and add the 13th
field to their CUs to enable proper "full debug info" emission here.

In a future commit I'll fix up a bunch of other test cases that are not
so rigorously depending on this behavior, but still doing similarly
weird things due to the missing 13th field.

llvm-svn: 214937
2014-08-05 23:57:31 +00:00
Matt Arsenault 1070511847 R600/SI: Add definitions for ds_read2st64_ / ds_write2st64_
llvm-svn: 214936
2014-08-05 23:53:20 +00:00
Rui Ueyama cfea160681 Remove trailing whitespaces
llvm-svn: 214935
2014-08-05 23:43:21 +00:00
JF Bastien ac8b66b32c Fix typos in comments and doc
Committing http://reviews.llvm.org/D4798 for Robin Morisset (morisset@google.com)

llvm-svn: 214934
2014-08-05 23:27:34 +00:00
David Blaikie e1a26a624d DebugInfo: Move the reference to the CU from the location list entry to the list itself, since it is constant across an entire list.
This simplifies construction and usage while making the data structure
smaller. It was a holdover from the days when we didn't have a separate
DebugLocList and all we had was a flat list of DebugLocEntries.

llvm-svn: 214933
2014-08-05 23:14:16 +00:00
David Majnemer 57fbc0c35f MS ABI: Mangle empty type parameter packs compatibly
The MS mangling scheme apparently has separate manglings for type and
non-type parameter packs when they are empty.  Match template arguments
with parameters during mangling; check the parameter to see if it was
destined to hold type-ish things or nontype-ish things.

Differential Revision: http://reviews.llvm.org/D4792

llvm-svn: 214932
2014-08-05 22:43:45 +00:00
Reid Kleckner 74a6816b33 Fix Driver tests that I broke on Windows in r214924
llvm-svn: 214931
2014-08-05 22:39:07 +00:00
Eli Bendersky d28bc5e2f2 Expose the name mangling C API to Python bindings.
llvm-svn: 214930
2014-08-05 22:27:50 +00:00
Rafael Espindola b8141d55b9 Remove a virtual function from TargetMachine. NFC.
llvm-svn: 214929
2014-08-05 22:10:21 +00:00
Jonathan Roelofs ef84bda531 Re-apply r214881: Fix return sequence on armv4 thumb
This reverts r214893, re-applying r214881 with the test case relaxed a bit to
satiate the build bots.

POP on armv4t cannot be used to change thumb state (unilke later non-m-class
architectures), therefore we need a different return sequence that uses 'bx'
instead:

  POP {r3}
  ADD sp, #offset
  BX r3

This patch also fixes an issue where the return value in r3 would get clobbered
for functions that return 128 bits of data. In that case, we generate this
sequence instead:

  MOV ip, r3
  POP {r3}
  ADD sp, #offset
  MOV lr, r3
  MOV r3, ip
  BX lr

http://reviews.llvm.org/D4748

llvm-svn: 214928
2014-08-05 21:32:21 +00:00
Lang Hames ae17268a7e [MCJIT] Make llvm-rtdyld check RuntimeDyld's error state when running in -verify
mode.

This will cause -verify mode to report failure when RuntimeDyld encounters an
internal error (e.g. overflows in relocation computations). Previously we had
let these errors slip past unreported.

llvm-svn: 214925
2014-08-05 20:51:46 +00:00
Reid Kleckner 822434da9f Make crash diagnostics on Windows the tiniest bit more useful
This escapes any backslashes in the executable path and fixes an issue
with a trailing quote when the main file name had to be quoted during
printing.

It's impossible to test this without putting backslashes or quotes into
the executable path, so I didn't add automated tests.

The crash diagnostics are still only useful if you're using bash on
Windows, though.  This should probably be writing a batch file instead.

llvm-svn: 214924
2014-08-05 20:49:12 +00:00
Bill Schmidt 42a6936c78 [PowerPC] Swap arguments and adjust shift count for vsldoi on little endian
Commits r213915 and r214718 fix recognition of shuffle masks for vmrg*
and vpku*um instructions for a little-endian target, by swapping the
input arguments.  The vsldoi instruction requires similar treatment,
and also needs its shift count adjusted for little endian.

Reviewed by Ulrich Weigand.

This is a bug fix candidate for release 3.5 (and hopefully the last of
those for PowerPC).

llvm-svn: 214923
2014-08-05 20:47:25 +00:00
Ed Maste 6e496338e6 Force trace on system() failure on FreeBSD while tracking down buildbot issues
llvm-svn: 214922
2014-08-05 20:33:17 +00:00
Sanjay Patel 1954f2e924 Improved test cases that were added with r214892.
1. Added ':' to CHECK-LABELs
2. Added more CHECKs
3. Added CHECK-NEXTs
4. Added verbose hex immediate comments to CHECKs

llvm-svn: 214921
2014-08-05 20:16:35 +00:00
Rafael Espindola f9e52cf015 Don't internalize all but main by default.
This is mostly a cleanup, but it changes a fairly old behavior.

Every "real" LTO user was already disabling the silly internalize pass
and creating the internalize pass itself. The difference with this
patch is for "opt -std-link-opts" and the C api.

Now to get a usable behavior out of opt one doesn't need the funny
looking command line:

opt -internalize -disable-internalize -internalize-public-api-list=foo,bar -std-link-opts

llvm-svn: 214919
2014-08-05 20:10:38 +00:00
Rafael Espindola c03b6e7880 Add a test showing the interaction of linker scripts and plugin.
In particular, the linker script is processed early enough for function g
to be internalized.

llvm-svn: 214916
2014-08-05 19:56:53 +00:00
Chandler Carruth a746239be3 [x86] Fix a crasher due to shuffles which cancel each other out and add
a test case.

We also miscompile this test case which is showing a serious flaw in the
single-input v8i16 shuffle code. I've left the specific instruction
checks FIXME-ed out until I can address the bug in the single-input
code, but I wanted to separate out a significant functionality change to
produce correct code from a very simple and targeted crasher fix.

The miscompile problem stems from keeping track of inputs by value
rather than by index. As a consequence of doing this, we can't reliably
update those inputs because they might swap and we can't detect this
without copying the mask.

The blend code now uses indices for the input lists and this seems
strictly better. It also should make it easier to sort things and do
other cleanups. I think the time has come to simplify The Great Lambda
here.

llvm-svn: 214914
2014-08-05 18:45:49 +00:00
Dmitry Vyukov 70db9d4d72 tsan: allocate vector clocks using slab allocator
Vector clocks is the most actively allocated object in tsan runtime.
Current internal allocator is not scalable enough to handle allocation
of clocks in scalable way (too small caches). This changes transforms
clocks to 2-level array with 512-byte blocks. Since all blocks are of
the same size, it's possible to cache them more efficiently in per-thread caches.

llvm-svn: 214912
2014-08-05 18:45:02 +00:00
Fariborz Jahanian bcd82afad6 Introduce f[no-]max-unknown-pointer-align=[number] option
to instruct the code generator to not enforce a higher alignment 
than the given number (of bytes) when accessing memory via an opaque 
pointer or reference. Patch reviewed by John McCall (with post-commit
review pending). rdar://16254558

llvm-svn: 214911
2014-08-05 18:37:48 +00:00
Anton Yartsev 4e4cb6bc30 [Analyzer] fix for PR19102
Newly-created unconsumed instance is now assumed escaped if an invoked constructor has an argument of a pointer-to-record type.

llvm-svn: 214909
2014-08-05 18:26:05 +00:00
Duncan P. N. Exon Smith 6a6e9cb50c Remove dead code in condition
Whether or not it's appropriate, labels have been first-class types
since r51511.

llvm-svn: 214908
2014-08-05 18:22:58 +00:00
Arthur Marble 05b0798916 Added f and m flags to be ignored. These will not display a warning. The revision
for this patch is here: http://reviews.llvm.org/D4570. This will help with the
rebuild of Debian with clang. Here is a link to the errors that Debian is
experiencing: http://clang.debian.net/status.php?version=3.4.2&key=UNKNOWN_ARG

llvm-svn: 214907
2014-08-05 18:21:20 +00:00
Arthur Marble 731f6d380f Added flags that should be ignored for compatibility. These flags will display
a warning. Revision for this patch is here: http://reviews.llvm.org/D4565. This
patch will help with the rebuild of Debian with clang and many other projects
that wish to use clang. Here is a link to the errors that Debian is experiencing:
http://clang.debian.net/status.php?version=3.4.2&key=UNKNOWN_ARG

llvm-svn: 214906
2014-08-05 18:13:48 +00:00
NAKAMURA Takumi ca562297d9 X86CodeEmitter.cpp: Add SEH_Epilogue to ignored list for legacy JIT, corresponding to r214775.
llvm-svn: 214905
2014-08-05 18:04:15 +00:00
Chad Rosier 0a84f17882 [PR19983] SBPO_Always not covering all the cases.
Patch by "Roman Kashitsyn" <romankashicin@gmail.com>.
Phabricator revision: http://reviews.llvm.org/D4788

llvm-svn: 214904
2014-08-05 17:58:54 +00:00
Adam Nemet c04f3f9f73 [X86] Improve comments for r214888
A rebase somehow ate my comments. This restores them.

llvm-svn: 214903
2014-08-05 17:58:49 +00:00
Matt Arsenault 6532520fbf R600/SI: Use register class instead of list of registers
I'm not sure if this has any consequence or not.

llvm-svn: 214902
2014-08-05 17:52:40 +00:00
Matt Arsenault 2549bb4b83 R600/SI: Add exec_lo and exec_hi subregisters.
This allows accessing an SReg subregister with a normal subregister
index, instead of getting a machine verifier error.

Also be sure to include all of these subregisters in SReg_32.
This fixes inferring SGPR instead of SReg when finding a
super register class.

llvm-svn: 214901
2014-08-05 17:52:37 +00:00
Ed Maste 2efa42c937 On FreeBSD skip test that produces bogus output
The test produces lines that start with "<word>: " which confuses the
buildbot log parser.  Disable the test until either the test is fixed
or the buildbot can deal with the undesired output.

llvm.org/pr20545

llvm-svn: 214900
2014-08-05 17:50:04 +00:00
Duncan P. N. Exon Smith 5a511b59c5 BitcodeReader: Fix non-determinism in use-list order
`BasicBlockFwdRefs` (and `BlockAddrFwdRefs` before it) was being emptied
in a non-deterministic order.  When predicting use-list order I've
worked around this another way, but even when parsing lazily (and we
can't recreate use-list order) use-lists should be deterministic.

Make them so by using a side-queue of functions with forward-referenced
blocks that gets visited in order.

llvm-svn: 214899
2014-08-05 17:49:48 +00:00
Philip Reames 00c9b6461f Remove dead zero store to calloc initialized memory
Optimize the following IR:

%1 = tail call noalias i8* @calloc(i64 1, i64 4)
%2 = bitcast i8* %1 to i32*
; This store is dead and should be removed
store i32 0, i32* %2, align 4

Memory returned by calloc is guaranteed to be zero initialized. If the value being stored is the constant zero (and the store is not otherwise observable across threads), we can delete the store.  If the store is to an out of bounds address, it is undefined and thus also removable.

Reviewed By: nicholas

Differential Revision: http://reviews.llvm.org/D3942

llvm-svn: 214897
2014-08-05 17:48:20 +00:00
Jonathan Roelofs 064eb5a177 Revert r214881 because it broke lots of build-bots
llvm-svn: 214893
2014-08-05 17:36:05 +00:00
Sanjay Patel 8e5beb6edb Optimize vector fabs of bitcasted constant integer values.
Allow vector fabs operations on bitcasted constant integer values to be optimized
in the same way that we already optimize scalar fabs.

So for code like this:
%bitcast = bitcast i64 18446744069414584320 to <2 x float> ; 0xFFFF_FFFF_0000_0000
%fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %bitcast)
%ret = bitcast <2 x float> %fabs to i64

Instead of generating something like this:

movabsq (constant pool loadi of mask for sign bits)
vmovq   (move from integer register to vector/fp register)
vandps  (mask off sign bits)
vmovq   (move vector/fp register back to integer return register)

We should generate:

mov     (put constant value in return register)

I have also removed a redundant clause in the first 'if' statement:
N0.getOperand(0).getValueType().isInteger()

is the same thing as:
IntVT.isInteger()

Testcases for x86 and ARM added to existing files that deal with vector fabs.
One existing testcase for x86 removed because it is no longer ideal.

For more background, please see:
http://reviews.llvm.org/D4770

And:
http://llvm.org/bugs/show_bug.cgi?id=20354

Differential Revision: http://reviews.llvm.org/D4785

llvm-svn: 214892
2014-08-05 17:35:22 +00:00
Adam Nemet 5bf7baa938 [AVX512] Add intrinsic for valignd/q
Note that similar to palingr, we could further optimize these to emit
shufflevector when the shift count is <=64.  This however does not
change the overall design that unlike palignr we would still need the LLVM
intrinsic corresponding to this intruction to handle the >64 cases.  (palignr
uses the psrldq intrinsic in this case.)

llvm-svn: 214891
2014-08-05 17:28:23 +00:00
Adam Nemet fd2161b710 [AVX512] Add masking variant and intrinsics for valignd/q
This is similar to what I did with the two-source permutation recently.  (It's
almost too similar so that we should consider generating the masking variants
with some tablegen help.)

Both encoding and intrinsic tests are added as well.  For the latter, this is
what the IR that the intrinsic test on the clang side generates.

Part of <rdar://problem/17688758>

llvm-svn: 214890
2014-08-05 17:23:04 +00:00
Adam Nemet 4688a2e5cb [X86] Increase X86_MAX_OPERANDS from 5 to 6
This controls the number of operands in the disassembler's x86OperandSets
table.  The entries describe how the operand is encoded and its type.

Not to surprisingly 5 operands is insufficient for AVX512.  Consider
VALIGNDrrik in the next patch.  These are its operand specifiers:

  { /* 328 */
    { ENCODING_DUP, TYPE_DUP1 },
    { ENCODING_REG, TYPE_XMM512 },
    { ENCODING_WRITEMASK, TYPE_VK8 },
    { ENCODING_VVVV, TYPE_XMM512 },
    { ENCODING_RM_CD64, TYPE_XMM512 },
    { ENCODING_IB, TYPE_IMM8 },
  },

llvm-svn: 214889
2014-08-05 17:23:01 +00:00
Adam Nemet 164b07fbfe [X86] Add lowering to VALIGN
This was currently part of lowering to PALIGNR with some special-casing to
make interlane shifting work.  Since AVX512F has interlane alignr (valignd/q)
and AVX512BW has vpalignr we need to support both of these *at the same time*,
e.g. for SKX.

This patch breaks out the common code and then add support to check both of
these lowering options from LowerVECTOR_SHUFFLE.

I also added some FIXMEs where I think the AVX512BW and AVX512VL additions
should probably go.

llvm-svn: 214888
2014-08-05 17:22:59 +00:00
Adam Nemet 2f10cc699d [X86] Separate DAG node for valign and palignr
They have different semantics (valign is interlane while palingr is intralane)
and palingr is still needed even in the AVX512 context.  According to the
latest spec AVX512BW provides these.

llvm-svn: 214887
2014-08-05 17:22:55 +00:00
Adam Nemet d00a05e3e2 [AVX512] alignr: Use suffix rather than name argument to multiclass
Again no functional change.  This prepares for the suffix to be used with the
intrinsic matching.

llvm-svn: 214886
2014-08-05 17:22:52 +00:00
Adam Nemet f92139dd61 [AVX512] Pull everything alignr-related into the multiclass
The packed integer pattern becomes the DAG pattern for rri and the packed
float, another Pat<> inside the multiclass.

No functional change.

llvm-svn: 214885
2014-08-05 17:22:50 +00:00
Adam Nemet 1c752d8f5e Wrap long lines
llvm-svn: 214884
2014-08-05 17:22:47 +00:00
Hans Wennborg da312809d4 ReleaseNotes: try to fix links
llvm-svn: 214883
2014-08-05 17:19:14 +00:00
Hans Wennborg 458fb14407 ReleaseNotes: mention basic debug info and ASan support in the Windows blurb
llvm-svn: 214882
2014-08-05 17:15:00 +00:00
Jonathan Roelofs f5fad3767b Fix return sequence on armv4 thumb
POP on armv4t cannot be used to change thumb state (unilke later non-m-class
architectures), therefore we need a different return sequence that uses 'bx'
instead:

  POP {r3}
  ADD sp, #offset
  BX r3

This patch also fixes an issue where the return value in r3 would get clobbered
for functions that return 128 bits of data. In that case, we generate this
sequence instead:

  MOV ip, r3
  POP {r3}
  ADD sp, #offset
  MOV lr, r3
  MOV r3, ip
  BX lr

http://reviews.llvm.org/D4748

llvm-svn: 214881
2014-08-05 17:13:17 +00:00
David Blaikie b706b58e78 Partially revert r214761 that asserted that all concrete debug info variables had DIEs, due to a failure on Darwin.
I'll work on a reduction and fix after this.

llvm-svn: 214880
2014-08-05 16:47:23 +00:00