49cce257ae
Replace the dynamically computed std::set lookup method for subregisters with a hashtable-based
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version that is computed by tblgen at the time LLVM is compiled.
llvm-svn: 52945
2008-07-01 00:18:52 +00:00
5447e4331b
Eliminate TargetRegisterDesc::ImmSubRegs. It's no longer in use.
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llvm-svn: 52892
2008-06-30 07:32:56 +00:00
a2de8eab61
Fixes the last x86-64 test failure in compat.exp:
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<16 x float> is 64-byte aligned (for some reason),
which gets us into the stack realignment code. The
computation changing FP-relative offsets to SP-relative
was broken, assiging a spill temp to a location
also used for parameter passing. This
fixes it by rounding up the stack frame to a multiple
of the largest alignment (I concluded it wasn't fixable
without doing this, but I'm not very sure.)
llvm-svn: 52750
2008-06-26 01:51:13 +00:00
13237ac3b9
Wrap MVT::ValueType in a struct to get type safety
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and better control the abstraction. Rename the type
to MVT. To update out-of-tree patches, the main
thing to do is to rename MVT::ValueType to MVT, and
rewrite expressions like MVT::getSizeInBits(VT) in
the form VT.getSizeInBits(). Use VT.getSimpleVT()
to extract a MVT::SimpleValueType for use in switch
statements (you will get an assert failure if VT is
an extended value type - these shouldn't exist after
type legalization).
This results in a small speedup of codegen and no
new testsuite failures (x86-64 linux).
llvm-svn: 52044
2008-06-06 12:08:01 +00:00
c6a47e8a79
VisualStudio project files updated. #include <algorithm> added to make VisualStudio happy. Also had to undefine setjmp because of #include <csetjmp> turning setjmp into _setjmp in VisualStudio.
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llvm-svn: 49743
2008-04-15 21:27:11 +00:00
ba7126064a
Sort sub-registers and super-registers lists according to super-sub register relations. e.g. X86::RAX sub-register list is EAX, AX, AL, AH (order of last two are not guaranteed).
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llvm-svn: 49714
2008-04-15 07:56:03 +00:00
c60c67fc37
Add explicit keywords.
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llvm-svn: 48801
2008-03-25 22:06:05 +00:00
6aa4f515bb
emit an ID # for each regclass ID. Chris doesn't like to have to count.
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llvm-svn: 48200
2008-03-11 00:00:23 +00:00
d7a258d325
Rename PrintableName to Name.
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llvm-svn: 47629
2008-02-26 21:47:57 +00:00
c24ea4fb41
Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool
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would have been a Godsend here!
llvm-svn: 47625
2008-02-26 21:11:01 +00:00
a7d1ed4c98
Some platforms use the same name for 32-bit and 64-bit registers (like
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%r3 on PPC) in their ASM files. However, it's hard for humans to read
during debugging. Adding a new field to the register data that lets you
specify a different name to be printed than the one that goes into the
ASM file -- %x3 instead of %r3, for instance.
llvm-svn: 47534
2008-02-24 00:56:13 +00:00
3a4be0fdef
Rename MRegisterInfo to TargetRegisterInfo.
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llvm-svn: 46930
2008-02-10 18:45:23 +00:00
8cab021ca2
change getQualifiedName to be a global function.
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Split the pattern parsing code out from the dag isel emitter into it's own file.
No functionality change.
llvm-svn: 45632
2008-01-05 22:25:12 +00:00
8adcd9f32e
remove attributions from utils.
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llvm-svn: 45419
2007-12-29 20:37:13 +00:00
7a7085f6d3
Add parameter to getDwarfRegNum to permit targets
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to use different mappings for EH and debug info;
no functional change yet.
Fix warning in X86CodeEmitter.
llvm-svn: 44056
2007-11-13 19:13:01 +00:00
55f4e5d2dd
Fix on 64-bit machines.
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llvm-svn: 44001
2007-11-12 00:56:04 +00:00
4edfea438a
Use TableGen to emit information for dwarf register numbers.
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This makes DwarfRegNum to accept list of numbers instead.
Added three different "flavours", but only slightly tested on x86-32/linux.
Please check another subtargets if possible,
llvm-svn: 43997
2007-11-11 19:50:10 +00:00
fbe69d2cd6
Interchange Dwarf numbers of ESP and EBP on x86 Darwin.
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Much improvement in exception handling.
llvm-svn: 43794
2007-11-07 00:25:05 +00:00
f73fb6261b
Add CopyCost to TargetRegisterClass. This specifies the cost of copying a value
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between two registers in the specific class.
llvm-svn: 42123
2007-09-19 01:35:01 +00:00
7132e00de7
This is the patch to provide clean intrinsic function overloading support in LLVM. It cleans up the intrinsic definitions and generally smooths the process for more complicated intrinsic writing. It will be used by the upcoming atomic intrinsics as well as vector and float intrinsics in the future.
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This also changes the syntax for llvm.bswap, llvm.part.set, llvm.part.select, and llvm.ct* intrinsics. They are automatically upgraded by both the LLVM ASM reader and the bitcode reader. The test cases have been updated, with special tests added to ensure the automatic upgrading is supported.
llvm-svn: 40807
2007-08-04 01:51:18 +00:00
1a39a2d13d
VStudio compiler errors and placing Function*->ExFunc map under ManagedStatic control.
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This commit fixes two things. One is a pair of VStudio compiler errors stemming from variables
which defined within the for loop statement and also within the body of the for loop. I fixed these
by renaming one of the two variables. Additionally, I've made the Function*->ExFunc map in
ExternalFunctions.cpp a ManagedStatic object, so that cleanup will be done on llvm_shutdown. In repeated
uses of the interpreter, where the same Function* address may get used for completely differnet functions,
this was causing a crash.
llvm-svn: 40558
2007-07-27 18:26:35 +00:00
2f3becc49c
Have register info provide the inverse mapping of register->superregisters. PR1350
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llvm-svn: 40519
2007-07-26 08:01:58 +00:00
59e5e118ac
One additional field in TargetRegisterDesc.
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llvm-svn: 37760
2007-06-27 17:09:34 +00:00
2e887c0b84
Add immediate sub-registers.
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llvm-svn: 37738
2007-06-26 20:59:16 +00:00
f274efef9f
Add support to tablegen for specifying subregister classes on a per register class basis.
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llvm-svn: 37572
2007-06-13 22:20:15 +00:00
6357bf20fa
Patches by Chuck Rose to unbreak V Studio builds.
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Thanks Chuck!
llvm-svn: 37428
2007-06-04 23:52:59 +00:00
a23ef8a8f2
Remove the operator<< for MVT::ValueType in preparation for MVT::ValueType
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being changed from an enum to an integer type, which can't have a custom
operator<< overload.
llvm-svn: 37412
2007-06-04 16:11:03 +00:00
fd788aafba
A bit of feedback from Chris that I missed; error rather than asserting.
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llvm-svn: 36619
2007-05-01 06:08:36 +00:00
27a625a74b
llvm bug #1350 , parts 1, 2, and 3.
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llvm-svn: 36618
2007-05-01 05:57:02 +00:00
f0c955b4dc
Bug fix; add super-registers sets.
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llvm-svn: 36296
2007-04-21 00:55:29 +00:00
ac9fdde7f4
Add sub-registers sets.
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llvm-svn: 36278
2007-04-20 21:13:46 +00:00
68a8bcce99
emit an enum value for the # of target registers.
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llvm-svn: 34624
2007-02-26 03:34:38 +00:00
9bfb1e1f29
What should be the last unnecessary <iostream>s in the library.
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llvm-svn: 32333
2006-12-07 22:21:48 +00:00
4e153f1b91
Use an enumeration to eliminate data relocations.
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llvm-svn: 29249
2006-07-21 20:57:35 +00:00
2884b5cc93
Make sub- and super- register classes const.
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llvm-svn: 29200
2006-07-19 05:58:18 +00:00
aeccc6e676
Make sub- super- reg-class tables static.
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llvm-svn: 29190
2006-07-18 22:18:31 +00:00
5d038cf802
Allow more use of iPTR in patterns.
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llvm-svn: 28790
2006-06-15 00:16:37 +00:00
aa2372562e
Patches to make the LLVM sources more -pedantic clean. Patch provided
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by Anton Korobeynikov! This is a step towards closing PR786.
llvm-svn: 28447
2006-05-24 17:04:05 +00:00
fe72285033
Don't generate getCalleeSaveReg and getCalleeSaveRegClasses anymore.
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llvm-svn: 28376
2006-05-18 00:08:46 +00:00
229a6d0026
Also add super- register classes info.
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llvm-svn: 28221
2006-05-11 07:30:26 +00:00
5e7ba0b049
Add sub-register class information.
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llvm-svn: 28195
2006-05-09 06:34:26 +00:00
f0729b4067
Add dwarf register numbering to register data.
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llvm-svn: 27081
2006-03-24 21:15:58 +00:00
ccb1aebcd3
This gets most of the backends building with HP HappyC++.
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llvm-svn: 25029
2005-12-27 10:56:22 +00:00
006bb04f3a
Support multiple ValueTypes per RegisterClass, needed for upcoming vector
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work. This change has no effect on generated code.
llvm-svn: 24563
2005-12-01 04:51:06 +00:00
742606ad30
Switch more code over to using getValueAsListOfDefs. Look at all the -'s. :)
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llvm-svn: 24074
2005-10-28 22:59:53 +00:00
d4ff3c1324
Emit the value type for each register class.
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llvm-svn: 23584
2005-10-02 06:23:37 +00:00
c9f4219cfc
Rename MRegisterDesc -> TargetRegisterDesc for consistency
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llvm-svn: 23564
2005-09-30 17:49:27 +00:00
3e020bb619
remove some more initializers
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llvm-svn: 23562
2005-09-30 17:41:05 +00:00
ddc69bbbba
trim down the target info structs now that we have a preferred spill register class for each callee save register
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llvm-svn: 23560
2005-09-30 17:35:22 +00:00
da6fcc9f49
Compute a preferred spill register class for each callee-save register
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llvm-svn: 23553
2005-09-30 06:44:45 +00:00
Owen Anderson