Commit Graph

112698 Commits

Author SHA1 Message Date
David Blaikie 440a045606 STLExtras: Provide less/equal functors with templated function call operators, plus a deref'ing functor template utility
Similar to the C++14 void specializations of these templates, useful as
a stop-gap until LLVM switches to '14.

Example use-cases in tblgen because I saw some functors that looked like
they could be simplified/refactored.

Reviewers: dexonsmith

Differential Revision: http://reviews.llvm.org/D7324

llvm-svn: 227828
2015-02-02 18:35:10 +00:00
Adrian Prantl 9013c4b3b1 Debug Info: Relax assertion in isUnsignedDIType() to allow floats to be
described by integer constants. This is a bit ugly, but if the source
language allows arbitrary type casting, the debug info must follow suit.

For example:
  void foo() {
    float a;
    *(int *)&a = 0;
  }
For the curious: SROA replaces the float alloca with an i32 alloca, which
is then optimized away and described via dbg.value(i32 0, ...).

llvm-svn: 227827
2015-02-02 18:31:58 +00:00
Duncan P. N. Exon Smith 71db64258d Fix some file headers, NFC
llvm-svn: 227826
2015-02-02 18:20:15 +00:00
Duncan P. N. Exon Smith 9ffa6cd6fb Support: Add missing header to BlockFrequencyTest.cpp, NFC
llvm-svn: 227825
2015-02-02 18:18:07 +00:00
Tom Stellard c6b299c8c4 R600/SI: 64-bit and larger memory access must be at least 4-byte aligned
This is true for SI only. CI+ supports unaligned memory accesses,
but this requires driver support, so for now we disallow unaligned
accesses for all GCN targets.

llvm-svn: 227822
2015-02-02 18:02:28 +00:00
Tom Stellard 4cd6dcd6c4 R600/SI: Merge two test files
llvm-svn: 227821
2015-02-02 18:02:23 +00:00
Ahmed Bougacha dff57a6143 [AArch64] Prefer DUP/MOV ("CPY") to INS for vector_extract.
This avoids a partial false dependency on the previous content of
the upper lanes of the destination vector register.

Differential Revision: http://reviews.llvm.org/D7307

llvm-svn: 227820
2015-02-02 17:55:57 +00:00
Eric Christopher 8341358adc Since TargetLowering is already subtarget dependent just pass
in the subtarget and stash it in the class so that lookups are
easier and safer.

llvm-svn: 227819
2015-02-02 17:52:27 +00:00
Eric Christopher 1c50429923 Use the function template getSubtarget on the MachineFunction
rather than a larger explicit cast.

llvm-svn: 227818
2015-02-02 17:52:25 +00:00
Eric Christopher 40fb765888 Remove unused class variable.
llvm-svn: 227817
2015-02-02 17:52:23 +00:00
Eric Christopher 49a0fd7444 Remove unused class variable.
llvm-svn: 227816
2015-02-02 17:52:20 +00:00
Sanjay Patel 122a7a7098 fix typo
llvm-svn: 227815
2015-02-02 17:47:30 +00:00
Eric Christopher 05b819718c Reuse a bunch of cached subtargets and remove getSubtarget calls
without a Function argument.

llvm-svn: 227814
2015-02-02 17:38:43 +00:00
Eric Christopher c22f83a590 Remove unnecessary forward declaration.
llvm-svn: 227813
2015-02-02 17:38:40 +00:00
Eric Christopher 1cd84ed14e Remove some unused forward declarations.
llvm-svn: 227812
2015-02-02 17:38:37 +00:00
Jan Wen Voung d21194f712 Fix ARM peephole optimizeCompare to avoid optimizing unsigned cmp to 0.
Summary:
Previously it only avoided optimizing signed comparisons to 0.
Sometimes the DAGCombiner will optimize the unsigned comparisons
to 0 before it gets to the peephole pass, but sometimes it doesn't.

Fix for PR22373.

Test Plan: test/CodeGen/ARM/sub-cmp-peephole.ll

Reviewers: jfb, manmanren

Subscribers: aemerson, llvm-commits

Differential Revision: http://reviews.llvm.org/D7274

llvm-svn: 227809
2015-02-02 16:56:50 +00:00
Erik Eckstein 7330e358f6 Fix: SLPVectorizer crashes with assertion when vectorizing a cmp instruction.
The commit r225977 uncovered this bug. The problem was that the vectorizer tried to
read the second operand of an already deleted instruction.
The bug didn't show up before r225977 because the freed memory still contained a non-null pointer.
With r225977 deletion of instructions is delayed and the read operand pointer is always null.

llvm-svn: 227800
2015-02-02 12:45:34 +00:00
Lang Hames e644b75782 [Orc] Remove one of the OrcMCJITReplacement regression tests while I
investigate a sanitizer bot failure.

llvm-svn: 227785
2015-02-02 06:01:02 +00:00
NAKAMURA Takumi b0a52838fa gold-plugin.cpp: Fixup r227599 corresponding to r227685 and r227731 -- Don't lose DataLayoutPass.
llvm-svn: 227783
2015-02-02 05:47:30 +00:00
Lang Hames 16bbaf1639 [Orc] Regression tests for OrcMCJITReplacement.
Duplicated from the MCJIT regression tests.

llvm-svn: 227780
2015-02-02 05:04:55 +00:00
Lang Hames a3e710dddd [Orc] Remove the OwnedModules list from OrcMCJITReplacement and use
ExecutionEngine's Modules list instead.

This makes the owned modules visibile to ExecutionEngine. In particular,
it is required for ExecutionEngine::runStaticConstructorsAndDestructors to
work.

Regression tests for Orc (which test this issue) will be committed shortly.

llvm-svn: 227779
2015-02-02 04:34:02 +00:00
Lang Hames 29dff9837a [Orc] Make the ObjectLinkingLayer take ownership of object files until
finalization time.

As currently implemented, RuntimeDyldELF requires the original object
file to be avaible when relocations are being resolved. This patch
ensures that the ObjectLinkingLayer preserves it until then. In the
future RuntimeDyldELF should be rewritten to remove this requirement, at
which point this patch can be reverted.

Regression test cases for Orc (which include coverage of this bug) will
be committed shortly.
 

llvm-svn: 227778
2015-02-02 04:32:17 +00:00
Lang Hames 15be546140 [Orc] Add sensible defaults for the ObjectLinkingLayer constructor.
llvm-svn: 227776
2015-02-02 01:03:10 +00:00
Hal Finkel 23a3eab65a [PowerPC] Put PPCEarlyReturn into its own source file
PPCInstrInfo.cpp has ended up containing several small MI-level passes, and
this is making the file harder to read than necessary. Split out
PPCEarlyReturn into its own source file. NFC.

Now that PPCInstrInfo.cpp does not also contain pass implementations, I hope
that it will be slightly less unwieldy.

llvm-svn: 227775
2015-02-01 22:58:46 +00:00
Hal Finkel 7c6ab93fba [PowerPC] Remove unnecessary include
llvm-svn: 227772
2015-02-01 22:03:13 +00:00
Hal Finkel 76c751dcef [PowerPC] Put PPCVSXCopy into its own source file
PPCInstrInfo.cpp has ended up containing several small MI-level passes, and
this is making the file harder to read than necessary. Split out
PPCVSXCopy into its own source file. NFC.

llvm-svn: 227771
2015-02-01 22:01:29 +00:00
Hal Finkel 089b8ecf8e [PowerPC] Put PPCVSXFMAMutate into its own source file
PPCInstrInfo.cpp has ended up containing several small MI-level passes, and
this is making the file harder to read than necessary. Split out
PPCVSXFMAMutate into its own source file. NFC.

llvm-svn: 227770
2015-02-01 21:51:22 +00:00
Hal Finkel 83d695419c [PowerPC] Remove the PPCVSXCopyCleanup pass
This MI-level pass was necessary when VSX support was first being developed,
specifically, before the ABI code had been updated to use VSX registers for
arguments (the register assignments did not change, in a physical sense, but
the VSX super-registers are now used). Unfortunately, I never went back and
removed this pass after that was done. I believe this code is now effectively
dead.

llvm-svn: 227767
2015-02-01 21:20:58 +00:00
Benjamin Kramer ad960019b0 LoopVectorize: Remove initializer list that blocks MSVC.
llvm-svn: 227766
2015-02-01 21:13:26 +00:00
Hal Finkel 1296f071e0 [PowerPC] Add implicit ops to conditional returns in PPCEarlyReturn
When PPCEarlyReturn, it should really copy implicit ops from the old return
instruction to the new one. This currently does not matter much, because we run
PPCEarlyReturn very late in the pipeline (there is nothing to do DCE on
definitions of those registers). However, for completeness, we should do it
anyway.

Noticed by inspection (and there should be no functional change); thus, no
test case.

llvm-svn: 227763
2015-02-01 20:16:10 +00:00
Benjamin Kramer 813fc59b9f FoldingSetVectorIterator is just a subset of pointee_iterator, remove it.
llvm-svn: 227761
2015-02-01 19:26:05 +00:00
David Majnemer 8a6578a0e7 ValueTracking: Make isSafeToSpeculativelyExecute a little cleaner
No functional change intended.

llvm-svn: 227760
2015-02-01 19:10:19 +00:00
Hal Finkel e3d2b20c2b [PowerPC] VSX stores don't also read
The VSX store instructions were also picking up an implicit "may read" from the
default pattern, which was an intrinsic (and we don't currently have a way of
specifying write-only intrinsics).

This was causing MI verification to fail for VSX spill restores.

llvm-svn: 227759
2015-02-01 19:07:41 +00:00
Hal Finkel 11d3c561a4 [PowerPC] Better scheduling for isel on P7/P8
isel is actually a cracked instruction on the P7/P8, and must start a dispatch
group. The scheduling model should reflect this so that we don't bunch too many
of them together when possible.

Thanks to Bill Schmidt and Pat Haugen for helping to sort this out.

llvm-svn: 227758
2015-02-01 17:52:16 +00:00
Adam Nemet a9dc8d817d Include cstddef in EquivalenceClasses.h
This is to try to appease bots complaining that ptrdiff_t is undefined in
LoopAccessAnalysis.cpp.

llvm-svn: 227757
2015-02-01 17:21:06 +00:00
Adam Nemet 0456327cfb [LoopVectorize] Move LoopAccessAnalysis to its own module
Other than moving code and adding the boilerplate for the new files, the code
being moved is unchanged.

There are a few global functions that are shared with the rest of the
LoopVectorizer.  I moved these to the new module as well (emitLoopAnalysis,
stripIntegerCast, replaceSymbolicStrideSCEV) along with the Report class used
by emitLoopAnalysis.  There is probably room for further improvement in this
area.

I kept DEBUG_TYPE "loop-vectorize" because it's used as the PassName with
emitOptimizationRemarkAnalysis.  This will obviously have to change.

NFC.  This is part of the patchset that splits out the memory dependence logic
from LoopVectorizationLegality into a new class LoopAccessAnalysis.
LoopAccessAnalysis will be used by the new Loop Distribution pass.

llvm-svn: 227756
2015-02-01 16:56:15 +00:00
Adam Nemet 3f737d935d [LoopVectorize] Move RuntimePointerCheck under LoopAccessAnalysis
This class needs to remain public because it's used by
LoopVectorizationLegality::addRuntimeCheck.

NFC.  This is part of the patchset that splits out the memory dependence logic
from LoopVectorizationLegality into a new class LoopAccessAnalysis.
LoopAccessAnalysis will be used by the new Loop Distribution pass.

llvm-svn: 227755
2015-02-01 16:56:11 +00:00
Adam Nemet c237f68fc9 [LoopVectorize] Pass parameters explicitly to MemoryDepChecker
Rather than using globals use a structure to pass parameters from the
vectorizer.  This prepares the class to be moved outside the LoopVectorizer.

It's not great how all this is passed through in LoopAccessAnalysis but this
is all expected to change once the class start servicing the Loop Distribution
pass as well where some of these parameters make no sense.

NFC.  This is part of the patchset that splits out the memory dependence logic
from LoopVectorizationLegality into a new class LoopAccessAnalysis.
LoopAccessAnalysis will be used by the new Loop Distribution pass.

llvm-svn: 227754
2015-02-01 16:56:09 +00:00
Adam Nemet fababbded9 [LoopVectorize] Make hasVectorInstrinsicScalarOpd inline
VectorUtils.h needs to be included in LoopAccessAnalysis.cpp for
getIntrinsicIDForCall but hasVectorInstrinsicScalarOpd is not used by this
module.

NFC.  This is part of the patchset that splits out the memory dependence logic
from LoopVectorizationLegality into a new class LoopAccessAnalysis.
LoopAccessAnalysis will be used by the new Loop Distribution pass.

llvm-svn: 227753
2015-02-01 16:56:05 +00:00
Michael Kuperstein 13fbd45263 [X86] Convert esp-relative movs of function arguments to pushes, step 2
This moves the transformation introduced in r223757 into a separate MI pass.
This allows it to cover many more cases (not only cases where there must be a 
reserved call frame), and perform rudimentary call folding. It still doesn't 
have a heuristic, so it is enabled only for optsize/minsize, with stack 
alignment <= 8, where it ought to be a fairly clear win.

(Re-commit of r227728)

Differential Revision: http://reviews.llvm.org/D6789

llvm-svn: 227752
2015-02-01 16:56:04 +00:00
Adam Nemet c28ffdcf35 [LoopVectorize] Split out LoopAccessAnalysis from LoopVectorizationLegality
Move the canVectorizeMemory functionality from LoopVectorizationLegality to a
new class LoopAccessAnalysis and forward users.

Currently the collection of the symbolic stride information is kept with
LoopVectorizationLegality and it becomes an input to LoopAccessAnalysis.

NFC.  This is part of the patchset that splits out the memory dependence logic
from LoopVectorizationLegality into a new class LoopAccessAnalysis.
LoopAccessAnalysis will be used by the new Loop Distribution pass.

llvm-svn: 227751
2015-02-01 16:56:04 +00:00
Adam Nemet 5985971fa5 [LoopVectorize] Add accessors for Num{Stores,Loads,PredStores} in AccessAnalysis
These members are moving to LoopAccessAnalysis.  The accessors help to hide
this.

NFC.  This is part of the patchset that splits out the memory dependence logic
from LoopVectorizationLegality into a new class LoopAccessAnalysis.
LoopAccessAnalysis will be used by the new Loop Distribution pass.

llvm-svn: 227750
2015-02-01 16:56:02 +00:00
Adam Nemet a2abc59dac [LoopVectorize] Rename the Report class to VectorizationReport
This class will become public in the new LoopAccessAnalysis header so the name
needs to be more global.

NFC.  This is part of the patchset that splits out the memory dependence logic
from LoopVectorizationLegality into a new class LoopAccessAnalysis.
LoopAccessAnalysis will be used by the new Loop Distribution pass.

llvm-svn: 227749
2015-02-01 16:56:00 +00:00
Adam Nemet ac71cecdc6 [LoopVectorize] Factor out duplicated code into Report::emitAnalysis
The logic in emitAnalysis is duplicated across multiple functions.  This
splits it into a function.  Another use will be added by the patchset.

NFC.  This is part of the patchset that splits out the memory dependence logic
from LoopVectorizationLegality into a new class LoopAccessAnalysis.
LoopAccessAnalysis will be used by the new Loop Distribution pass.

llvm-svn: 227748
2015-02-01 16:55:58 +00:00
Adam Nemet 6854b9203a [LoopVectorize] Split out RuntimePointerCheck from LoopVectorizationLegality
RuntimePointerCheck will be used through LoopAccessAnalysis in
LoopVectorizationLegality.  Later in the patchset it will become a local class
of LoopAccessAnalysis.

NFC.  This is part of the patchset that splits out the memory dependence logic
from LoopVectorizationLegality into a new class LoopAccessAnalysis.
LoopAccessAnalysis will be used by the new Loop Distribution pass.

llvm-svn: 227747
2015-02-01 16:55:56 +00:00
Michael Kuperstein e86aa9a8a4 Revert r227728 due to bad line endings.
llvm-svn: 227746
2015-02-01 16:15:07 +00:00
Hal Finkel e6698d5305 [PowerPC] Make r2 allocatable on PPC64/ELF for some leaf functions
The TOC base pointer is passed in r2, and we normally reserve this register so
that we can depend on it being there. However, for leaf functions, and
specifically those leaf functions that don't do any TOC access of their own
(which is generally due to accessing the constant pool, using TLS, etc.),
we can treat r2 as an ordinary callee-saved register (it must be callee-saved
because, for local direct calls, the linker will not insert any save/restore
code).

The allocation order has been changed slightly for PPC64/ELF systems to put r2
at the end of the list (while leaving it near the beginning for Darwin systems
to prevent unnecessary output changes). While r2 is allocatable, using it still
requires spill/restore traffic, and thus comes at the end of the list.

llvm-svn: 227745
2015-02-01 15:03:28 +00:00
Sylvestre Ledru 1b3961c019 Fix some bashims. More information on https://wiki.ubuntu.com/DashAsBinSh. Reported initially on https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=772302 & https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=772301
llvm-svn: 227744
2015-02-01 14:55:43 +00:00
Chandler Carruth 21fc195c13 [multiversion] Kill FunctionTargetTransformInfo, TTI itself is now
per-function and supports the exact desired interface.

llvm-svn: 227743
2015-02-01 14:37:03 +00:00
Chandler Carruth ab5cb36c40 [multiversion] Remove the function parameter from the unrolling
preferences interface on TTI now that all of TTI is per-function.

llvm-svn: 227741
2015-02-01 14:31:23 +00:00
Chandler Carruth c956ab6603 [multiversion] Switch the TTI queries from TargetMachine to Subtarget
now that we have a correct and cached subtarget specific to the
function.

Also, finish providing a cached per-function subtarget in the core
LLVMTargetMachine -- that layer hadn't switched over yet.

The only use of the TargetMachine was to re-lookup a subtarget for
a particular function to work around the fact that TTI was immutable.
Now that it is per-function and we haved a cached subtarget, use it.

This still leaves a few interfaces with real warts on them where we were
passing Function objects through the TTI interface. I'll remove these
and clean their usage up in subsequent commits now that this isn't
necessary.

llvm-svn: 227738
2015-02-01 14:22:17 +00:00
Chandler Carruth c340ca839c [multiversion] Remove the cached TargetMachine pointer from the
intermediate TTI implementation template and instead query up to the
derived class for both the TargetMachine and the TargetLowering.

Most of the derived types had a TLI cached already and there is no need
to store a less precisely typed target machine pointer.

This will in turn make it much cleaner to look up the TLI via
a per-function subtarget instead of the generic subtarget, and it will
pave the way toward pulling the subtarget used for unroll preferences
into the same form once we are *always* using the function to look up
the correct subtarget.

llvm-svn: 227737
2015-02-01 14:01:15 +00:00
Chandler Carruth 0ef5e39166 [multiversion] Remove another place we were "handling" nullptr even
though it was never a reasonable input.

llvm-svn: 227736
2015-02-01 13:21:04 +00:00
Chandler Carruth 8b04c0d26a [multiversion] Switch all of the targets over to use the
TargetIRAnalysis access path directly rather than implementing getTTI.

This even removes getTTI from the interface. It's more efficient for
each target to just register a precise callback that creates their
specific TTI.

As part of this, all of the targets which are building their subtargets
individually per-function now build their TTI instance with the function
and thus look up the correct subtarget and cache it. NVPTX, R600, and
XCore currently don't leverage this functionality, but its trivial for
them to add it now.

llvm-svn: 227735
2015-02-01 13:20:00 +00:00
Chandler Carruth ee642690ea [multiversion] Remove a false freedom to leave the TargetMachine pointer
null.

For some reason some of the original TTI code supported a null target
machine. This seems to have been legacy, and I made matters worse when
refactoring this code by spreading that pattern further through the
various targets.

The TargetMachine can't actually be null, and it doesn't make sense to
support that use case. I've now consistently removed it and removed all
of the code trying to cope with that situation. This is probably good,
as several targets *didn't* cope with it being null despite the null
default argument in their constructors. =]

llvm-svn: 227734
2015-02-01 12:38:24 +00:00
Benjamin Kramer 6ab86b1bb6 EarlyCSE: Replace custom hash mixing with Hashing.h
Brings it in line with the other hashes in EarlyCSE.

llvm-svn: 227733
2015-02-01 12:30:59 +00:00
Chandler Carruth 5ec2b1d11a [multiversion] Implement the old pass manager's TTI wrapper pass in
terms of the new pass manager's TargetIRAnalysis.

Yep, this is one of the nicer bits of the new pass manager's design.
Passes can in many cases operate in a vacuum and so we can just nest
things when convenient. This is particularly convenient here as I can
now consolidate all of the TargetMachine logic on this analysis.

The most important change here is that this pushes the function we need
TTI for all the way into the TargetMachine, and re-creates the TTI
object for each function rather than re-using it for each function.
We're now prepared to teach the targets to produce function-specific TTI
objects with specific subtargets cached, etc.

One piece of feedback I'd love here is whether its worth renaming any of
this stuff. None of the names really seem that awesome to me at this
point, but TargetTransformInfoWrapperPass is particularly ... odd.
TargetIRAnalysisWrapper might make more sense. I would want to do that
rename separately anyways, but let me know what you think.

llvm-svn: 227731
2015-02-01 12:26:09 +00:00
Chandler Carruth fdb9c573f7 [multiversion] Thread a function argument through all the callers of the
getTTI method used to get an actual TTI object.

No functionality changed. This just threads the argument and ensures
code like the inliner can correctly look up the callee's TTI rather than
using a fixed one.

The next change will use this to implement per-function subtarget usage
by TTI. The changes after that should eliminate the need for FTTI as that
will have become the default.

llvm-svn: 227730
2015-02-01 12:01:35 +00:00
Michael Kuperstein bd57186c76 [X86] Convert esp-relative movs of function arguments to pushes, step 2
This moves the transformation introduced in r223757 into a separate MI pass.
This allows it to cover many more cases (not only cases where there must be a 
reserved call frame), and perform rudimentary call folding. It still doesn't 
have a heuristic, so it is enabled only for optsize/minsize, with stack 
alignment <= 8, where it ought to be a fairly clear win.

Differential Revision: http://reviews.llvm.org/D6789

llvm-svn: 227728
2015-02-01 11:44:44 +00:00
Chandler Carruth af3c256ffa [PM] Clean up a stale comment that came from a differnt pass when
I created this header.

llvm-svn: 227727
2015-02-01 11:35:56 +00:00
Chandler Carruth fdffd87d68 [PM] Port SimplifyCFG to the new pass manager.
This should be sufficient to replace the initial (minor) function pass
pipeline in Clang with the new pass manager. I'll probably add an (off
by default) flag to do that just to ensure we can get extra testing.

llvm-svn: 227726
2015-02-01 11:34:21 +00:00
Chandler Carruth e8c686aa86 [PM] Port EarlyCSE to the new pass manager.
I've added RUN lines both to the basic test for EarlyCSE and the
target-specific test, as this serves as a nice test that the TTI layer
in the new pass manager is in fact working well.

llvm-svn: 227725
2015-02-01 10:51:23 +00:00
Chandler Carruth 9f8d9b613c [PM] Teach the module-to-function adaptor to not run function passes
over declarations.

This is both quite unproductive and causes things to crash, for example
domtree would just assert.

I've added a declaration and a domtree run to the basic high-level tests
for the new pass manager.

llvm-svn: 227724
2015-02-01 10:47:25 +00:00
Chandler Carruth 9973aeede5 [PM] Switch to a ranged based for loop. NFC
llvm-svn: 227723
2015-02-01 10:40:21 +00:00
Chandler Carruth e038552c8a [PM] Port TTI to the new pass manager, introducing a TargetIRAnalysis to
produce it.

This adds a function to the TargetMachine that produces this analysis
via a callback for each function. This in turn faves the way to produce
a *different* TTI per-function with the correct subtarget cached.

I've also done the necessary wiring in the opt tool to thread the target
machine down and make it available to the pass registry so that we can
construct this analysis from a target machine when available.

llvm-svn: 227721
2015-02-01 10:11:22 +00:00
Craig Topper 2844ca7319 [X86] Add a few target specific nodes to 'getTargetNodeName'
llvm-svn: 227720
2015-02-01 10:00:37 +00:00
Elena Demikhovsky 534a99d878 AVX2: Added 2 more tests for gather intrinsics.
llvm-svn: 227718
2015-02-01 08:52:15 +00:00
Michael Kuperstein a691f3e921 Removed assert that doesn't typecheck and breaks debug MSVC build.
llvm-svn: 227717
2015-02-01 08:46:20 +00:00
Chandler Carruth 2dc92e90d8 [PM] Refactor the analysis registration and pass pipeline parsing to
live in a class.

While this isn't really significant right now, I need to expose some
state to the pass construction expressions, and making them get
evaluated within a class context is a nice way to collect members that
they may need to access.

llvm-svn: 227715
2015-02-01 07:40:05 +00:00
Jingyue Wu 6c26bb63fe [SeparateConstOffsetFromGEP] skip optnone functions
llvm-svn: 227705
2015-02-01 02:34:41 +00:00
Jingyue Wu 6e091c8eab [SeparateConstOffsetFromGEP] set PreservesCFG flag
SeparateConstOffsetFromGEP does not change the shape of the control flow graph.

llvm-svn: 227704
2015-02-01 02:33:02 +00:00
Jingyue Wu 0220df0dfd [NVPTX] Emit .pragma "nounroll" for loops marked with nounroll
Summary:
CUDA driver can unroll loops when jit-compiling PTX. To prevent CUDA
driver from unrolling a loop marked with llvm.loop.unroll.disable is not
unrolled by CUDA driver, we need to emit .pragma "nounroll" at the
header of that loop.

This patch also extracts getting unroll metadata from loop ID metadata
into a shared helper function.

Test Plan: test/CodeGen/NVPTX/nounroll.ll

Reviewers: eliben, meheff, jholewinski

Reviewed By: jholewinski

Subscribers: jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D7041

llvm-svn: 227703
2015-02-01 02:27:45 +00:00
Adrian Prantl 152ac396db Fix PR22393. When recursively replacing an aggregate with a smaller
aggregate or scalar, the debug info needs to refer to the absolute offset
(relative to the entire variable) instead of storing the offset inside
the smaller aggregate.

llvm-svn: 227702
2015-02-01 00:58:04 +00:00
Adrian Prantl 02d6f22c93 Add missing tags.
llvm-svn: 227701
2015-02-01 00:57:31 +00:00
NAKAMURA Takumi 7ae226dfaf [CMake] LLVMLTO requires Intrinsics.gen since r227685 introduced llvm/Analysis/TargetTransformInfo.h.
llvm-svn: 227700
2015-02-01 00:55:43 +00:00
NAKAMURA Takumi d75e020342 [CMake] LLVMTarget requires Intrinsics.gen since r227669 introduced llvm/Analysis/TargetTransformInfo.h.
llvm-svn: 227699
2015-02-01 00:55:32 +00:00
Chandler Carruth d8b3e9a420 [PM] Remove a bunch of stale TTI creation method declarations. I nuked
their definitions, but forgot to clean up all the declarations which are
in different files.

llvm-svn: 227698
2015-02-01 00:22:15 +00:00
Matt Arsenault 25f61a6f89 Fix typo
llvm-svn: 227697
2015-01-31 23:37:27 +00:00
Matt Arsenault 08ad328ae2 R600/SI: Only select cvt_flr/cvt_rpi with no NaNs.
These have different behavior from cvt_i32_f32 on NaN.

llvm-svn: 227693
2015-01-31 21:28:13 +00:00
Saleem Abdulrasool 3475dc358c X86: silence a GCC warning
GCC 4.9 gives the following warning:
  warning: enumeral and non-enumeral type in conditional expression
Cast the enumeral value to an integer within the ternary operation.  NFC.

llvm-svn: 227692
2015-01-31 17:56:11 +00:00
Diego Novillo 6253035c18 Remove unused variable.
Summary:
This variable is only used inside an assert. This breaks builds with
asserts disabled.

OK for trunk?

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D7314

llvm-svn: 227691
2015-01-31 17:17:33 +00:00
Aaron Ballman a3bcd37c02 Removed a spurious semicolon; NFC
llvm-svn: 227690
2015-01-31 15:18:47 +00:00
Simon Pilgrim 43fbaada8e Removed SSE lane blend findCommutedOpIndices overrides. NFCI.
The default op indices frmo TargetInstrInfo::findCommutedOpIndices are being commuted so we don't need to do this.

llvm-svn: 227689
2015-01-31 15:16:30 +00:00
Simon Pilgrim 9c76b47469 [X86][SSE] Shuffle mask decode support for zero extend, scalar float/double moves and integer load instructions
This patch adds shuffle mask decodes for integer zero extends (pmovzx** and movq xmm,xmm) and scalar float/double loads/moves (movss/movsd).

Also adds shuffle mask decodes for integer loads (movd/movq).

Differential Revision: http://reviews.llvm.org/D7228

llvm-svn: 227688
2015-01-31 14:09:36 +00:00
Chandler Carruth 93dcdc47db [PM] Switch the TargetMachine interface from accepting a pass manager
base which it adds a single analysis pass to, to instead return the type
erased TargetTransformInfo object constructed for that TargetMachine.

This removes all of the pass variants for TTI. There is now a single TTI
*pass* in the Analysis layer. All of the Analysis <-> Target
communication is through the TTI's type erased interface itself. While
the diff is large here, it is nothing more that code motion to make
types available in a header file for use in a different source file
within each target.

I've tried to keep all the doxygen comments and file boilerplate in line
with this move, but let me know if I missed anything.

With this in place, the next step to making TTI work with the new pass
manager is to introduce a really simple new-style analysis that produces
a TTI object via a callback into this routine on the target machine.
Once we have that, we'll have the building blocks necessary to accept
a function argument as well.

llvm-svn: 227685
2015-01-31 11:17:59 +00:00
Kumar Sukhani 9559a5c05e [asan][mips] Fix MIPS64 Asan mapping
llvm-svn: 227684
2015-01-31 10:43:18 +00:00
Owen Anderson be2edf30e4 Replace another std::set in the core of CodeGenRegister, this time with sorted arrays.
The hot path through this region of code does lots of batch inserts into sets. By storing them as sorted arrays, we can defer the sorting to the end of the batch, which is dramatically more efficient. This reduces tblgen runtime by 25% on my worst-case target.

llvm-svn: 227682
2015-01-31 09:13:36 +00:00
Owen Anderson a366d7b217 Change more of the guts of CodeGenRegister's RegUnit tracking to be based on bit vectors.
This is a continuation of my prior work to move some of the inner workings for CodeGenRegister to use bit vectors when computing about register units. This is highly beneficial to TableGen runtime on targets with large, dense register files. This patch represents a ~40% runtime reduction over and above my earlier improvement on a stress test of this case.

llvm-svn: 227678
2015-01-31 07:49:41 +00:00
Saleem Abdulrasool 9fd41316ad llvm-readobj: add a test case for ARM_MOV32(T) base relocation
Add a trivial binary (int main() { return 0; }) built for Windows on ARM to
ensure that we can correctly identify ARM_MOV32(T) base relocations.  Addresses
post-commit review comments.

llvm-svn: 227673
2015-01-31 04:46:50 +00:00
Saleem Abdulrasool d90e64ede5 ARM: make a table more readable (NFC)
This adds some comments and splits the flag calculation on type boundaries to
make the table more readable.  Addresses some post-commit review comments to SVN
r227603.  NFC.

llvm-svn: 227670
2015-01-31 04:12:06 +00:00
Chandler Carruth 705b185f90 [PM] Change the core design of the TTI analysis to use a polymorphic
type erased interface and a single analysis pass rather than an
extremely complex analysis group.

The end result is that the TTI analysis can contain a type erased
implementation that supports the polymorphic TTI interface. We can build
one from a target-specific implementation or from a dummy one in the IR.

I've also factored all of the code into "mix-in"-able base classes,
including CRTP base classes to facilitate calling back up to the most
specialized form when delegating horizontally across the surface. These
aren't as clean as I would like and I'm planning to work on cleaning
some of this up, but I wanted to start by putting into the right form.

There are a number of reasons for this change, and this particular
design. The first and foremost reason is that an analysis group is
complete overkill, and the chaining delegation strategy was so opaque,
confusing, and high overhead that TTI was suffering greatly for it.
Several of the TTI functions had failed to be implemented in all places
because of the chaining-based delegation making there be no checking of
this. A few other functions were implemented with incorrect delegation.
The message to me was very clear working on this -- the delegation and
analysis group structure was too confusing to be useful here.

The other reason of course is that this is *much* more natural fit for
the new pass manager. This will lay the ground work for a type-erased
per-function info object that can look up the correct subtarget and even
cache it.

Yet another benefit is that this will significantly simplify the
interaction of the pass managers and the TargetMachine. See the future
work below.

The downside of this change is that it is very, very verbose. I'm going
to work to improve that, but it is somewhat an implementation necessity
in C++ to do type erasure. =/ I discussed this design really extensively
with Eric and Hal prior to going down this path, and afterward showed
them the result. No one was really thrilled with it, but there doesn't
seem to be a substantially better alternative. Using a base class and
virtual method dispatch would make the code much shorter, but as
discussed in the update to the programmer's manual and elsewhere,
a polymorphic interface feels like the more principled approach even if
this is perhaps the least compelling example of it. ;]

Ultimately, there is still a lot more to be done here, but this was the
huge chunk that I couldn't really split things out of because this was
the interface change to TTI. I've tried to minimize all the other parts
of this. The follow up work should include at least:

1) Improving the TargetMachine interface by having it directly return
   a TTI object. Because we have a non-pass object with value semantics
   and an internal type erasure mechanism, we can narrow the interface
   of the TargetMachine to *just* do what we need: build and return
   a TTI object that we can then insert into the pass pipeline.
2) Make the TTI object be fully specialized for a particular function.
   This will include splitting off a minimal form of it which is
   sufficient for the inliner and the old pass manager.
3) Add a new pass manager analysis which produces TTI objects from the
   target machine for each function. This may actually be done as part
   of #2 in order to use the new analysis to implement #2.
4) Work on narrowing the API between TTI and the targets so that it is
   easier to understand and less verbose to type erase.
5) Work on narrowing the API between TTI and its clients so that it is
   easier to understand and less verbose to forward.
6) Try to improve the CRTP-based delegation. I feel like this code is
   just a bit messy and exacerbating the complexity of implementing
   the TTI in each target.

Many thanks to Eric and Hal for their help here. I ended up blocked on
this somewhat more abruptly than I expected, and so I appreciate getting
it sorted out very quickly.

Differential Revision: http://reviews.llvm.org/D7293

llvm-svn: 227669
2015-01-31 03:43:40 +00:00
Saleem Abdulrasool fb8a66fbc5 ARM: support stack probe size on Windows on ARM
Now that -mstack-probe-size is piped through to the backend via the function
attribute as on Windows x86, honour the value to permit handling of non-default
values for stack probes.  This is needed /Gs with the clang-cl driver or
-mstack-probe-size with the clang driver when targeting Windows on ARM.

llvm-svn: 227667
2015-01-31 02:26:37 +00:00
Kostya Serebryany e8cee11570 [fuzzer] add flags to run fuzzer in multiple parallel processes
llvm-svn: 227664
2015-01-31 01:14:40 +00:00
Kevin Enderby f6d258537d Add the -section option to llvm-objdump used with -macho that takes the argument
segname,sectname to specify a Mach-O section to print.  The printing is based on
the section type or section attributes.

The printing of the module initialization and termination section types is printed
with this change.  Printing of other section types will be added next.

llvm-svn: 227649
2015-01-31 00:37:11 +00:00
Eric Christopher 295596a0a7 Remove the last vestiges of resetOperationActions.
llvm-svn: 227648
2015-01-31 00:21:17 +00:00
Eric Christopher a6734178a7 Reuse a bunch of cached subtargets and remove getSubtarget calls
without a Function argument.

llvm-svn: 227647
2015-01-31 00:06:45 +00:00
David Blaikie c52b4944ad Add PPC test for r227481, but XFAIL because this is actually more work than it appeared to be.
Same sort of bug as on ARM where the cmp+branch are lowered to br_cc
(choosing the branch's debugloc for the br_cc's debugloc) then expanded
out to a cmp and a br, but both using the debug loc of the br_cc, thus
losing fidelity.

llvm-svn: 227645
2015-01-30 23:52:19 +00:00
Eric Christopher f5e9406243 Reuse a bunch of cached subtargets and remove getSubtarget calls
without a Function argument.

llvm-svn: 227644
2015-01-30 23:46:43 +00:00
Eric Christopher 1e51334459 Avoid using the cast and use the templated accessor function.
llvm-svn: 227643
2015-01-30 23:46:40 +00:00
Ahmed Bougacha aab9677f65 [AArch64] Add a few more DUP testcases. NFC.
Also, don't lie about testing index 0.

llvm-svn: 227642
2015-01-30 23:41:15 +00:00
Philip Reames 1ffa9377e1 Factor out statepoint verification into separate function. (NFC)
Patch by: Igor Laevsky

"Simple refactoring. This is done in preparation to support verification of invokable statepoints."

Differential Revision: http://reviews.llvm.org/D7276

llvm-svn: 227640
2015-01-30 23:28:05 +00:00
Kostya Serebryany 71672552db [fuzzer] Add a gtest-style test
Summary: Add one gtest-style test.

Test Plan: run on bot

Reviewers: samsonov

Reviewed By: samsonov

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D7287

llvm-svn: 227639
2015-01-30 23:26:57 +00:00
Eric Christopher 7792e32b64 Reuse a bunch of cached subtargets and remove getSubtarget calls
without a Function argument.

llvm-svn: 227638
2015-01-30 23:24:40 +00:00
Philip Reames c2f99b421b Fix statepoint verifier tests to actually test verifier.
Patch by: Igor Laevsky

"Statepoint verifier tests were using wrong names for the statepoint and gc.relocate intrinsics. This change renames them to use correct names and fixes all uncovered issues."

Differential Revision: http://reviews.llvm.org/D7266

llvm-svn: 227636
2015-01-30 23:18:42 +00:00
Ahmed Bougacha 77b76542eb [AArch64] Robustize neon-scalar-copy.ll tests. NFC.
Some of those didn't even have run lines: they were removed
inadvertently during the Great Merge of 2014.

They used to check for DUPs, but now we go through W-regs?
Filed PR22418 for that potential regression.

For now, just make the tests explicit, so we now where we stand.

llvm-svn: 227635
2015-01-30 23:13:57 +00:00
David Blaikie 3ef249c9c0 Add ARM test for r227489, but XFAIL because this is actually more work than it appeared to be.
Also revert r227489 since it didn't actually fix the thing I thought I
was fixing (since the test case was targeting the wrong architecture
initially). The change might be correct & demonstrated by other test
cases, but it's not a priority for me to find those test cases right
now.

Filed PR22417 for the failure.

llvm-svn: 227632
2015-01-30 23:04:39 +00:00
Lang Hames 8d3f8d75cd [PBQP] Fix transposed worst row/column check in handleAdd/RemoveNode in the PBQP
allocator.

Patch by Jonas Paulsson. Thanks Jonas!

llvm-svn: 227628
2015-01-30 22:28:49 +00:00
Chris Bieneman d77bbab393 NFC. Making printOptionValues an API on the parser class.
llvm-svn: 227626
2015-01-30 22:16:01 +00:00
Alexey Samsonov 964f4dbaae Fix memory leak in WinEHPrepare introduced in r227405.
This leak was detected by ASan bootstrap of LLVM.

llvm-svn: 227625
2015-01-30 22:07:05 +00:00
Eric Christopher b1874ebd32 Remove unused function.
llvm-svn: 227624
2015-01-30 22:02:36 +00:00
Eric Christopher 6d5c47c3c2 Remove extraneous forward declaration.
llvm-svn: 227623
2015-01-30 22:02:34 +00:00
Eric Christopher cccae7951c Use the cached subtargets and remove calls to getSubtarget/getSubtargetImpl
without a Function argument.

llvm-svn: 227622
2015-01-30 22:02:31 +00:00
Eric Christopher 6d9fcc38be Add a similar templated cast for getSubtarget off of the MachineFunction
to save typing a lot of static_casts.

llvm-svn: 227621
2015-01-30 22:02:19 +00:00
Michael Liao 3fd78353fb Add one more vim swap file pattern
llvm-svn: 227620
2015-01-30 21:59:28 +00:00
Colin LeMahieu cefca69d72 [Hexagon] Adding vector shift instructions and tests.
llvm-svn: 227619
2015-01-30 21:58:46 +00:00
Tom Stellard b357c43b93 R600/SI: Handle SI_SPILL_V96_RESTORE in SIRegisterInfo::eliminateFrameIndex()
This fixes a crash in Unigine Heaven.

llvm-svn: 227618
2015-01-30 21:51:51 +00:00
Ahmed Bougacha 2d80ea1939 [X86] Cleanup tabs in test vector-zext.ll. NFC.
Some tests have tabs, some don't.
In vector-[sz]ext.ll, space wins (well duh!).

llvm-svn: 227615
2015-01-30 21:41:28 +00:00
Reid Kleckner f0d389c139 Silence "not all paths return a value" warning in MSVC
llvm-svn: 227614
2015-01-30 21:30:57 +00:00
Colin LeMahieu cc4329b836 [Hexagon] Adding vector predicate instructions.
llvm-svn: 227613
2015-01-30 21:24:06 +00:00
Colin LeMahieu 26a537c743 [Hexagon] Adding vector permutation instructions and tests.
llvm-svn: 227612
2015-01-30 21:14:00 +00:00
Reid Kleckner a580b6ec67 Win64: Put a REX_W prefix on all TAILJMP* instructions
MSDN's x64 software conventions page says that this is one of the fixed
list of legal epilogues:
https://msdn.microsoft.com/en-us/library/tawsa7cb.aspx

Presumably this is how the unwinder distinguishes epilogue jumps from
in-function control flow.

Also normalize the way we place "## TAILCALL" comments on such jumps.

llvm-svn: 227611
2015-01-30 21:03:31 +00:00
Colin LeMahieu 16f5e56703 [Hexagon] Adding vector multiplies. Cleaning up tests.
llvm-svn: 227609
2015-01-30 20:56:54 +00:00
Yunzhong Gao 4cb1a8e52b Remove the preverify pass from the documentation now that it has been removed
since r199487.

llvm-svn: 227608
2015-01-30 20:51:09 +00:00
Colin LeMahieu b84ec02296 [Hexagon] Adding XTYPE/COMPLEX instructions and cleaning up tests.
llvm-svn: 227607
2015-01-30 20:08:37 +00:00
Chad Rosier b23c4dd3a4 [AArch64] Make AArch64A57FPLoadBalancing output stable.
Add tie breaker to colorChainSet() sort so that processing order doesn't
depend on std::set order, which depends on pointer order, which is
unstable from run to run.

No test case as this is nearly impossible to reproduce.

Phabricator Review: http://reviews.llvm.org/D7265
Patch by Geoff Berry <gberry@codeaurora.org>!

llvm-svn: 227606
2015-01-30 19:55:40 +00:00
Adrian Prantl 133e102b8f Remove a redundant dyn_cast.
llvm-svn: 227605
2015-01-30 19:42:59 +00:00
Adrian Prantl 3e2659eb92 Inliner: Use replaceDbgDeclareForAlloca() instead of splicing the
instruction and generalize it to optionally dereference the variable.
Follow-up to r227544.

llvm-svn: 227604
2015-01-30 19:37:48 +00:00
Saleem Abdulrasool 70fe588c88 ARM: further correct .fpu directive handling
If the original FPU specification involved a restricted VFP unit (d16), ensure
that we reset the functionality when we encounter a new FPU type.  In
particular, if the user specified vfpv3-d16, but switched to a VFPv3 (which has
32 double precision registers), we would fail to reset the D16 feature, and
treat it as being equivalent to vfpv3-d16.

llvm-svn: 227603
2015-01-30 19:35:18 +00:00
Renato Golin e7c2b386f1 Revert "Add missing test from r227488"
This reverts commit r227489, since this is the real one failing the bots.

llvm-svn: 227602
2015-01-30 19:25:23 +00:00
Renato Golin a4b72399b2 Revert "Revert "Matching ARM change for r227481: DebugInfo: Teach Fast ISel to respect the debug location of comparisons in jumps.""
This reverts commit r227600, since that reverted the wrong comit. Sorry.

llvm-svn: 227601
2015-01-30 19:25:20 +00:00
Renato Golin 0c9b51c16b Revert "Matching ARM change for r227481: DebugInfo: Teach Fast ISel to respect the debug location of comparisons in jumps."
This reverts commit r227488 as it was failing ARM bots.

llvm-svn: 227600
2015-01-30 19:18:58 +00:00
Alexey Samsonov 5ce244889c Fixup gold-plugin after r227576.
llvm-svn: 227599
2015-01-30 19:14:04 +00:00
Colin LeMahieu 21fbc94777 [Hexagon] Adding XTYPE/ALU vector instructions. Organizing test files.
llvm-svn: 227598
2015-01-30 19:13:26 +00:00
Saleem Abdulrasool 07b7c03805 ARM: improve caret diagnostics for invalid FPU name
In the case of an invalid FPU name, place the caret at the name rather than FPU
directive.

llvm-svn: 227595
2015-01-30 18:42:10 +00:00
Zachary Turner 42b1fb9253 Fix lli after the DebugInfo move.
llvm-svn: 227594
2015-01-30 18:42:03 +00:00
Filipe Cabecinhas fcd044b692 Check bit widths before trying to get a type.
Added a test case for it.
Also added run lines for the test case in r227566.

Bugs found with afl-fuzz

llvm-svn: 227589
2015-01-30 18:13:50 +00:00
Colin LeMahieu 709c0a16bb [Hexagon] Adding a number of vector load variants and organizing tests.
llvm-svn: 227588
2015-01-30 18:09:44 +00:00
Zachary Turner 6037dcfb8b Really really don't build llvm-pdbdump on MSVC < 2013.
I thought it was enough to just not add the tool subdirectory,
but apparently I need to explicitly mark it ignore.

llvm-svn: 227587
2015-01-30 18:08:05 +00:00
Zachary Turner 82af9438d0 Move DebugInfo to DebugInfo/DWARF.
In preparation for adding PDB support to LLVM, this moves the
DWARF parsing code to its own subdirectory under DebugInfo, and
renames LLVMDebugInfo to LLVMDebugInfoDWARF.

This is purely a mechanical / build system change.

Differential Revision: http://reviews.llvm.org/D7269
Reviewed by: Eric Christopher

llvm-svn: 227586
2015-01-30 18:07:45 +00:00
Saleem Abdulrasool 206d1160ce ARM: correct handling of .fpu directive
The FPU directive permits the user to switch the target FPU, enabling
instructions that would be otherwise unavailable.  However, when configuring the
new subtarget features, we would not enable the implied functions for newer
FPUs.  This would result in invalid rejection of valid input.  Ensure that we
inherit the implied FPU functionality when enabling newer versions of the FPU.
Fortunately, these are mostly hierarchical, unlike the CPUs.

Addresses PR22395.

llvm-svn: 227584
2015-01-30 17:58:25 +00:00
Sanjay Patel e4ca47875f tidy up; NFC
llvm-svn: 227582
2015-01-30 16:58:58 +00:00
Chandler Carruth 1efa12d6d8 [PM] Sink the population of the pass manager with target-specific
analyses back into the LTO code generator.

The pass manager builder (and the transforms library in general)
shouldn't be referencing the target machine at all.

This makes the LTO population work like the others -- the data layout
and target transform info need to be pre-populated.

llvm-svn: 227576
2015-01-30 13:33:42 +00:00
Chandler Carruth 6b1aa9be6a Fix a warning introduced by r227557 due to a default label in a fully
covering switch.

llvm-svn: 227575
2015-01-30 13:30:43 +00:00
NAKAMURA Takumi 788550783a [Cygming] Seek also chkstk_ms, or JIT fails with DLL builds. It is fixup for r227519.
llvm-svn: 227574
2015-01-30 13:01:19 +00:00
NAKAMURA Takumi 3f47d81744 Regenerate configure since r227090.
llvm-svn: 227573
2015-01-30 13:01:00 +00:00
Toma Tabacu 8f6603a2dc [mips] Manually replace JAL pseudo-instructions with their JALR equivalent, instead of using InstAlias.
Summary:
This is needed by the .cprestore assembler directive.

This directive needs to be able to insert an LW instruction after every JALR replacement of a JAL pseudo-instruction
(and never after a JALR which has NOT been a result of a pseudo-instruction replacement).

The problem with using InstAlias for these is that after it replaces the pseudo-instruction, we can't find out if the resulting JALR instruction
was generated by an InstAlias or not, so we don't know whether or not to insert our LW instruction.

By replacing it manually, we know when the pseudo-instruction replacement happens and we can insert the LW instruction correctly.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: emaste, llvm-commits

Differential Revision: http://reviews.llvm.org/D5601

llvm-svn: 227568
2015-01-30 11:18:50 +00:00
Filipe Cabecinhas d0858e1037 [bitcode reader] Fix an assert on invalid type tables
Bug found with afl-fuzz

llvm-svn: 227566
2015-01-30 10:57:58 +00:00
NAKAMURA Takumi 9469a592ba Introduce llvm/test/LTO/X86. LTO tests may be assumed as target-specific.
llvm-svn: 227564
2015-01-30 10:09:26 +00:00
NAKAMURA Takumi c05ebb424b Introduce llvm/test/LTO/ARM for arm-specific LTO test(s).
llvm-svn: 227563
2015-01-30 09:53:37 +00:00
Owen Anderson 441b7ac9dc Change a very hot piece of code in TableGen's register unit computations to use bit vectors rather than arrays.
For target descriptions with very large and very dense register files, TableGen
can take an extremely long time to run.  This change makes a dent in that (~15%
in my measurements) by accelerating the single hottest operation with better data
structures.

I believe there's still a lot of room to make this even faster with more global
changes that require replacing some of the existing datastructures in this area
with bit vectors, but that's a more involved change and I wanted to get this
simpler improvement in first.

llvm-svn: 227562
2015-01-30 09:05:49 +00:00