26c328d734
Add a custom safepoint method, in order for language implementers to decide which machine instruction gets to be a safepoint.
...
llvm-svn: 144399
2011-11-11 18:32:52 +00:00
a90cb76489
Move X86 specific test in X86 directory.
...
llvm-svn: 144395
2011-11-11 18:13:19 +00:00
a39794b029
Move X86 specific test in X86 directory.
...
llvm-svn: 144394
2011-11-11 18:10:38 +00:00
c391f7ff64
Remove FIXME comment that should have been removed with r144351.
...
llvm-svn: 144392
2011-11-11 17:34:14 +00:00
089cc53232
allow non-device function calls in PTX when natively handling device-side printf
...
llvm-svn: 144388
2011-11-11 14:45:12 +00:00
80cd65bfa9
add rules in tabgen for PTX COPY_ADDRESS of frameindex
...
llvm-svn: 144387
2011-11-11 14:45:06 +00:00
f554228d82
Clients are responsible for initializing the targets, remove it from the disassembler API.
...
This will break users of the LLVMCreateDisasm API (not that I know of any). They have to call the
LLVMInitializeAll* functions from llvm-c/Target.h themselves now. edis' C API in all its horribleness
should be unaffected.
llvm-svn: 144385
2011-11-11 13:20:40 +00:00
48b5bbffed
Remove the unnecessary dependency on libARMCodeGen from libARMDisassembler.
...
llvm-svn: 144384
2011-11-11 12:39:41 +00:00
1cc805c058
Remove the unnecessary dependency on libMBlazeCodeGen from libMBlazeDisassembler.
...
llvm-svn: 144383
2011-11-11 12:39:35 +00:00
ea28a34c43
Add lowering for AVX2 shift instructions.
...
llvm-svn: 144380
2011-11-11 07:39:23 +00:00
e19b0a9eb8
Rename variables to avoid confusion. No functionallity change intended.
...
llvm-svn: 144377
2011-11-11 06:27:41 +00:00
7ddd63ce4e
Add support for using immediates with select instructions.
...
rdar://10412592
llvm-svn: 144376
2011-11-11 06:20:39 +00:00
4a63d1c0f0
Do not try to detect DAG combine patterns for integer multiply-add/sub if value
...
type is not i32. MIPS does not have 64-bit integer multiply-add/sub
instructions.
llvm-svn: 144373
2011-11-11 04:18:21 +00:00
21cbc25bbb
64-bit atomic instructions.
...
llvm-svn: 144372
2011-11-11 04:14:30 +00:00
9189d7127f
Modify LowerFRAMEADDR. Use 64-bit register FP_64 when ABI is N64.
...
llvm-svn: 144371
2011-11-11 04:11:56 +00:00
4bdfec57ba
Add 64-bit versions of LEA_ADDiu and DynAlloc. Modify LowerDYNAMIC_STACKALLOC.
...
llvm-svn: 144370
2011-11-11 04:06:38 +00:00
0009dc2088
64-bit versions of jal, jalr and bal.
...
llvm-svn: 144368
2011-11-11 04:03:54 +00:00
11521863da
Emit Mips64's sequence of instructions that set global register in prologue.
...
llvm-svn: 144367
2011-11-11 04:00:29 +00:00
aa1f4c7986
Fix printing of MCSymbolRegExpr. Needs three closing parentheses for
...
VK_Mips_GPOFF_HI/LO.
llvm-svn: 144366
2011-11-11 03:58:36 +00:00
c4a001478c
Make sure to expand SIGN_EXTEND_INREG for NEON vectors. PR11319, round 3.
...
llvm-svn: 144361
2011-11-11 03:16:38 +00:00
0a917b7ad4
Initialize variable.
...
llvm-svn: 144360
2011-11-11 03:16:32 +00:00
023ede5649
When loading a value, treat an i1 as an i8.
...
llvm-svn: 144356
2011-11-11 02:38:59 +00:00
c12c211c44
If we have a DIE with an AT_specification use that instead of the normal
...
addr DIE when adding to the dwarf accelerator tables.
llvm-svn: 144354
2011-11-11 01:55:22 +00:00
0a309292c4
Get rid of an optimization in SCCP which appears to have many issues. Specifically, it doesn't handle many cases involving undef correctly, and it is missing other checks which
...
lead to it trying to re-mark a value marked as a constant with a different value. It also appears to trigger very rarely.
Fixes PR11357.
llvm-svn: 144352
2011-11-11 01:16:15 +00:00
70976ad9c2
Reenable compact unwinding now that <rdar://problem/10430076> is fixed.
...
llvm-svn: 144351
2011-11-11 01:03:50 +00:00
8df8204554
If we have to reset the calculation of the compact encoding, then also reset the
...
"saved register" index.
<rdar://problem/10430076>
llvm-svn: 144350
2011-11-11 00:59:14 +00:00
2a3503e061
Add support for using MVN to materialize negative constants.
...
rdar://10412592
llvm-svn: 144348
2011-11-11 00:36:21 +00:00
f311655e3f
Disable compact unwind generation until I can solve the codegen problems.
...
llvm-svn: 144346
2011-11-11 00:28:42 +00:00
f258ad81c0
llvm-build: Add --configure-target-def-file option.
...
- Can be used to generate the substitution values we currently use for the various target related .def files.
llvm-svn: 144345
2011-11-11 00:24:00 +00:00
6d617b48c7
LLVMBuild: Add explicit information on whether targets define an assembly printer, assembly parser, or disassembler.
...
llvm-svn: 144344
2011-11-11 00:23:56 +00:00
d9a9be269c
Thumb2 ldm/stm updating w/ one register in the list are LDR/STR.
...
rdar://10429490
llvm-svn: 144338
2011-11-10 23:58:34 +00:00
afad053141
ARM let processInstruction() tranforms chain.
...
llvm-svn: 144337
2011-11-10 23:42:14 +00:00
5e515797b6
Add blurb for VMKit.
...
llvm-svn: 144336
2011-11-10 23:37:56 +00:00
a2193ab418
build/Make: llvm-config-2 needs to use EXEEXT, since it is an actual executable
...
now.
llvm-svn: 144335
2011-11-10 23:33:20 +00:00
eb3179e57a
Fix typo.
...
llvm-svn: 144334
2011-11-10 23:33:18 +00:00
9bded9dc24
Thumb2 parsing for push/pop w/ hi registers in the reglist.
...
rdar://10130228.
llvm-svn: 144331
2011-11-10 23:17:11 +00:00
a113eb0205
Thumb1 diagnostics for reglist on PUSH/POP fix.
...
Was not checking the first register in the register list.
llvm-svn: 144329
2011-11-10 23:01:27 +00:00
105c7edf7c
git: Add tools/lldb to the ignore list.
...
llvm-svn: 144328
2011-11-10 22:55:50 +00:00
79278365d3
Check in getOrCreateSubprogramDIE if a declaration exists and if so output
...
it first.
This is a more general fix to pr11300.
llvm-svn: 144324
2011-11-10 22:34:29 +00:00
86660ab0b0
build/Make: Try to switch over to llvm-config-2 again, now that I've cleaned up
...
some more of the explicit dependencies. I'm staging things more slowly this time
in case there is more unanticipated fallout.
llvm-svn: 144323
2011-11-10 22:11:04 +00:00
5a5ce63742
Thumb MUL assembly parsing for 3-operand form.
...
Get the source register that isn't tied to the destination register correct,
even when the assembly source operand order is backwards.
rdar://10428630
llvm-svn: 144322
2011-11-10 22:10:12 +00:00
085f6f2af1
build/MBlazeDisassembler: Some compilers may generate an MBlaze disassembler
...
that depends on MBlazeCodeGen. This is a layering violation that should really
be fixed.
llvm-svn: 144321
2011-11-10 22:00:37 +00:00
b27317f7dd
build/MCDisassembler: Fix required libraries list of MCDisassembler to use
...
all-targets instead of an explicit list.
llvm-svn: 144320
2011-11-10 22:00:34 +00:00
66b37db641
Make types and namespaces take multiple DIEs for the accelerator tables
...
as well.
llvm-svn: 144319
2011-11-10 21:47:55 +00:00
9304ea4306
Remove a really ancient line from the default 'make clean' rule that attempts
...
to delete core files. This causes a warning in clang/lib/StaticAnalyzer on
case insensitive filesystems, since it contains a "Core" directory. Since this
is pointless anyway, just zap it.
llvm-svn: 144317
2011-11-10 21:12:28 +00:00
d1762e00e2
When in ARM mode, LDRH/STRH require special handling of negative offsets.
...
For correctness, disable this for now.
rdar://10418009
llvm-svn: 144316
2011-11-10 21:09:49 +00:00
42ba6286b6
ARM .thumb_func directive for quoted symbol names.
...
Use the getIdentifier() method of the token, not getString(), otherwise
we keep the quotes as part of the symbol name, which we don't want.
rdar://10428015
llvm-svn: 144315
2011-11-10 20:48:53 +00:00
3a9d77f4c1
test commit undo
...
llvm-svn: 144314
2011-11-10 20:39:51 +00:00
1aff5b237b
test commit redux
...
llvm-svn: 144313
2011-11-10 20:23:28 +00:00
a4237c380e
Fixed bug in DeadStoreElimination commit r144239
...
Size of data being pointed to wasn't always being checked so some small writes were killing big writes
Fixes <rdar://problem/10426753>
llvm-svn: 144312
2011-11-10 20:22:08 +00:00
6d3eeec068
random notes, llvm-gcc is gone, fix a few broken tags.
...
llvm-svn: 144311
2011-11-10 20:15:40 +00:00
933b43f188
Revert r144300 "llvm-config: Replace with C++ version (was llvm-config-2).",
...
which didn't appear ready for prime time.
llvm-svn: 144309
2011-11-10 19:59:35 +00:00
b9848b2115
undo test commit
...
llvm-svn: 144308
2011-11-10 19:58:22 +00:00
f0f05dfaf6
test commit
...
llvm-svn: 144307
2011-11-10 19:58:03 +00:00
e288793e44
Move type handling to make sure we get all created types that aren't
...
forward decls and have names into the dwarf accelerator types table.
llvm-svn: 144306
2011-11-10 19:52:58 +00:00
d9843b34e6
Rework adding function names to the dwarf accelerator tables, allow
...
multiple dies per function and support C++ basenames.
llvm-svn: 144304
2011-11-10 19:25:34 +00:00
c5c49466a1
Add additional checking to ensure that MachineMemOperands are never set to null, which can happen in weird circumstances where target intrinsic hooks are implemented incorrectly.
...
llvm-svn: 144303
2011-11-10 19:25:09 +00:00
c14871cc67
ARM assembly parsing for LSR/LSL/ROR(immediate).
...
More of rdar://9704684
llvm-svn: 144301
2011-11-10 19:18:01 +00:00
166c804893
llvm-config: Replace with C++ version (was llvm-config-2).
...
llvm-svn: 144300
2011-11-10 18:49:59 +00:00
f5b9658a25
llvm-config-2: Use USEDLIBS directly instead of LINK_COMPONENTS, which will
...
require this tool to resolve (currently).
llvm-svn: 144299
2011-11-10 18:49:50 +00:00
a294c549ca
Release notes for DragonEgg.
...
llvm-svn: 144298
2011-11-10 18:44:29 +00:00
61db5a59f7
ARM assembly parsing for ASR(immediate).
...
Start of rdar://9704684
llvm-svn: 144293
2011-11-10 16:44:55 +00:00
b538095011
build: Rename CBackend and CppBackend libraries to have CodeGen suffix, for
...
consistency with other targets.
llvm-svn: 144292
2011-11-10 15:35:14 +00:00
fe999b4799
llvm-config-2: Fix thinko in maintenance of visited component set.
...
llvm-svn: 144291
2011-11-10 14:53:23 +00:00
270354100a
test/CodeGen/X86/lsr-loop-exit-cond.ll: Try to appease linux and freebsd bots to specify explicit -mtriple=x86_64-darwin.
...
I guess it expects -relocation-model=pic.
llvm-svn: 144290
2011-11-10 14:18:59 +00:00
d33b2d6b7a
Use a bigger hammer to fix PR11314 by disabling the "forcing two-address
...
instruction lower optimization" in the pre-RA scheduler.
The optimization, rather the hack, was done before MI use-list was available.
Now we should be able to implement it in a better way, perhaps in the
two-address pass until a MI scheduler is available.
Now that the scheduler has to backtrack to handle call sequences. Adding
artificial scheduling constraints is just not safe. Furthermore, the hack
is not taking all the other scheduling decisions into consideration so it's just
as likely to pessimize code. So I view disabling this optimization goodness
regardless of PR11314.
llvm-svn: 144267
2011-11-10 07:43:16 +00:00
0a2f797dec
AVX2: Add variable shift from memory.
...
Note: These patterns only works in some cases because
many times the load sd node is bitcasted from a load
node of a different type.
llvm-svn: 144266
2011-11-10 06:54:20 +00:00
3fbd094ad9
For immediate encodings of icmp, zero or sign extend first. Then
...
determine if the value is negative and flip the sign accordingly.
rdar://10422026
llvm-svn: 144258
2011-11-10 01:30:39 +00:00
807c6e4e5f
build/Make & CMake: Pass the appropriate --native-target and --enable-targets
...
options to llvm-build, so the all-targets etc. components are defined properly.
llvm-svn: 144255
2011-11-10 01:16:48 +00:00
233c9304a8
llvm-build: Add --native-target and --enable-targets options, and add logic to
...
handle defining the "magic" target related components (like native,
nativecodegen, and engine).
- We still require these components to be in the project (currently in
lib/Target) so that we have a place to document them and hopefully make it
more obvious that they are "magic".
llvm-svn: 144253
2011-11-10 00:50:07 +00:00
79fa1e8891
llvm-build: Split out the validation logic.
...
llvm-svn: 144252
2011-11-10 00:49:58 +00:00
1c04e14447
llvm-build: Change CBackend and CppBackend to not use library_name. This will
...
change the generated library .a file name once we fully switch over, but
simplifies how we treat these targets without requiring more special casing
(since their library group name and the codegen library name currently map to
the same "llvm-config" style component name).
llvm-svn: 144251
2011-11-10 00:49:55 +00:00
82219ad4dc
llvm-build: Add an explicit component type to represent targets.
...
- Gives us a place to hang target specific metadata (like whether the target has a JIT).
llvm-svn: 144250
2011-11-10 00:49:51 +00:00
c83a459937
llvm-build: Tidy up options.
...
llvm-svn: 144249
2011-11-10 00:49:42 +00:00
eef48b6938
Strip old implicit operands after foldMemoryOperand.
...
The TII.foldMemoryOperand hook preserves implicit operands from the
original instruction. This is not what we want when those implicit
operands refer to the register being spilled.
Implicit operands referring to other registers are preserved.
This fixes PR11347.
llvm-svn: 144247
2011-11-10 00:17:03 +00:00
133ccfcc22
Remove this from the CMake build since I erased the file.
...
llvm-svn: 144245
2011-11-10 00:07:22 +00:00
a48485a37f
Tidy up.
...
llvm-svn: 144244
2011-11-10 00:02:33 +00:00
efc349af6c
Remove the old-style ARM disassembler, which is no longer used.
...
llvm-svn: 144243
2011-11-09 23:56:06 +00:00
25bc090170
Thumb2 assembly parsing STMDB w/ optional .w suffix.
...
rdar://10422955
llvm-svn: 144242
2011-11-09 23:44:23 +00:00
2d4055b683
Make sure we correctly unroll conversions between v2f64 and v2i32 on ARM.
...
llvm-svn: 144241
2011-11-09 23:36:02 +00:00
856977cb15
DeadStoreElimination can now trim the size of a store if the end of the store is dead.
...
Currently checks alignment and killing stores on a power of 2 boundary as this is likely
to trim the size of the earlier store without breaking large vector stores into scalar ones.
Fixes <rdar://problem/10140300>
llvm-svn: 144239
2011-11-09 23:07:35 +00:00
47eebcfd66
Fix typo in comment.
...
llvm-svn: 144236
2011-11-09 22:45:04 +00:00
53218b6fcc
Add check so we don't try to perform an impossible transformation. Fixes issue from PR11319.
...
llvm-svn: 144216
2011-11-09 22:25:12 +00:00
2f27fab6ed
The ARM LDRH/STRH instructions use a +/-imm8 encoding, not an imm12.
...
rdar://10418009
llvm-svn: 144213
2011-11-09 21:30:12 +00:00
1938482bfa
AVX2: Add patterns for variable shift operations
...
llvm-svn: 144212
2011-11-09 21:22:13 +00:00
2f70bcdb94
Remove unnecessary include.
...
llvm-svn: 144211
2011-11-09 21:11:02 +00:00
c22f6518b2
Use REs to remove dependencies on the register allocation order.
...
llvm-svn: 144209
2011-11-09 20:06:13 +00:00
302d7ce0ab
Reformat the quote and tag the math stuff with <tt> tags.
...
llvm-svn: 144204
2011-11-09 19:33:56 +00:00
5d9ae5ca23
llvm-config: Drop 'backend' pseudo-component. We don't support/qualify the CBE
...
enough to have this be useful.
llvm-svn: 144202
2011-11-09 19:23:15 +00:00
7b44212e3c
llvm-config-2: Switch to using real library dependency table.
...
- Also, fix a refacto that left extra "all" component in list (this is now
defined in the groups explicitly)
- Reapply of r143879 now that Make should see needed deps.
llvm-svn: 144201
2011-11-09 19:14:51 +00:00
0c7c931dbf
Fix typo.
...
llvm-svn: 144198
2011-11-09 18:53:37 +00:00
83b700977e
build/Make: Fix some missing dependencies on the llvm-build generation step.
...
llvm-svn: 144197
2011-11-09 18:48:22 +00:00
966ed1b698
Add comments.
...
llvm-svn: 144194
2011-11-09 18:16:11 +00:00
635e4efca0
Speculatively revert commit 144124 (djg) in the hope that the 32 bit
...
dragonegg self-host buildbot will recover (it is complaining about object
files differing between different build stages). Original commit message:
Add a hack to the scheduler to disable pseudo-two-address dependencies in
basic blocks containing calls. This works around a problem in which
these artificial dependencies can get tied up in calling seqeunce
scheduling in a way that makes the graph unschedulable with the current
approach of using artificial physical register dependencies for calling
sequences. This fixes PR11314.
llvm-svn: 144188
2011-11-09 14:20:48 +00:00
79135d844d
Add AVX2 support for vselect of v32i8
...
llvm-svn: 144187
2011-11-09 13:21:28 +00:00
6312682b46
Simplify code. No functionality change.
...
llvm-svn: 144186
2011-11-09 13:19:15 +00:00
148db36263
Take advantage of the zero byte in StringMap when emitting dwarf stringpool entries.
...
llvm-svn: 144184
2011-11-09 12:12:04 +00:00
0c48772aaa
Minor fixes in Makefiles for the OCaml bindings:
...
1. Interface files (.mli) are installed before compiled interface
files (.cmi) to preserve timestamp relation.
2. install-meta should use $(OcamlDir) instead of $(ObjDir).
3. Declared some targets as .PHONY.
Patch by Christophe Raffalli.
llvm-svn: 144183
2011-11-09 12:00:39 +00:00
f87a2bef51
Enable execution dependency fix pass for YMM registers when AVX2 is enabled. Add AVX2 logical operations to list of replaceable instructions.
...
llvm-svn: 144179
2011-11-09 09:37:21 +00:00
862130c61a
unittests/MultiJITTest.cpp: Tweak how to check symbol value for Win32 --enable-shared.
...
getPointerToNamedFunction might be indirect jump on Win32 --enable-shared.
FF 25 <disp32>: jmp *(pointer to IAT)
llvm-svn: 144178
2011-11-09 08:30:43 +00:00
c9eb09d3b8
Add instruction selection for AVX2 integer comparisons.
...
llvm-svn: 144176
2011-11-09 08:06:13 +00:00
8c8a431057
Add AVX2 instruction lowering for add, sub, and mul.
...
llvm-svn: 144174
2011-11-09 07:28:55 +00:00
0485d51a76
Don't forget to check FlagNW when determining whether an AddRecExpr will wrap
...
or not. Patch by Brendon Cahoon!
llvm-svn: 144173
2011-11-09 07:11:37 +00:00
fa4520968b
Remove extra ';'
...
llvm-svn: 144172
2011-11-09 06:20:49 +00:00
5223a57533
Remove the pubnames section, no one consumes it.
...
llvm-svn: 144169
2011-11-09 05:24:07 +00:00
b3c8febd1e
Enhance verifyLoop so that it can reliably verify that every block in a loop is reachable from the loop header.
...
llvm-svn: 144166
2011-11-09 04:16:01 +00:00
a6db70b049
Use isa<> instead of dyn_cast<> as suggested by Nick.
...
Should've read the patch a bit closer, sorry.
llvm-svn: 144164
2011-11-09 03:26:50 +00:00
595d419427
Add support for encoding immediates in icmp and fcmp. Hopefully, this will
...
remove a fair number of unnecessary materialized constants.
rdar://10412592
llvm-svn: 144163
2011-11-09 03:22:02 +00:00
94307f6ba6
Hide cpu name checking in ARMSubtarget.
...
llvm-svn: 144154
2011-11-09 01:57:03 +00:00
3dc89c9768
Collapse DomainValues across loop back-edges.
...
During the initial RPO traversal of the basic blocks, remember the ones
that are incomplete because of back-edges from predecessors that haven't
been visited yet.
After the initial RPO, revisit all those loop headers so the incoming
DomainValues on the back-edges can be properly collapsed.
This will properly fix execution domains on software pipelined code,
like the included test case.
llvm-svn: 144151
2011-11-09 01:06:56 +00:00
53ec977cd2
Link to the live DomainValue after merging.
...
When merging two uncollapsed DomainValues, place a link to the active
DomainValue from the passive DomainValue. This allows old stale
references to the passive DomainValue to be updated to point to the
active DomainValue.
The new resolve() function finds the active DomainValue and updates the
pointer.
This change makes old live-out lists more useful since they may contain
uncollapsed DomainValues that have since been merged into other
DomainValues.
llvm-svn: 144149
2011-11-09 00:06:18 +00:00
d5930ca99d
Object/COFF: Fix PE reading.
...
llvm-svn: 144148
2011-11-08 23:34:07 +00:00
b7e44a3f5f
Track reference count independently from clear().
...
This allows clear() to be called on a DomainValue with references.
llvm-svn: 144147
2011-11-08 23:26:00 +00:00
d5edb3847a
Properly handle Mips MC relocations and lower cpload and cprestore macros to MCInsts.
...
Patch by Jack Carter.
llvm-svn: 144139
2011-11-08 22:26:47 +00:00
39674fc008
Emit the compact unwind *if* we have a compact unwind encoding.
...
*headdesk*
llvm-svn: 144138
2011-11-08 22:23:43 +00:00
5d08293999
Call release() directly when cleaning up the remaining DomainValues.
...
There is no need to involve the LiveRegs array and kill() any longer.
llvm-svn: 144133
2011-11-08 22:05:17 +00:00
9e338bb0f3
Rename all methods to follow style guide.
...
No functional change.
llvm-svn: 144132
2011-11-08 21:57:47 +00:00
1438e191bd
Handle reference counts in one function: release().
...
This new function will decrement the reference count, and collapse a
domain value when the last reference is gone.
This simplifies DomainValue reference counting, and decouples it from
the LiveRegs array.
llvm-svn: 144131
2011-11-08 21:57:44 +00:00
08a558eeef
Also add the linkage name to the name accelerator tables if it exists
...
and is different than the normal name.
llvm-svn: 144130
2011-11-08 21:56:23 +00:00
a4bc6171a5
Add a hack to the scheduler to disable pseudo-two-address dependencies in
...
basic blocks containing calls. This works around a problem in which
these artificial dependencies can get tied up in calling seqeunce
scheduling in a way that makes the graph unschedulable with the current
approach of using artificial physical register dependencies for calling
sequences. This fixes PR11314.
llvm-svn: 144124
2011-11-08 21:29:06 +00:00
c3770ac687
Add workaround for Cortex-M3 errata 602117 by replacing ldrd x, y, [x] with ldm or ldr pairs.
...
llvm-svn: 144123
2011-11-08 21:21:09 +00:00
0439cfc41f
ARMFastISel doesn't support thumb1. Rename isThumb to isThumb2 to reflect this.
...
No functional change intended.
llvm-svn: 144122
2011-11-08 21:12:00 +00:00
0bae8b2cfb
Fix code to match comment. Fixes PR11340, a regression from r143209.
...
llvm-svn: 144121
2011-11-08 21:08:02 +00:00
1205881820
Clear old DomainValue after merging.
...
The old value may still be referenced by some live-out list, and we
don't wan't to collapse those instructions twice.
This fixes the "Can only swizzle VMOVD" assertion in some armv7 SPEC
builds.
<rdar://problem/10413292>
llvm-svn: 144117
2011-11-08 20:57:04 +00:00
5ca95bc56f
MC/COFF: Correctly emit the size of an empty string table.
...
llvm-svn: 144111
2011-11-08 19:52:32 +00:00
9ee220915b
LICM pass now understands invariant load metadata. Nothing generates this yet so it will currently never get used in real tests
...
llvm-svn: 144107
2011-11-08 19:30:00 +00:00
970771c0e8
Add the base ObjC method name to the names lookup table as well.
...
llvm-svn: 144105
2011-11-08 19:16:01 +00:00
fbbbd04705
Adding test for machine-licm operating on invariant load instructions
...
llvm-svn: 144104
2011-11-08 19:06:53 +00:00
b85fcd07df
Lower mem-ops to unaligned i32/i16 load/stores on ARM where supported.
...
Add support for trimming constants to GetDemandedBits. This fixes some funky
constant generation that occurs when stores are expanded for targets that don't
support unaligned stores natively.
llvm-svn: 144102
2011-11-08 18:56:23 +00:00
82cd9e81fc
Added invariant field to the DAG.getLoad method and changed all calls.
...
When this field is true it means that the load is from constant (runt-time or compile-time) and so can be hoisted from loops or moved around other memory accesses
llvm-svn: 144100
2011-11-08 18:42:53 +00:00
54ce295d37
A few more places where we can avoid multiple size queries.
...
llvm-svn: 144099
2011-11-08 18:38:40 +00:00
f1932270c0
Don't evaluate Data.size() on every iteration.
...
llvm-svn: 144095
2011-11-08 18:22:25 +00:00
71133fe9c6
This patch handles unaligned loads and stores in Mips JIT. Mips backend
...
implements unaligned loads and stores with assembler macro-instructions
ulw, usw, ulh, ulhu, ush, and this patch emits corresponding instructions
instead of these macros. Since each unaligned load/store is expanded
into two corresponding loads/stores where offset for second load/store is
modified by +3 (for words) or +1 (for halfwords).
Patch by Petar Jovanovic and Sasa Stankovic.
llvm-svn: 144081
2011-11-08 12:47:11 +00:00
4fed9e3af4
PathProfiling.c: Get rid of using "inline". We may expect compiler shall optimize out "static" scope w/o "inline".
...
llvm-svn: 144080
2011-11-08 12:03:14 +00:00
5ded03d873
Fix the printing of constants. Patch by Stepan Dyatkovskiy!
...
llvm-svn: 144079
2011-11-08 06:53:04 +00:00
b33bd11c71
Add Eero to the list of external projects.
...
llvm-svn: 144076
2011-11-08 05:22:54 +00:00
05aa1a42c3
PPCInstrInfo.cpp: Fix one "unused" warning.
...
llvm-svn: 144071
2011-11-08 04:00:07 +00:00
bb8a523c62
runtime/libprofile/PathProfiling.c: Use __inline__ to appease clang -std=gnu89 -pedantic.
...
FIXME: Should configure detect one?
llvm-svn: 144070
2011-11-08 03:54:40 +00:00
d8d583f766
test/CodeGen/X86/vec_shuffle-39.ll: Add explicit -mtriple=x86_64-linux. Passing packed value is not compatible on Win32 x64.
...
llvm-svn: 144068
2011-11-08 03:46:39 +00:00
ac9ef21f02
test/CodeGen/X86/vec_shuffle-38.ll: Relax expression for Win32 x64.
...
llvm-svn: 144067
2011-11-08 03:46:32 +00:00
33dac06330
test/CodeGen/X86/vec_shuffle.ll: Add explicit -mtriple=i686-linux. We may see some suboptimal frame (%ebp) emission on certain hosts. Possible [PR11031]
...
llvm-svn: 144066
2011-11-08 03:46:25 +00:00
6f84fed675
Make sure to mark vector extload's as expand on ARM. Fixes PR11319.
...
llvm-svn: 144057
2011-11-08 01:43:53 +00:00
f2a9bd4b1e
Add a bunch of calls to RemoveDeadNode in LegalizeDAG, so legalization doesn't get confused by CSE later on. Fixes PR11318.
...
Re-commit of r144034, with an extra fix so that RemoveDeadNode doesn't blow up.
llvm-svn: 144055
2011-11-08 01:25:24 +00:00
1654bb22ca
Cleanup the formatting.
...
llvm-svn: 144053
2011-11-08 00:32:45 +00:00
91b56e0390
Add x86 isel logic and patterns to match movlps from clang generated IR for _mm_loadl_pi(). rdar://10134392, rdar://10050222
...
llvm-svn: 144052
2011-11-08 00:31:58 +00:00
2a917595d2
Convert to the new EH model.
...
llvm-svn: 144050
2011-11-08 00:23:01 +00:00
2197b015c8
Convert to the new EH model.
...
llvm-svn: 144049
2011-11-08 00:17:28 +00:00
9b7942a543
Convert tests to the new EH model.
...
llvm-svn: 144048
2011-11-08 00:09:27 +00:00
5de1bea5c9
Enable support for returning i1, i8, and i16. Nothing special todo as it's the
...
callee's responsibility to sign or zero-extend the return value. The additional
test case just checks to make sure the calls are selected (i.e., -fast-isel-abort
doesn't assert).
llvm-svn: 144047
2011-11-08 00:03:32 +00:00
2dc40434aa
Added missing newline
...
llvm-svn: 144046
2011-11-08 00:03:24 +00:00
a35a5295e0
Revert r144034 while I try to track down a crash.
...
llvm-svn: 144044
2011-11-07 23:53:20 +00:00
478f58cad4
This code is dead, what with the new EH model and the auto-upgraders in place.
...
Delete!
llvm-svn: 144043
2011-11-07 23:36:48 +00:00
9279f9efbc
Fix test for Windows as well.
...
llvm-svn: 144038
2011-11-07 23:10:43 +00:00
a70e9417fb
Kill and collapse outstanding DomainValues.
...
DomainValues that are only used by "don't care" instructions are now
collapsed to the first possible execution domain after all basic blocks
have been processed. This typically means the PS domain on x86.
For example, the vsel_i64 and vsel_double functions in sse2-blend.ll are
completely collapsed to the PS domain instead of containing a mix of
execution domains created by isel.
llvm-svn: 144037
2011-11-07 23:08:21 +00:00
7a4be01ac8
InstCombine now optimizes vector udiv by power of 2 to shifts
...
Fixes r8429
llvm-svn: 144036
2011-11-07 23:04:49 +00:00
55a86d32d3
Add a bunch of calls to RemoveDeadNode in LegalizeDAG, so legalization doesn't get confused by CSE later on. Fixes PR11318.
...
llvm-svn: 144034
2011-11-07 22:51:10 +00:00
5139dadd50
Add all completed and named types to the dwarf type accelerator tables.
...
llvm-svn: 144027
2011-11-07 22:11:16 +00:00
fc1935c8bf
Add ISPC to the external projects list.
...
llvm-svn: 144026
2011-11-07 22:05:17 +00:00
68e197e151
Use a reverse post order instead of a DFS order.
...
The enterBasicBlock() function is combining live-out values from
predecessor blocks. The RPO traversal means that more predecessors
have been visited when that happens, only back-edges are missing.
llvm-svn: 144025
2011-11-07 21:59:29 +00:00
ff2edf1499
Move the hash function to using and taking a StringRef.
...
llvm-svn: 144024
2011-11-07 21:49:35 +00:00
b6205d8b49
Simple destructor to delete the hash data we created earlier.
...
llvm-svn: 144023
2011-11-07 21:49:28 +00:00
fa75530ff0
Allow i1 to be promoted to i32 for ARM AAPCS and AAPCS-VFP calling convention as well.
...
llvm-svn: 144021
2011-11-07 21:43:40 +00:00
736cf46c3e
Extract two methods. No functional change.
...
llvm-svn: 144020
2011-11-07 21:40:27 +00:00
2216f73676
Various Mips64 floating point instruction patterns.
...
llvm-svn: 144019
2011-11-07 21:38:58 +00:00
b2d37760a2
Add definition of the base class for floating point comparison instructions
...
and add Mips64's version too.
llvm-svn: 144018
2011-11-07 21:37:33 +00:00
81c14002dc
Add code needed for copying between 64-bit integer and floating pointer
...
registers.
llvm-svn: 144017
2011-11-07 21:35:45 +00:00
1537e297e1
Add definitions of 64-bit instructions which move data between integer and
...
floating pointer registers.
llvm-svn: 144016
2011-11-07 21:32:58 +00:00
44dcc589b3
MBB doesn't need to be a class member.
...
llvm-svn: 144015
2011-11-07 21:23:42 +00:00
baffa7d35d
Fix pass name after the source was moved.
...
llvm-svn: 144014
2011-11-07 21:23:39 +00:00
69d57cf9c4
Simplify some uses of utohexstr.
...
As a side effect hex is printed lowercase instead of uppercase now.
llvm-svn: 144013
2011-11-07 21:00:59 +00:00
03d73e47b4
Simplify code. No functionality change.
...
llvm-svn: 144012
2011-11-07 21:00:43 +00:00
7f076cb6cc
Fix test for Linux.
...
llvm-svn: 144003
2011-11-07 20:47:23 +00:00
7496461f44
Make sure we don't insert instructions before a landingpad instruction.
...
<rdar://problem/10405911>
llvm-svn: 144000
2011-11-07 19:38:34 +00:00
0241308954
Expand V_SET0 to xorps by default.
...
The xorps instruction is smaller than pxor, so prefer that encoding.
The ExecutionDepsFix pass will switch the encoding to pxor and xorpd
when appropriate.
llvm-svn: 143996
2011-11-07 19:15:58 +00:00
2b8d1f163f
Add definition of 64-bit load upper immediate.
...
llvm-svn: 143994
2011-11-07 19:10:49 +00:00
2f4480046b
Include RegSaveAreaSize in the computation of stack size.
...
llvm-svn: 143993
2011-11-07 19:07:35 +00:00
7bcecd486f
Define functions that get or set the size of area on callee's stack frame which
...
is used to save va_arg or byval arguments passed in registers.
llvm-svn: 143992
2011-11-07 19:06:10 +00:00
d9c2e46cfb
Use array_lengthof to compute the number of iterations of a loop.
...
llvm-svn: 143991
2011-11-07 19:03:40 +00:00
cf7e5b0976
Fix patterns for unaligned 32-bit load. DSLL32 or DSRL32 should be emitted
...
when shift amount is larger than 32.
llvm-svn: 143990
2011-11-07 19:01:49 +00:00
770f0646db
Make the type of shift amount i32 in order to reduce the number of shift
...
instruction definitions.
llvm-svn: 143989
2011-11-07 18:59:49 +00:00
d5c1329078
Add 64-bit to 32-bit trunc pattern.
...
llvm-svn: 143988
2011-11-07 18:57:41 +00:00
988ac00abd
Use StringRef::startswith to do some string comparisons.
...
llvm-svn: 143982
2011-11-07 18:53:23 +00:00
2c5dab541d
Avoid the use of a local temporary for comment twines.
...
llvm-svn: 143974
2011-11-07 18:34:47 +00:00
cc979f9ae6
Allow for the case where the name of the subprogram is "".
...
Fixes a self-host error.
llvm-svn: 143970
2011-11-07 18:10:17 +00:00
7635bb7ae2
Fix llvm-objdump's MachO mode to not depend on the value returned by RelocationRef::getInfo().
...
llvm-svn: 143966
2011-11-07 17:21:36 +00:00
561fac4d4e
Don't introduce custom nodes after legalization in TargetLowering::BuildSDIV()
...
and TargetLowering::BuildUDIV(). Fixes PR11283
llvm-svn: 143964
2011-11-07 17:09:05 +00:00
8c7505f258
Remove unnecessary addition to API. Replace with something much simpler.
...
llvm-svn: 143925
2011-11-07 09:38:42 +00:00
e1c874aa70
Add new files to cmake.
...
llvm-svn: 143924
2011-11-07 09:37:06 +00:00
4996c70034
Add the support code to enable the dwarf accelerator tables. Upcoming patches
...
to fix the types section (all types, not just global types), and testcases.
The code to do the final emission is disabled by default.
llvm-svn: 143923
2011-11-07 09:24:32 +00:00
6e47204b0c
Add a new dwarf accelerator table prototype with the goal of replacing
...
the pubnames and pubtypes tables. LLDB can currently use this format
and a full spec is forthcoming and submission for standardization is planned.
A basic summary:
The dwarf accelerator tables are an indirect hash table optimized
for null lookup rather than access to known data. They are output into
an on-disk format that looks like this:
.-------------.
| HEADER |
|-------------|
| BUCKETS |
|-------------|
| HASHES |
|-------------|
| OFFSETS |
|-------------|
| DATA |
`-------------'
where the header contains a magic number, version, type of hash function,
the number of buckets, total number of hashes, and room for a special
struct of data and the length of that struct.
The buckets contain an index (e.g. 6) into the hashes array. The hashes
section contains all of the 32-bit hash values in contiguous memory, and
the offsets contain the offset into the data area for the particular
hash.
For a lookup example, we could hash a function name and take it modulo the
number of buckets giving us our bucket. From there we take the bucket value
as an index into the hashes table and look at each successive hash as long
as the hash value is still the same modulo result (bucket value) as earlier.
If we have a match we look at that same entry in the offsets table and
grab the offset in the data for our final match.
llvm-svn: 143921
2011-11-07 09:18:42 +00:00
a7b6189071
Expose a way to get the beginning of the dwarf string section.
...
llvm-svn: 143920
2011-11-07 09:18:38 +00:00
6abc9c5aaa
Fix up comment.
...
llvm-svn: 143919
2011-11-07 09:18:35 +00:00
2b4f77350d
Typo.
...
llvm-svn: 143918
2011-11-07 09:18:32 +00:00
a6d409d543
Add AVX2 variable shift instructions and intrinsics.
...
llvm-svn: 143915
2011-11-07 08:26:24 +00:00
ff39be0afc
Add AVX2 VPMOVMASK instructions and intrinsics.
...
llvm-svn: 143904
2011-11-07 03:20:35 +00:00
e122dcbf4a
Add AVX2 VEXTRACTI128 and VINSERTI128 instructions. Fix VPERM2I128 to be qualified with HasAVX2 instead of HasAVX. Mark VINSERTF128 and VEXTRACTF128 as never having side effects.
...
llvm-svn: 143902
2011-11-07 02:00:04 +00:00
620db14aac
Fix accidental edit to __builtin_ia32_vperm2f128_ps256's name
...
llvm-svn: 143901
2011-11-07 00:54:28 +00:00
012d681acd
Fix CRT selection logic when using CMake NMake generator.
...
CMAKE_CONFIGURATION_TYPES is only set on Visual Studio generators. For NMake CMAKE_BUILD_TYPE is used instead.
Patch by EJose Fonseca!
llvm-svn: 143898
2011-11-06 23:37:22 +00:00
f01f1b5cb9
More AVX2 instructions and their intrinsics.
...
llvm-svn: 143895
2011-11-06 23:04:08 +00:00
20baffb257
Replace (Lower|Upper)caseString in favor of StringRef's newest methods.
...
llvm-svn: 143891
2011-11-06 20:37:06 +00:00
Nicolas Geoffray