b7168c270e
Revert commit 93204, since it causes the assembler to barf
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on x86-64 linux with messages like this:
Error: Incorrect register `%r14' used with `l' suffix
llvm-svn: 93242
2010-01-12 17:46:16 +00:00
42b07e9600
Add manual ISD::OR fastisel selection routines. TableGen is no longer autogen them after 93152 and 93191.
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llvm-svn: 93204
2010-01-11 22:59:27 +00:00
99789a7a76
Extend r93152 to work on OR r, r. If the source set bits are known not to overlap, then select as an ADD instead.
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llvm-svn: 93191
2010-01-11 22:03:29 +00:00
40503396da
Eliminate more uses of llvm-as and llvm-dis.
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llvm-svn: 81290
2009-09-08 23:54:48 +00:00
7f0ca9a34c
X86FastISel support for loading and storing values of type i1.
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llvm-svn: 80186
2009-08-27 00:31:47 +00:00
a5b9645c4b
Split the Add, Sub, and Mul instruction opcodes into separate
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integer and floating-point opcodes, introducing
FAdd, FSub, and FMul.
For now, the AsmParser, BitcodeReader, and IRBuilder all preserve
backwards compatability, and the Core LLVM APIs preserve backwards
compatibility for IR producers. Most front-ends won't need to change
immediately.
This implements the first step of the plan outlined here:
http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt
llvm-svn: 72897
2009-06-04 22:49:04 +00:00
638e530509
Add a few more ptrtoint/inttoptr cast tests.
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llvm-svn: 66989
2009-03-13 23:54:51 +00:00
a62e4ab690
Improve FastISel's handling of truncates to i1, and implement
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ptrtoint and inttoptr in X86FastISel. These casts aren't always
handled in the generic FastISel code because X86 sometimes needs
custom code to do truncation and zero-extension.
llvm-svn: 66988
2009-03-13 23:53:06 +00:00
8d8f47d50b
Load from GV stub should be locally CSE'd.
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llvm-svn: 55763
2008-09-04 06:18:33 +00:00
a41ee2974b
Add X86 target hook to implement load (even from GlobalAddress).
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llvm-svn: 55693
2008-09-03 06:44:39 +00:00
897b2380d8
This test crashes on non-x86 host; make SSE explicit.
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Feel free to fix a better way!
llvm-svn: 55456
2008-08-28 01:51:09 +00:00
5ca269e684
Basic FastISel support for floating-point constants.
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llvm-svn: 55401
2008-08-27 01:09:54 +00:00
32635dbfb2
Add support for fast isel of (integer) immediate materialization pattens, and use them to support
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bitcast of constants in fast isel.
llvm-svn: 55325
2008-08-25 20:20:32 +00:00
49e19e906f
Factor out the predicate check code from DAGISelEmitter.cpp
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and use it in FastISelEmitter.cpp, and make FastISel
subtarget aware. Among other things, this lets it work
properly on x86 targets that don't have SSE, where it
successfully selects x87 instructions.
llvm-svn: 55156
2008-08-22 00:20:26 +00:00
46989c637d
Add -mattr=sse2 so this test doesn't fail on non-x86 hosts.
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llvm-svn: 55145
2008-08-21 22:34:25 +00:00
cdf1a276e3
getelementptr doesn't work on x86-64 yet, because it
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has MOV64ri32 and no plain MOV64ri.
llvm-svn: 55126
2008-08-21 17:28:42 +00:00
efb7d2d03d
MVT::getMVT uses iPTR for pointer types, while we need the actual
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intptr_t type in this case. FastISel can now select simple
getelementptr instructions.
llvm-svn: 55125
2008-08-21 17:25:26 +00:00
fe9056584b
Basic fast-isel support for instructions with constant int operands.
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llvm-svn: 55099
2008-08-21 01:41:07 +00:00
eaef5f612a
Add a -march line for this test, and run it on x86-64 too for fun.
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llvm-svn: 55030
2008-08-20 00:56:07 +00:00
b16a7783c5
Add FastISel support for floating-point operations.
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llvm-svn: 55021
2008-08-20 00:23:20 +00:00
a3e4d5a5e1
Add FastISel support for several more binary operators.
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llvm-svn: 55020
2008-08-20 00:11:48 +00:00
065e24709e
Fast-isel is now *minimally* functional. Add a testcase to
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demonstrate the extent of its capabilities. Note that it
only attempts to operate on one of the blocks in this
testcase.
llvm-svn: 55016
2008-08-19 22:37:59 +00:00
Duncan Sands