b2a6b0dbad
Clean up.
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llvm-svn: 31957
2006-11-28 02:25:34 +00:00
20350c4025
Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead
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of opcode and number of operands.
llvm-svn: 31947
2006-11-27 23:37:22 +00:00
539df43e4b
setOperand should not zap the operand list or add implicit operands to an
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instruction. Doing so breaks the FP stackifier, the alpha branch selector
the sparc fpmover.
This fixes PR1012 and CodeGen/X86/fp-stack-compare.ll
llvm-svn: 31876
2006-11-20 17:57:22 +00:00
ebb0357b4c
Minor updates.
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llvm-svn: 31761
2006-11-15 20:54:29 +00:00
77af6ac5e8
- Let MachineInstr ctors add implicit def and use operands. Other operands
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will be inserted before these operands. If the opcode changes (by
setOpcode), the implicit operands are updated as well.
- Added IsKill, IsDead fields to MachineOperand in preparation for changes
that move kill / dead info to MachineInstr's.
llvm-svn: 31711
2006-11-13 23:34:06 +00:00
979bbf48d5
Add methods to add implicit def use operands to a MI.
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llvm-svn: 31675
2006-11-11 10:20:02 +00:00
8c9c6d71ed
Add implicit def / use operands to MachineInstr.
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llvm-svn: 31633
2006-11-10 08:43:01 +00:00
7a7835deb4
be more aggressive about matching identical instructions.
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llvm-svn: 31179
2006-10-25 18:08:14 +00:00
33f5af09e4
implement MachineOperand::isIdenticalTo
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llvm-svn: 31088
2006-10-20 22:39:59 +00:00
2cb238320d
Only call isUse/isDef on register operands
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llvm-svn: 30118
2006-09-05 20:19:27 +00:00
55772ccfd6
Instructions with variable operands (variable_ops) can have a number required
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operands. e.g.
def CALL32r : I<0xFF, MRM2r, (ops GR32:$dst, variable_ops),
"call {*}$dst", [(X86call GR32:$dst)]>;
TableGen should emit operand informations for the "required" operands.
Added a target instruction info flag M_VARIABLE_OPS to indicate the target
instruction may have more operands in addition to the minimum required
operands.
llvm-svn: 28791
2006-06-15 07:22:16 +00:00
0f5c7936e7
Remove a bogus cast.
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llvm-svn: 28492
2006-05-26 08:00:14 +00:00
abdf4d569c
Final pass of minor cleanups for MachineInstr
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llvm-svn: 28110
2006-05-04 19:36:09 +00:00
53af9da363
Remove redundancy and a level of indirection when creating machine operands
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llvm-svn: 28107
2006-05-04 19:14:44 +00:00
469647bf38
Remove and simplify some more machineinstr/machineoperand stuff.
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llvm-svn: 28105
2006-05-04 18:16:01 +00:00
10b71c0d08
Rename MO_VirtualRegister -> MO_Register. Clean up immediate handling.
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llvm-svn: 28104
2006-05-04 18:05:43 +00:00
10d6341618
Move some methods out of MachineInstr into MachineOperand
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llvm-svn: 28102
2006-05-04 17:52:23 +00:00
fef7a2d0f5
There shalt be only one "immediate" operand type!
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llvm-svn: 28099
2006-05-04 17:21:20 +00:00
15c52bda1d
Change "value" in MachineOperand to be a GlobalValue, as that is the only
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thing that can be in it. Remove a dead method.
llvm-svn: 28098
2006-05-04 17:02:51 +00:00
ee64b6b40f
Remove a bunch more dead V9 specific stuff
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llvm-svn: 28094
2006-05-04 01:26:39 +00:00
940cc978ef
Remove a bunch more SparcV9 specific stuff
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llvm-svn: 28093
2006-05-04 01:15:02 +00:00
6e663f1c1e
Remove some more V9-specific stuff.
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llvm-svn: 28092
2006-05-04 00:49:59 +00:00
9f6639b64d
Remove some more unused stuff from MachineInstr that was leftover from V9.
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llvm-svn: 28091
2006-05-04 00:44:25 +00:00
4ca2ea5b43
JumpTable support! What this represents is working asm and jit support for
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x86 and ppc for 100% dense switch statements when relocations are non-PIC.
This support will be extended and enhanced in the coming days to support
PIC, and less dense forms of jump tables.
llvm-svn: 27947
2006-04-22 18:53:45 +00:00
dcc1f995eb
This field no longer exists
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llvm-svn: 27899
2006-04-20 18:32:41 +00:00
a38c3580bd
Remove some of the obvious V9-specific cruft
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llvm-svn: 27893
2006-04-20 18:08:53 +00:00
bec79b4a59
Add a MachineInstr::eraseFromParent convenience method.
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llvm-svn: 27775
2006-04-17 21:35:41 +00:00
835702a094
Remove trailing whitespace
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llvm-svn: 21420
2005-04-21 22:36:52 +00:00
3065220deb
Allow machine operands to represent global variables with offsets. This is
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useful when you have a reference like:
int A[100];
void foo() { A[10] = 1; }
In this case, &A[10] is a single constant and should be treated as such.
Only MO_GlobalAddress and MO_ExternalSymbol are allowed to use this field, no
other operand type is.
This is another fine patch contributed by Jeff Cohen!!
llvm-svn: 17007
2004-10-15 04:38:41 +00:00
7c16caa336
Changes For Bug 352
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Move include/Config and include/Support into include/llvm/Config,
include/llvm/ADT and include/llvm/Support. From here on out, all LLVM
public header files must be under include/llvm/.
llvm-svn: 16137
2004-09-01 22:55:40 +00:00
b47ab7ae1c
* Doxygenify comments
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* Fix spacing, grammar in comment
* Make code layout consistent
* Wrap code at 80 cols
* Delete spurious blank lines
No functional changes.
llvm-svn: 14721
2004-07-09 14:45:17 +00:00
eb04d9bcb4
Add #include <iostream> since Value.h does not #include it any more.
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llvm-svn: 14622
2004-07-04 12:19:56 +00:00
23dbc8170c
Made a fix so that you can print out MachineInstrs that belong to a MachineBasicBlock that is not yet attached to a MachineFunction. This change includes changing the third operand (TargetMachine) to a pointer for the MachineInstr::print function.
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llvm-svn: 14389
2004-06-25 00:13:11 +00:00
4300ca9d32
Make debugging dumps w/ multiple MachineBBs for a given LLVM BB readable.
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llvm-svn: 14205
2004-06-17 22:26:53 +00:00
2150542af9
Adjust to new TargetMachine interface
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llvm-svn: 13956
2004-06-02 05:57:12 +00:00
bcee21b491
Changed clone to be const.
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Changed copy constructor to set parent, prev, and next pointers to null.
llvm-svn: 13706
2004-05-24 03:14:18 +00:00
9953d86e63
Fixed up my changes to add support for cloning Machine Instructions.
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llvm-svn: 13665
2004-05-23 20:58:02 +00:00
e6a4a7dbcf
Adding support to clone MachineInstr
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llvm-svn: 13661
2004-05-23 19:35:12 +00:00
015972103d
Make MachineOperand's value named 'contents'. Make really, really sure
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it is always completely initialized and copied.
Also, fix up many comments and asserts.
llvm-svn: 12100
2004-03-03 19:07:27 +00:00
44b1b22a2d
int64_t -> int
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llvm-svn: 11977
2004-02-29 05:07:02 +00:00
519e1e8c92
Fix crash caused by passing register 0 to
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MRegisterInfo::isPhysicalRegister().
llvm-svn: 11894
2004-02-27 01:52:34 +00:00
91a7dc0a6e
Fix bugs in finegrainification
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llvm-svn: 11758
2004-02-23 18:40:08 +00:00
43df6c268b
Finegrainify namespacification
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llvm-svn: 11757
2004-02-23 18:38:20 +00:00
63f41abfe6
Fix a __LONG__ term annoyance of mine: symbolic registers weren't being printed
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by operator<< on MachineInstr's, and looking up what register "24" is all of the
time was greatly annoying.
llvm-svn: 11623
2004-02-19 16:17:08 +00:00
14f3fe81c6
Add LeakDetection to MachineInstr.
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Move out of line member functions of MachineBasicBlock to
MachineBasicBlock.cpp.
llvm-svn: 11497
2004-02-16 07:17:43 +00:00
8cdd0215bf
Remove getAllocatedRegNum(). Use getReg() instead.
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llvm-svn: 11393
2004-02-13 21:01:20 +00:00
e8f7c2f863
Add head-of-file comments and Doxygen comments. Tighten up a lot of whitespace.
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Rename SetMachineOperandConst's formal parameters to match other methods here.
Mark some methods as being used only by the SPARC back-end.
Fix a missing-paren bug in OutputValue().
llvm-svn: 11363
2004-02-13 04:39:32 +00:00
de8ac749fe
Add parent pointer to MachineInstr that points to owning
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MachineBasicBlock. Also change opcode to a short and numImplicitRefs
to an unsigned char so that overall MachineInstr's size stays the
same.
llvm-svn: 11357
2004-02-12 18:49:07 +00:00
6a597d6057
Rename the opCode instance variable to Opcode
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llvm-svn: 11348
2004-02-12 16:09:53 +00:00
6108d9d5ee
This field is never read
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llvm-svn: 11346
2004-02-12 16:04:49 +00:00
Evan Cheng