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Author SHA1 Message Date
Craig Topper a54a11e22a [X86] Improve avx512-kconstraints-att_inline_asm.c to not be easily defeated by deadcode elimination. Improve CHECK lines to check IR types used. NFC 
I plan to use this as the basis for backend IR test cases. We currently crash hard for using 32 or 64 bit mask registers without avx512bw.

llvm-svn: 358435
 2019-04-15 18:39:36 +00:00
Michael Zuckerman b3147e80a6 Fixing problem with CodeGen/avx512-kconstraints-att_inline_asm.c 
llvm-svn: 285617
 2016-10-31 18:40:17 +00:00
Michael Zuckerman 849a6a5e5a [x86][inline-asm][AVX512][clang][PART-1] Introducing "k" and "Yk" constraints for extended inline assembly, enabling use of AVX512 masked vectorized instructions. 
Commit on behalf of mharoush

Extending inline assembly support, compatible with GCC as folowing:
 "k" constraint hints the compiler to select any of AVX512 k0-k7 registers.
 "Yk" constraint is a subset of "k" excluding k0 which is not allowd to be used as a mask.

Reviewer: 1. rnk

Differential Revision: https://reviews.llvm.org/D25063

llvm-svn: 285604
 2016-10-31 17:23:52 +00:00