Commit Graph

785 Commits

Author SHA1 Message Date
Richard Osborne 521bdf211d [XCore] Support functions returning more than 4 words.
If a function returns a large struct by value return the first 4 words
in registers and the rest on the stack in a location reserved by the
caller. This is needed to support the xC language which supports
functions returning an arbitrary number of return values. This is
r202397 reapplied with a fix to avoid an uninitialized read of a member.

llvm-svn: 202414
2014-02-27 17:47:54 +00:00
Richard Osborne f474087f98 [XCore] Make LowerCallResult a static function.
No functionality change. This is r202396 reapplied with no changes.

llvm-svn: 202413
2014-02-27 17:47:48 +00:00
Richard Osborne 527aa5052d Revert r202396, r202397.
These are causing test failures, revert for now.

llvm-svn: 202398
2014-02-27 14:24:13 +00:00
Richard Osborne e82bf0988e [XCore] Support functions returning more than 4 words.
Summary:
If a function returns a large struct by value return the first 4 words
in registers and the rest on the stack in a location reserved by the
caller. This is needed to support the xC language which supports
functions returning an arbitrary number of return values.

Reviewers: robertlytton

Reviewed By: robertlytton

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D2889

llvm-svn: 202397
2014-02-27 14:00:40 +00:00
Richard Osborne ed7e2ad090 [XCore] Make LowerCallResult a static function.
No functionality change.

llvm-svn: 202396
2014-02-27 14:00:34 +00:00
Richard Osborne a283d24ad9 [XCore] Target optimized library function __memcpy_4()
Summary:
If the src, dst and size of a memcpy are known to be 4 byte aligned we
can call __memcpy_4() instead of memcpy().

Reviewers: robertlytton

Reviewed By: robertlytton

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D2871

llvm-svn: 202395
2014-02-27 13:39:07 +00:00
Richard Osborne d6e85018c5 [XCore] Add dag combines for instructions that ignore some input bits.
These instructions ignore the high bits of one of their input operands -
try and use this to simplify the code.

llvm-svn: 202394
2014-02-27 13:20:11 +00:00
Richard Osborne 2d3a2bee41 [XCore] Provide information about known zero bits of resource instructions.
llvm-svn: 202393
2014-02-27 13:20:06 +00:00
Richard Osborne 50e3b7f759 [XCore] Add intrinsic for CLRPT (clear port time) instruction.
llvm-svn: 202172
2014-02-25 17:31:15 +00:00
Richard Osborne 92fdd3491a [XCore] Add intrinsic for EDU (event disable unconditional) instruction.
llvm-svn: 202171
2014-02-25 17:31:06 +00:00
Richard Osborne 8b7466e886 [XCore] Prefer to word align functions.
The behaviour of the XCore's instruction buffer means that the performance
of the same code sequence can differ depending on whether it starts at a 4
byte aligned address or not. Since we don't model the instruction buffer
in the backend we have no way of knowing for sure if it is beneficial to
word align a specific function. However, in the absence of precise
modelling, it is better on balance to word align functions because:

* It makes a fetch-nop while executing the prologue slightly less likely.
* If we don't word align functions then a small perturbation in one
  function can have a dramatic knock on effect. If the size of the function
  changes it might change the alignment and therefore the performance of
  all the functions that happen to follow it in the binary. This butterfly
  effect makes it harder to reason about and measure the performance of
  code.

llvm-svn: 202163
2014-02-25 16:37:15 +00:00
Rafael Espindola daeafb4c2a Add back r201608, r201622, r201624 and r201625
r201608 made llvm corretly handle private globals with MachO. r201622 fixed
a bug in it and r201624 and r201625 were changes for using private linkage,
assuming that llvm would do the right thing.

They all got reverted because r201608 introduced a crash in LTO. This patch
includes a fix for that. The issue was that TargetLoweringObjectFile now has
to be initialized before we can mangle names of private globals. This is
trivially true during the normal codegen pipeline (the asm printer does it),
but LTO has to do it manually.

llvm-svn: 201700
2014-02-19 17:23:20 +00:00
Daniel Jasper 7e198ad862 Revert r201622 and r201608.
This causes the LLVMgold plugin to segfault. More information on the
replies to r201608.

llvm-svn: 201669
2014-02-19 12:26:01 +00:00
Rafael Espindola 09dcc6a536 Fix PR18743.
The IR
@foo = private constant i32 42

is valid, but before this patch we would produce an invalid MachO from it. It
was invalid because it would use an L label in a section where the liker needs
the labels in order to atomize it.

One way of fixing it would be to just reject this IR in the backend, but that
would not be very front end friendly.

What this patch does is use an 'l' prefix in sections that we know the linker
requires symbols for atomizing them. This allows frontends to just use
private and not worry about which sections they go to or how the linker handles
them.

One small issue with this strategy is that now a symbol name depends on the
section, which is not available before codegen. This is not a problem in
practice. The reason is that it only happens with private linkage, which will
be ignored by the non codegen users (llvm-nm and llvm-ar).

llvm-svn: 201608
2014-02-18 22:24:57 +00:00
Robert Lytton 346e808ec6 XCore target: Handle common linkage
llvm-svn: 201563
2014-02-18 11:21:59 +00:00
Robert Lytton 19ed0d05b8 XCore target: addMemOperand as necessary
BuildMI instructions were not including MachineMemOperand information.
This was discovered by 'SingleSource/Benchmarks/Stanford/Oscar' failing
due to a FrameIndex load incorrectly being hoisted by postra-machine-licm.
No other tests have been found to fail.

llvm-svn: 201562
2014-02-18 11:21:53 +00:00
Robert Lytton af6c256c34 XCore target: Fix llvm.eh.return and EH info register handling
llvm-svn: 201561
2014-02-18 11:21:48 +00:00
Robert Lytton 70b5ba49c3 XCore target: fix const section handling
Xcore target ABI requires const data that is externally visible
to be handled differently if it has C-language linkage rather than
C++ language linkage.

Clang now emits ".cp.rodata" section information.

All other externally visible constant data will be placed in the DP section.

llvm-svn: 201144
2014-02-11 10:36:26 +00:00
Robert Lytton 9b6bb461b1 XCore target: Lower ATOMIC_LOAD & ATOMIC_STORE
llvm-svn: 201143
2014-02-11 10:36:18 +00:00
Rafael Espindola fa0f72837f Pass the Mangler by reference.
It is never null and it is not used in casts, so there is no reason to use a
pointer. This matches how we pass TM.

llvm-svn: 201025
2014-02-08 14:53:28 +00:00
Rafael Espindola 1070501586 Add LLVM_OVERRIDE to a few declarations.
llvm-svn: 201022
2014-02-08 06:07:27 +00:00
Rafael Espindola b4eec1daa1 Remove support for not using .loc directives.
Clang itself was not using this. The only way to access it was via llc.

llvm-svn: 200862
2014-02-05 18:00:21 +00:00
David Woodhouse e6c13e4abd Change MCStreamer EmitInstruction interface to take subtarget info
llvm-svn: 200345
2014-01-28 23:12:42 +00:00
Eric Christopher 2037caf8b9 Revert r199871 and replace it with a simple check in the debug info
code to see if we're emitting a function into a non-default
text section. This is still a less-than-ideal solution, but more
contained than r199871 to determine whether or not we're emitting
code into an array of comdat sections.

llvm-svn: 200269
2014-01-28 00:49:26 +00:00
Benjamin Kramer 9d9907924d XCore: Fix typo in function name.
llvm-svn: 200216
2014-01-27 11:50:13 +00:00
Rafael Espindola b7381560bc Add missing file.
llvm-svn: 200169
2014-01-27 00:08:17 +00:00
Rafael Espindola fd5d129298 Add a XCoreTargetStreamer and port over the simple uses of EmitRawText.
llvm-svn: 200167
2014-01-26 23:57:05 +00:00
Juergen Ributzka 3e752e7af9 Add final and owerride keywords to TargetTransformInfo's subclasses.
llvm-svn: 200021
2014-01-24 18:22:59 +00:00
Alp Toker cb40291100 Fix known typos
Sweep the codebase for common typos. Includes some changes to visible function
names that were misspelt.

llvm-svn: 200018
2014-01-24 17:20:08 +00:00
Eric Christopher 15abef6df9 Add a variable to track whether or not we've used a unique section,
e.g. linkonce, to TargetMachine and set it when we've done so
for ELF targets currently. This involved making TargetMachine
non-const in a TLOF use and propagating that change around - I'm
open to other ideas.

This will be used in a future commit to handle emitting debug
information with ranges.

llvm-svn: 199871
2014-01-23 06:47:25 +00:00
Nico Rieck 7157bb765e Decouple dllexport/dllimport from linkage
Representing dllexport/dllimport as distinct linkage types prevents using
these attributes on templates and inline functions.

Instead of introducing further mixed linkage types to include linkonce and
weak ODR, the old import/export linkage types are replaced with a new
separate visibility-like specifier:

  define available_externally dllimport void @f() {}
  @Var = dllexport global i32 1, align 4

Linkage for dllexported globals and functions is now equal to their linkage
without dllexport. Imported globals and functions must be either
declarations with external linkage, or definitions with
AvailableExternallyLinkage.

llvm-svn: 199218
2014-01-14 15:22:47 +00:00
Nico Rieck 9d2e0df049 Revert "Decouple dllexport/dllimport from linkage"
Revert this for now until I fix an issue in Clang with it.

This reverts commit r199204.

llvm-svn: 199207
2014-01-14 12:38:32 +00:00
Nico Rieck e43aaf7967 Decouple dllexport/dllimport from linkage
Representing dllexport/dllimport as distinct linkage types prevents using
these attributes on templates and inline functions.

Instead of introducing further mixed linkage types to include linkonce and
weak ODR, the old import/export linkage types are replaced with a new
separate visibility-like specifier:

  define available_externally dllimport void @f() {}
  @Var = dllexport global i32 1, align 4

Linkage for dllexported globals and functions is now equal to their linkage
without dllexport. Imported globals and functions must be either
declarations with external linkage, or definitions with
AvailableExternallyLinkage.

llvm-svn: 199204
2014-01-14 11:55:03 +00:00
Rafael Espindola 894843cb4e Move the llvm mangler to lib/IR.
This makes it available to tools that don't link with target (like llvm-ar).

llvm-svn: 198708
2014-01-07 21:19:40 +00:00
Chandler Carruth 8a8cd2bab9 Re-sort all of the includes with ./utils/sort_includes.py so that
subsequent changes are easier to review. About to fix some layering
issues, and wanted to separate out the necessary churn.

Also comment and sink the include of "Windows.h" in three .inc files to
match the usage in Memory.inc.

llvm-svn: 198685
2014-01-07 11:48:04 +00:00
Rafael Espindola d61a0c028d Remove dead code.
llvm-svn: 198624
2014-01-06 18:14:34 +00:00
Robert Lytton 9523aa41fb XCore Target: correct callee save register spilling when callsUnwindInit is true.
llvm-svn: 198616
2014-01-06 14:21:12 +00:00
Robert Lytton c8c4aa667b XCore target: Lower EH_RETURN
llvm-svn: 198615
2014-01-06 14:21:07 +00:00
Robert Lytton 5da175214b XCore target: Lower FRAME_TO_ARGS_OFFSET
This requires a knowledge of the stack size which is not known until
the frame is complete, hence the need for the XCoreFTAOElim pass
which lowers the XCoreISD::FRAME_TO_ARGS_OFFSET instrution into its
final form.

llvm-svn: 198614
2014-01-06 14:21:00 +00:00
Robert Lytton dec798751a XCore target: Lower RETURNADDR
Only handles a depth of zero (the same as FRAMEADDR)

llvm-svn: 198613
2014-01-06 14:20:53 +00:00
Robert Lytton cbb588a264 XCore target: Optimise entsp / retsp selection
llvm-svn: 198612
2014-01-06 14:20:47 +00:00
Robert Lytton a53360a339 XCore target: Refactor LR handling
We also narrow the liveness of FP & LR during the prologue to
reflect the actual usage of the registers.
I have been unable to construct a test to prove the previous live
range was too large.

llvm-svn: 198611
2014-01-06 14:20:41 +00:00
Robert Lytton 9288eea910 XCore target: Refactor the loading of constants into a register
This common functionality will be used to lower FRAME_TO_ARGS_OFFSET.

llvm-svn: 198610
2014-01-06 14:20:37 +00:00
Robert Lytton bc4d976152 XCore target: fix handling of unsized global arrays in large code model
llvm-svn: 198609
2014-01-06 14:20:32 +00:00
Rafael Espindola 58873566b3 Make the llvm mangler depend only on DataLayout.
Before this patch any program that wanted to know the final symbol name of a
GlobalValue had to link with Target.

This patch implements a compromise solution where the mangler uses DataLayout.
This way, any tool that already links with Target (llc, clang) gets the exact
behavior as before and new IR files can be mangled without linking with Target.

With this patch the mangler is constructed with just a DataLayout and DataLayout
is extended to include the information the Mangler needs.

llvm-svn: 198438
2014-01-03 19:21:54 +00:00
Josh Magee 22b8ba2d67 [stackprotector] Use analysis from the StackProtector pass for stack layout in PEI a nd LocalStackSlot passes.
This changes the MachineFrameInfo API to use the new SSPLayoutKind information
produced by the StackProtector pass (instead of a boolean flag) and updates a
few pass dependencies (to preserve the SSP analysis).

The stack layout follows the same approach used prior to this change - i.e.,
only LargeArray stack objects will be placed near the canary and everything
else will be laid out normally.  After this change, structures containing large
arrays will also be placed near the canary - a case previously missed by the
old implementation.

Out of tree targets will need to update their usage of
MachineFrameInfo::CreateStackObject to remove the MayNeedSP argument. 

The next patch will implement the rules for sspstrong and sspreq.  The end goal
is to support ssp-strong stack layout rules.

WIP.

Differential Revision: http://llvm-reviews.chandlerc.com/D2158

llvm-svn: 197653
2013-12-19 03:17:11 +00:00
Rafael Espindola e89b41495a One last cleanup of LLVM's DataLayout strings.
Produce them in the same order on every target. The order is that of
getStringRepresentation: e|E-i*-f*-v*-a*-s*-n*-S*.

llvm-svn: 197411
2013-12-16 19:31:14 +00:00
Rafael Espindola bccb9d45ad The preferred alignment defaults to the abi alignment. Omit if it is the same.
llvm-svn: 197400
2013-12-16 18:01:51 +00:00
Rafael Espindola 1caa693a7b Assume defaults to produce smaller datalayout strings.
llvm-svn: 197249
2013-12-13 17:56:11 +00:00
Rafael Espindola e8f4d58700 Use "a" instead of "a0" in DataLayout.
It means exactly the same and is just a bit shorter.

llvm-svn: 197169
2013-12-12 17:21:51 +00:00
NAKAMURA Takumi 8bc9bfaa5a Prune redundant dependencies in LLVMBuild.txt.
llvm-svn: 196988
2013-12-11 00:30:57 +00:00
NAKAMURA Takumi 396d4d3c7e Add proper dependencies to LLVMBuild.txt in llvm/lib.
I'll prune redundant deps in LLVMBuild.txt, later.

llvm-svn: 196881
2013-12-10 05:39:34 +00:00
Rafael Espindola 5113d166f5 Refactor the setting of PrivateGlobalPrefix.
No functionality change.

llvm-svn: 196170
2013-12-02 23:39:26 +00:00
Rafael Espindola 957cf6f9e1 Remove dead code.
MO_JumpTableIndex and MO_ExternalSymbol don't show up on inline asm.

Keeping parts of the old asm printer just to print inline asm to a string that
we then parse back looks like a hack.

llvm-svn: 196111
2013-12-02 15:36:37 +00:00
NAKAMURA Takumi e4b8a2e559 XCoreFrameLowering.cpp: Use [in,out] instead of [in] [out]. [-Wdocumentation]
llvm-svn: 196094
2013-12-02 11:31:25 +00:00
Robert Lytton 7fbca3cce0 XCore target: Make handling of large frames not dependent upon an FP.
eliminateFrameIndex() has been reworked to handle both small & large frames
with either a FP or SP.
An additional Slot is required for Scavenging spills when not using FP for large frames.
Reworked the handling of Register Scavenging.

Whether we are using an FP or not, whether it is a large frame or not,
and whether we are using a large code model or not are now independent.

llvm-svn: 196091
2013-12-02 11:05:28 +00:00
Benjamin Kramer 2725bd21ff XCore: Unbreak C++11 build.
llvm-svn: 196089
2013-12-02 10:29:26 +00:00
Robert Lytton d3ffa66c6c XCore target: fix large code model 'select' indirect address handling.
llvm-svn: 196088
2013-12-02 10:18:37 +00:00
Robert Lytton ff38d37c77 XCore target: Add large code model
When using large code model:
Global objects larger than 'CodeModelLargeSize' bytes are placed in sections named with a trailing ".large"
The folded global address of such objects are lowered into the const pool.

During inspection it was noted that LowerConstantPool() was using a default offset of zero.
A fix was made, but due to only offsets of zero being generated, testing only verifies the change is not detrimental.

Correct the flags emitted for explicitly specified sections.

We assume the size of the object queried by getSectionForConstant() is never greater than CodeModelLargeSize.
To handle greater than CodeModelLargeSize, changes to AsmPrinter would be required.

llvm-svn: 196087
2013-12-02 10:18:31 +00:00
Robert Lytton 0abd2c96b5 XCore target: Fix eliminateFrameIndex() to handle large frames
Large frame offsets are loaded from the ConstantPool.
Where possible, offsets are encoded using the smaller MKMSK instruction.
Large frame offsets can only be used when there is a frame-pointer.

llvm-svn: 196085
2013-12-02 10:18:19 +00:00
Robert Lytton a9f984fb76 XCore target: Enable frames larger than 65535 to be lowered
llvm-svn: 196084
2013-12-02 10:18:14 +00:00
Rafael Espindola 50712a456d Change the default of AsmWriterClassName and isMCAsmWriter.
llvm-svn: 196065
2013-12-02 04:55:42 +00:00
NAKAMURA Takumi 226e10edff [CMake] Let add_public_tablegen_target() provide intrinsics_gen, too.
I think, in principle, intrinsics_gen may be added explicitly.
That said, it can be added incidentally, since each target already has dependencies to llvm-tblgen.
Almost all source files depend on both CommonTaleGen and intrinsics_gen.

Explicit add_dependencies() have been pruned under lib/Target.

llvm-svn: 195929
2013-11-28 17:04:31 +00:00
NAKAMURA Takumi ce746c6c49 [CMake] Let add_public_tablegen_target responsible to provide dependency to CommonTableGen.
add_public_tablegen_target adds *CommonTableGen to LLVM_COMMON_DEPENDS.
LLVM_COMMON_DEPENDS affects add_llvm_library (and other add_target stuff) within its scope.

llvm-svn: 195927
2013-11-28 17:04:04 +00:00
NAKAMURA Takumi b2abd160b3 [CMake] Prune include_directories() in llvm/lib/Target, take #2.
I forgot to commit them. They were staging in my local repo.

llvm-svn: 195924
2013-11-28 15:30:37 +00:00
Juergen Ributzka d12ccbd343 [weak vtables] Remove a bunch of weak vtables
This patch removes most of the trivial cases of weak vtables by pinning them to
a single object file. The memory leaks in this version have been fixed. Thanks
Alexey for pointing them out.

Differential Revision: http://llvm-reviews.chandlerc.com/D2068

Reviewed by Andy

llvm-svn: 195064
2013-11-19 00:57:56 +00:00
Alexey Samsonov 49109a279c Revert r194865 and r194874.
This change is incorrect. If you delete virtual destructor of both a base class
and a subclass, then the following code:
  Base *foo = new Child();
  delete foo;
will not cause the destructor for members of Child class. As a result, I observe
plently of memory leaks. Notable examples I investigated are:
ObjectBuffer and ObjectBufferStream, AttributeImpl and StringSAttributeImpl.

llvm-svn: 194997
2013-11-18 09:31:53 +00:00
Juergen Ributzka dbedae89b9 [weak vtables] Remove a bunch of weak vtables
This patch removes most of the trivial cases of weak vtables by pinning them to
a single object file.

Differential Revision: http://llvm-reviews.chandlerc.com/D2068

Reviewed by Andy

llvm-svn: 194865
2013-11-15 22:34:48 +00:00
Robert Lytton a83c0482dd XCore target: implement exception handling
llvm-svn: 194564
2013-11-13 10:19:31 +00:00
Robert Lytton 494591b87f XCore target: fix bug in aligning 'byval i8*' on the stack
llvm-svn: 194466
2013-11-12 10:11:35 +00:00
Robert Lytton 61d9149c73 Add XCore support for ATOMIC_FENCE.
ATOMIC_FENCE is lowered to a compiler barrier which is codegen only. There
is no need to emit an instructions since the XCore provides sequential
consistency.

Original patch by Richard Osborne

llvm-svn: 194464
2013-11-12 10:11:26 +00:00
Robert Lytton ed835b6fd4 XCore target: return error for unsupported alignment
llvm-svn: 194463
2013-11-12 10:11:05 +00:00
Rafael Espindola 79858aa3df Add a helper getSymbol to AsmPrinter.
llvm-svn: 193627
2013-10-29 17:07:16 +00:00
Rafael Espindola 43c4e24fad Add a MCAsmInfoELF class and factor some code into it.
We had a MCAsmInfoCOFF, but no common class for all the ELF MCAsmInfos before.

llvm-svn: 192760
2013-10-16 01:34:32 +00:00
Robert Lytton 4eec834c2b XCore target fix bug in emitArrayBound() causing segmentation fault
llvm-svn: 192434
2013-10-11 10:27:13 +00:00
Robert Lytton 117deb9695 XCore target does not emit '.hidden' or '.protected' attributes
llvm-svn: 192433
2013-10-11 10:27:00 +00:00
Robert Lytton 9715375c25 XCore target: fix bug in XCoreLowerThreadLocal.cpp
When a ConstantExpr which uses a thread local is part of a PHI node
instruction, the insruction that replaces the ConstantExpr must
be inserted in the predecessor block, in front of the terminator instruction.
If the predecessor block has multiple successors, the edge is first split.

llvm-svn: 192432
2013-10-11 10:26:48 +00:00
Robert Lytton 3139db02c8 XCore target: add XCoreTargetLowering::isZExtFree()
llvm-svn: 192431
2013-10-11 10:26:29 +00:00
Chandler Carruth dbf6589b56 More XCore TTI cleanup -- remove an unused private field flagged by
-Wunused-private-field with Clang.

llvm-svn: 190941
2013-09-18 14:11:11 +00:00
NAKAMURA Takumi 0b642ec13d Target/XCore/CMakeLists.txt: Add XCoreTargetTransformInfo.cpp.
llvm-svn: 190937
2013-09-18 12:59:41 +00:00
Robert Lytton f637e2cb23 Prevent LoopVectorizer and SLPVectorizer running if the target has no vector registers.
XCore target: Add XCoreTargetTransformInfo
This is where getNumberOfRegisters() resides, which in turn returns the
number of vector registers (=0).

llvm-svn: 190936
2013-09-18 12:43:35 +00:00
Eli Friedman 1891f69323 Remove unused functions.
llvm-svn: 190442
2013-09-10 22:42:31 +00:00
Aaron Ballman 83d81784df A better way to silence the warning in MSVC (replaces r190304).
llvm-svn: 190308
2013-09-09 14:17:30 +00:00
Aaron Ballman c4280dd977 Silencing a warning about control flow reaching the end of a non-void function.
llvm-svn: 190304
2013-09-09 13:22:45 +00:00
Robert Lytton 3d3194bf06 XCore handling of thread local lowering
Fix XCoreLowerThreadLocal trying to initialise globals
which have no initializer.

Add handling of const expressions containing thread local variables.
These need to be replaced with instructions, as the thread ID is
used to access the thread local variable.

llvm-svn: 190300
2013-09-09 10:42:11 +00:00
Robert Lytton 4809ea41e6 XCore target: change to Sched::Source
This sidesteps a bug in PrescheduleNodesWithMultipleUses() which
does not check if callResources will be affected by the transformation.

llvm-svn: 190299
2013-09-09 10:42:05 +00:00
Robert Lytton e453888379 XCore target: fix weak linkage attribute handling
llvm-svn: 190298
2013-09-09 10:41:57 +00:00
NAKAMURA Takumi aaf66c7357 Target/*/CMakeLists.txt: Add the dependency to CommonTableGen explicitly for each corresponding CodeGen.
Without explicit dependencies, both per-file action and in-CommonTableGen action could run in parallel.
It races to emit *.inc files simultaneously.

llvm-svn: 187780
2013-08-06 06:38:37 +00:00
Benjamin Kramer dcfd5b525a Stop leaking register infos in the disassemblers.
llvm-svn: 187695
2013-08-03 22:16:16 +00:00
Robert Lytton 4be00f8ad1 XCore target: Fix Vararg handling
llvm-svn: 187565
2013-08-01 08:29:44 +00:00
Robert Lytton 4e60a3f4e3 XCore target: Add byval handling
llvm-svn: 187563
2013-08-01 08:18:55 +00:00
Robert Lytton b4787a159d Xcore target
Fix emitArrayBound() calling OutStreamer.Emit*() multiple times when trying to print a single line

llvm-svn: 187562
2013-08-01 07:52:05 +00:00
Robert Lytton 862b04516f test commit
llvm-svn: 187348
2013-07-29 09:23:13 +00:00
Richard Osborne 240d480c5f test commit
llvm-svn: 187195
2013-07-26 10:19:02 +00:00
Richard Osborne 2d0d8da246 [XCore] Add TODO regarding byval structs
llvm-svn: 187193
2013-07-26 09:50:55 +00:00
Richard Osborne 9ff96e6f9b [XCore] Ensure implicit operands aren't lost on the return instruction.
Patch by Robert Lytton.

llvm-svn: 186500
2013-07-17 10:58:37 +00:00
Richard Osborne ab29d19536 [XCore] Fix printing of inline asm operands.
Previously an asm operand with no operand modifier would give the error
"invalid operand in inline asm".

llvm-svn: 186407
2013-07-16 12:48:34 +00:00
Craig Topper b94011fd28 Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector size.
llvm-svn: 186274
2013-07-14 04:42:23 +00:00
Richard Osborne 756233ef02 [XCore] Whitespace fixes, no functionality change.
llvm-svn: 185519
2013-07-03 07:49:03 +00:00
Richard Osborne a1cff61dec [XCore] Add ISel pattern for LDWCP
Patch by Robert Lytton.

llvm-svn: 185518
2013-07-03 07:48:50 +00:00
Richard Osborne e4cc98686a [XCore] Fix instruction selection for zext, mkmsk instructions.
r182680 replaced CountLeadingZeros_32 with a template function
countLeadingZeros that relies on using the correct argument type to give
the right result. The type passed in the XCore backend after this
revision was incorrect in a couple of places.

Patch by Robert Lytton.

llvm-svn: 185430
2013-07-02 14:46:34 +00:00
Chad Rosier 295bd43adb The getRegForInlineAsmConstraint function should only accept MVT value types.
llvm-svn: 184642
2013-06-22 18:37:38 +00:00
Bill Wendling a3cd350249 Access the TargetLoweringInfo from the TargetMachine object instead of caching it. The TLI may change between functions. No functionality change.
llvm-svn: 184360
2013-06-19 21:36:55 +00:00
David Blaikie b735b4d6db DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs
Frame index handling is now target-agnostic, so delete the target hooks
for creation & asm printing of target-specific addressing in DBG_VALUEs
and any related functions.

llvm-svn: 184067
2013-06-16 20:34:27 +00:00
Bill Wendling 999dacc55b Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.

No functionality change intended.

llvm-svn: 183572
2013-06-07 21:04:35 +00:00
Bill Wendling f77190855d Cache the TargetLowering info object as a pointer.
Caching it as a pointer allows us to reset it if the TargetMachine object
changes.

llvm-svn: 183361
2013-06-06 00:43:09 +00:00
Andrew Trick ad6d08ac6f Order CALLSEQ_START and CALLSEQ_END nodes.
Fixes PR16146: gdb.base__call-ar-st.exp fails after
pre-RA-sched=source fixes.

Patch by Xiaoyi Guo!

This also fixes an unsupported dbg.value test case. Codegen was
previously incorrect but the test was passing by luck.

llvm-svn: 182885
2013-05-29 22:03:55 +00:00
Andrew Trick ef9de2a739 Track IR ordering of SelectionDAG nodes 2/4.
Change SelectionDAG::getXXXNode() interfaces as well as call sites of
these functions to pass in SDLoc instead of DebugLoc.

llvm-svn: 182703
2013-05-25 02:42:55 +00:00
Michael J. Spencer df1ecbd734 Replace Count{Leading,Trailing}Zeros_{32,64} with count{Leading,Trailing}Zeros.
llvm-svn: 182680
2013-05-24 22:23:49 +00:00
Benjamin Kramer 534d3a4670 Remove the Copied parameter from MemoryObject::readBytes.
There was exactly one caller using this API right, the others were relying on
specific behavior of the default implementation. Since it's too hard to use it
right just remove it and standardize on the default behavior.

Defines away PR16132.

llvm-svn: 182636
2013-05-24 10:54:58 +00:00
Patrik Hagglund b3391b58f7 Removed unused variable, detected by gcc
-Wunused-but-set-variable. Leftover from r181979.

llvm-svn: 181993
2013-05-16 08:37:22 +00:00
Rafael Espindola e3d5e5354e Don't call addFrameMove on XCore.
getExceptionHandlingType is not ExceptionHandling::DwarfCFI on xcore, so
etFrameInstructions is never called. There is no point creating cfi
instructions if they are never used.

llvm-svn: 181979
2013-05-16 04:16:25 +00:00
Rafael Espindola 227144c23c Remove the MachineMove class.
It was just a less powerful and more confusing version of
MCCFIInstruction. A side effect is that, since MCCFIInstruction uses
dwarf register numbers, calls to getDwarfRegNum are pushed out, which
should allow further simplifications.

I left the MachineModuleInfo::addFrameMove interface unchanged since
this patch was already fairly big.

llvm-svn: 181680
2013-05-13 01:16:13 +00:00
Rafael Espindola 1b09836bc3 Change getFrameMoves to return a const reference.
To add a frame now there is a dedicated addFrameMove which also takes
care of constructing the move itself.

llvm-svn: 181657
2013-05-11 02:38:11 +00:00
Rafael Espindola 140a837acd Remove unused argument.
llvm-svn: 181618
2013-05-10 18:16:59 +00:00
Richard Osborne 1333fa3d68 [XCore] Fix handling of functions where only the LR is spilled.
Previously we only checked if the LR required saving if the frame size was
non zero. However because the caller reserves 1 word for the callee to use
that doesn't count towards our frame size it is possible for the LR to need
saving and for the frame size to be 0.

We didn't hit when the LR needed saving because of a function calls because
the 1 word of stack we must allocate for our callee means the frame size
is always non zero in this case. However we can hit this case if the LR is
clobbered in inline asm.

llvm-svn: 181520
2013-05-09 16:43:42 +00:00
Richard Osborne 4498bd352f [XCore] Add LDAPB instructions.
With the change the disassembler now supports the XCore ISA in its
entirety.

llvm-svn: 181155
2013-05-05 13:36:53 +00:00
Richard Osborne e41cdbd3aa [XCore] Update LDAP to use pcrel_imm.
llvm-svn: 181154
2013-05-05 13:33:10 +00:00
Richard Osborne 8bdfdf717a [XCore] Rename calltarget -> pcrel_imm.
No functionality change.

llvm-svn: 181153
2013-05-05 13:29:02 +00:00
Richard Osborne 4d3514ee94 [XCore] Add BLRB instructions.
llvm-svn: 181152
2013-05-05 13:24:16 +00:00
Richard Osborne 53a04fe2b4 [XCore] Remove '-' from back branch asm syntax.
Instead operands are treated as negative immediates
where the sign bit is implicit in the instruction
encoding.

llvm-svn: 181151
2013-05-05 13:20:22 +00:00
Richard Osborne 2f75a0c0d8 Fix buildbot failure on 64 bit linux due to std::max() having different
operand types.

llvm-svn: 181128
2013-05-04 17:41:01 +00:00
Richard Osborne 0a7abb655b [XCore] Remove unused operand type.
llvm-svn: 181127
2013-05-04 17:30:05 +00:00
Richard Osborne 54ff84a8f8 [XCore] Make use of the target independent global address offset folding.
This let us to remove some custom code that matched constant offsets
from globals at instruction selection time as a special addressing mode.
No intended functionality change.

llvm-svn: 181126
2013-05-04 17:24:33 +00:00
Richard Osborne a282fa5b60 [XCore] Simplify code that checks for an aligned base plus a constant.
The code now makes use of ComputeMaskedBits,
SelectionDAG::isBaseWithConstantOffset and TargetLowering::isGAPlusOffset
where appropriate reducing the amount of logic needed in XCoreISelLowering.
No intended functionality change.

llvm-svn: 181125
2013-05-04 17:17:10 +00:00
Richard Osborne 8bbea9cde7 [XCore] Move lowering of thread local storage to a separate pass.
Thread local storage is not supported by the XMOS linker so we handle
thread local variables by lowering the variable to an array of n elements
(where n is the number of hardware threads per core, currently 8
for all XMOS devices) indexed by the the current thread ID.

Previously this lowering was spread across the XCoreISelLowering and the
XCoreAsmPrinter classes. Moving this to a separate pass should be much
cleaner.

llvm-svn: 181124
2013-05-04 17:01:55 +00:00
Richard Osborne df9e574105 [XCore] Use static relocation model by default.
This allows us to get get rid of a hack in XCoreTargetObjectFile where the
the DataRel* sections were overridden.

llvm-svn: 181116
2013-05-04 16:40:58 +00:00
Michael Liao b53d8963ce ArrayRefize getMachineNode(). No functionality change.
llvm-svn: 179901
2013-04-19 22:22:57 +00:00
Richard Osborne 0c12d1851e [XCore] Add bru instruction.
llvm-svn: 178783
2013-04-04 20:05:35 +00:00
Richard Osborne f18d95f756 [XCore] The RRegs register class is a superset of GRRegs.
At the time when the XCore backend was added there were some issues with
with overlapping register classes but these all seem to be fixed now.
Describing the register classes correctly allow us to get rid of a
codegen only instruction (LDAWSP_lru6_RRegs) and it means we can
disassemble ru6 instructions that use registers above r11.

llvm-svn: 178782
2013-04-04 19:57:46 +00:00
Hal Finkel 9e331c2f9c Allow the register scavenger to spill multiple registers
This patch lets the register scavenger make use of multiple spill slots in
order to guarantee that it will be able to provide multiple registers
simultaneously.

To support this, the RS's API has changed slightly: setScavengingFrameIndex /
getScavengingFrameIndex have been replaced by addScavengingFrameIndex /
isScavengingFrameIndex / getScavengingFrameIndices.

In forthcoming commits, the PowerPC backend will use this capability in order
to implement the spilling of condition registers, and some special-purpose
registers, without relying on r0 being reserved. In some cases, spilling these
registers requires two GPRs: one for addressing and one to hold the value being
transferred.

llvm-svn: 177774
2013-03-22 23:32:27 +00:00
Tom Stellard b1588fc057 DAGCombiner: Use correct value type for checking legality of BR_CC v3
LegalizeDAG.cpp uses the value of the comparison operands when checking
the legality of BR_CC, so DAGCombiner should do the same.

v2:
  - Expand more BR_CC value types for NVPTX

v3:
  - Expand correct BR_CC value types for Hexagon, Mips, and XCore.

llvm-svn: 176694
2013-03-08 15:36:57 +00:00
Michael Liao 6af16fc3b7 Fix PR10475
- ISD::SHL/SRL/SRA must have either both scalar or both vector operands
  but TLI.getShiftAmountTy() so far only return scalar type. As a
  result, backend logic assuming that breaks.
- Rename the original TLI.getShiftAmountTy() to
  TLI.getScalarShiftAmountTy() and re-define TLI.getShiftAmountTy() to
  return target-specificed scalar type or the same vector type as the
  1st operand.
- Fix most TICG logic assuming TLI.getShiftAmountTy() a simple scalar
  type.

llvm-svn: 176364
2013-03-01 18:40:30 +00:00
Eli Bendersky 8da87163ca Move the eliminateCallFramePseudoInstr method from TargetRegisterInfo
to TargetFrameLowering, where it belongs. Incidentally, this allows us
to delete some duplicated (and slightly different!) code in TRI.

There are potentially other layering problems that can be cleaned up
as a result, or in a similar manner.

The refactoring was OK'd by Anton Korobeynikov on llvmdev.

Note: this touches the target interfaces, so out-of-tree targets may
be affected.

llvm-svn: 175788
2013-02-21 20:05:00 +00:00
Jim Grosbach 341ad3e72a Update TargetLowering ivars for name policy.
http://llvm.org/docs/CodingStandards.html#name-types-functions-variables-and-enumerators-properly

ivars should be camel-case and start with an upper-case letter. A few in
TargetLowering were starting with a lower-case letter.

No functional change intended.

llvm-svn: 175667
2013-02-20 21:13:59 +00:00
Richard Osborne 53fff94527 [XCore] Add missing 2r instructions.
These instructions are not targeted by the compiler but it is needed for
the MC layer.

llvm-svn: 175407
2013-02-17 22:38:05 +00:00
Richard Osborne f5a3ffcba9 [XCore] Add TSETR instruction.
This instruction is not targeted by the compiler but it is needed for the
MC layer.

llvm-svn: 175406
2013-02-17 22:32:41 +00:00
Richard Osborne 2192615d9f [XCore] Add missing u10 / lu10 instructions.
These instructions are not targeted by the compiler but they are
needed for the MC layer.

llvm-svn: 175404
2013-02-17 20:44:48 +00:00
Richard Osborne 3814491fb1 [XCore] Add missing u6 / lu6 instructions.
These instructions are not targeted by the compiler but they are
needed for the MC layer.

llvm-svn: 175403
2013-02-17 20:43:17 +00:00
Jakob Stoklund Olesen 4af19d0014 Move MRI liveouts to XCore return instructions.
llvm-svn: 174414
2013-02-05 18:21:46 +00:00
Chad Rosier df782d2225 [PEI] Pass the frame index operand number to the eliminateFrameIndex function.
Each target implementation was needlessly recomputing the index.
Part of rdar://13076458

llvm-svn: 174083
2013-01-31 20:02:54 +00:00
Richard Osborne 038d24f90c [XCore] Add missing l2rus instructions.
These instructions are not targeted by the compiler but they are
needed for the MC layer.

llvm-svn: 173634
2013-01-27 22:28:30 +00:00
Richard Osborne f2ecd40929 [XCore] Add missing l2r instructions.
These instructions are not targeted by the compiler but they are
needed for the MC layer.

llvm-svn: 173629
2013-01-27 21:26:02 +00:00
Richard Osborne 7fe8f63544 [XCore] Add missing 1r instructions.
These instructions are not targeted by the compiler but they are
needed for the MC layer.

llvm-svn: 173624
2013-01-27 20:46:21 +00:00
Richard Osborne 8f56317287 [XCore] Add missing 0r instructions.
These instructions are not targeted by the compiler but they are
needed for the MC layer.

llvm-svn: 173623
2013-01-27 20:42:57 +00:00
Richard Osborne 6b86eec819 Add instruction encodings / disassembly support for l4r instructions.
llvm-svn: 173501
2013-01-25 21:55:32 +00:00
Richard Osborne a520a7dcf3 Use the correct format in the STW / SETPSC instruction names.
llvm-svn: 173494
2013-01-25 21:25:12 +00:00
Richard Osborne 9a228a13c6 Fix order of operands for crc8_l4r
The order in which operands appear in the encoded instruction is different
to order in which they appear in assembly. This changes the XCore backend to
use the instruction encoding order.

llvm-svn: 173493
2013-01-25 21:20:28 +00:00
Richard Osborne a19fa86a70 Add instruction encodings / disassembly support for l5r instructions.
llvm-svn: 173479
2013-01-25 20:20:07 +00:00
Richard Osborne 8ae02d3cef Fix order of operands for l5r instructions.
With this change the operands order matches the order in which the operands
are encoded in the instruction.

llvm-svn: 173477
2013-01-25 20:16:00 +00:00