According to the PE/COFF spec, a section with IMAGE_SCN_LNK_INFO should only
appear in an object file, and not allowed in an executable. So I believe
treating it as the same way as IMAGE_SCN_LNK_INFO is the right thing.
llvm-svn: 195692
Patch by Mikulas Patocka. I added the test. I checked that for cpu names that
gas knows about, it also doesn't generate nopl.
The modified cpus:
i686 - there are i686-class CPUs that don't have nopl: Via c3, Transmeta
Crusoe, Microsoft VirtualBox - see
https://bbs.archlinux.org/viewtopic.php?pid=775414
k6, k6-2, k6-3, winchip-c6, winchip2 - these are 586-class CPUs
via c3 c3-2 - see https://bugs.archlinux.org/task/19733 as a proof that
Via c3 and c3-Nehemiah don't have nopl
llvm-svn: 195679
This patch fixes a bug in the assembler that was causing bad code to
be emitted. When switching modes in an assembly file (e.g. arm to
thumb mode) we would always emit the opcode from the original mode.
Consider this small example:
$ cat align.s
.code 16
foo:
add r0, r0
.align 3
add r0, r0
$ llvm-mc -triple armv7-none-linux align.s -filetype=obj -o t.o
$ llvm-objdump -triple thumbv7 -d t.o
Disassembly of section .text:
foo:
0: 00 44 add r0, r0
2: 00 f0 20 e3 blx #4195904
6: 00 00 movs r0, r0
8: 00 44 add r0, r0
This shows that we have actually emitted an arm nop (e320f000)
instead of a thumb nop. Unfortunately, this encodes to a thumb
branch which causes bad things to happen when compiling assembly
code with align directives.
The fix is to notify the ARMAsmBackend when we switch mode. The
MCMachOStreamer was already doing this correctly. This patch makes
the same change for the MCElfStreamer.
There is still a bug in the way nops are emitted for alignment
because the MCAlignment fragment does not store the correct mode.
The ARMAsmBackend will emit nops for the last mode it knew about. In
the example above, we still generate an arm nop if we add a `.code
32` to the end of the file.
PR18019
llvm-svn: 195677
The integrated assembler was already the default for win32. It is now able
to handle a clang bootstrap on mingw, so make it the default.
llvm-svn: 195676
It wasn't possible for an anonymous type to show up inside of function arguments.
However, decltype (which MSVC added support for in 2010) makes this
possible. Further, backrefs to these anonymous types can now be formed.
This fixes PR18022.
N.B. We do not, and very likely _will not_, support MSVC's bug where
subsequent typedefs of anonymous types leak into the linkage name; this
is a gross violation of the ABI. A warning should be introduced to
inform our users of this particular shortcoming.
llvm-svn: 195669
From Jim Ingham's email:
It does look like ThreadPlanStepInRange test is some kind of thinko.
In practice, in this case it is probably safe to run only one thread
when doing the "step through" since that generally involved running
from a shared library stub to its target. That could deadlock if the
dynamic loader has to fix up the symbol, and another thread is in the
middle of doing that. But that doesn't seem to be very common, or at
least the code is clearly wrong but I haven't had any reports of this
causing deadlocks...
llvm-svn: 195657
Although ptrace() can be passed a PID or TID for PT_CONTINUE and PT_STEP,
the kernel operates on all threads in the process in both cases. (See
the FOREACH_THREAD_IN_PROC in FreeBSD's sys_process.c:kern_ptrace.)
Make this clear by using the PID from the ProcessMonitor instance.
llvm-svn: 195656
These are handled almost identically to static mode (and ELF's global address
materialisation), except that a symbol may have "$non_lazy_ptr" appended. This
can be handled by passing appropriate flags along with the instruction instead
of using entirely separate pseudo-instructions.
llvm-svn: 195655
These should not use COMDATs. GNU as uses .bss for .lcomm and section 0 for
.comm.
Given
static int a;
int b;
MSVC puts both in .bss. This patch then puts both .comm and .lcomm on .bss. With
this change we agree with gas on .lcomm, are much closer on .comm and clang-cl
matches msvc on the above example.
llvm-svn: 195654
There is no sane way for an LEApcrel (= single ADR) instruction to generate a
global address on any ARM target I know of. Fortunately, no-one was trying to
any more, but there were vestigial patterns.
llvm-svn: 195644
No longer allow interceptors to be called during initialization, use the preinit
array (instead of initializing at the first call to an intercepted function) and
adopt the calloc() hack from ASan.
llvm-svn: 195642
Summary:
Implement TwoLevelByteMap and use it for the internal allocator on 64-bit.
This reduces bss on 64-bit by ~8Mb because we don't use FlatByteMap on 64-bits any more.
Dmitry, please check my understanding of atomics.
Reviewers: dvyukov
Reviewed By: dvyukov
CC: samsonov, llvm-commits
Differential Revision: http://llvm-reviews.chandlerc.com/D2259
llvm-svn: 195637
Summary:
Moved the requirement for SelectionDAG::getConstant() to return legally
typed nodes slightly earlier. There were two optional DAGCombine passes
that were missed out and were required to produce type-legal DAGs.
Simplified a code-path in tryFoldToZero() to use SelectionDAG::getConstant().
This provides support for both promoted and expanded vector types whereas the
previous code only supported promoted vector types.
Fixes a "Type for zero vector elements is not legal" assertion detected by
an llvm-stress generated test.
Reviewers: resistor
CC: llvm-commits
Differential Revision: http://llvm-reviews.chandlerc.com/D2251
llvm-svn: 195635
No functional changes intended. However, it seems to have found a buggy
behavior in one of the tests. I think this structure is generally
desirable and it will make a planned bugfix significantly easier.
llvm-svn: 195634
Rui Ueyama