Commit Graph

2120 Commits

Author SHA1 Message Date
Zoran Jovanovic 9d86e26e62 Fixed issue with microMIPS long branch.
llvm-svn: 195975
2013-11-30 19:12:28 +00:00
Daniel Sanders 7fd68d6018 [mips][msa] MSA loads and stores have a 10-bit offset. Account for this when lowering FrameIndex.
This prevents the compiler from emitting invalid ld.[bhwd]'s and st.[bhwd]'s
when the stack frame is between 512 and 32,768 bytes in size.

llvm-svn: 195973
2013-11-30 13:47:57 +00:00
Daniel Sanders 7153414768 [mips][msa] A small refactor to reduce patch noise in my next commit
No functional change. An if-statement has been split into two nested if-statements.

llvm-svn: 195972
2013-11-30 13:15:21 +00:00
Reed Kotler ad450f239f Part 1 of 3 patches that completes very long conditional branches
in constant islands for Mips16. We introdcuce JalB16 as a synomnym
for Jal16. It makes it easier to read and is also necessary because
Jal16 is a call instruction but JalB16 is being used as a branch.
Various parts of LLVM will not work properly even in this late stage of
the backend if we use what was declared as a call instruction to function
as a branch. For one, basic block labels may not get emitted in some
situations. 

llvm-svn: 195968
2013-11-29 22:32:56 +00:00
Zoran Jovanovic 1bc3cce040 Revert revision 195965.
llvm-svn: 195967
2013-11-29 22:10:02 +00:00
Zoran Jovanovic ff2a40ce4d Fixed issue with microMIPS long branch.
llvm-svn: 195965
2013-11-29 21:41:24 +00:00
NAKAMURA Takumi 226e10edff [CMake] Let add_public_tablegen_target() provide intrinsics_gen, too.
I think, in principle, intrinsics_gen may be added explicitly.
That said, it can be added incidentally, since each target already has dependencies to llvm-tblgen.
Almost all source files depend on both CommonTaleGen and intrinsics_gen.

Explicit add_dependencies() have been pruned under lib/Target.

llvm-svn: 195929
2013-11-28 17:04:31 +00:00
NAKAMURA Takumi ce746c6c49 [CMake] Let add_public_tablegen_target responsible to provide dependency to CommonTableGen.
add_public_tablegen_target adds *CommonTableGen to LLVM_COMMON_DEPENDS.
LLVM_COMMON_DEPENDS affects add_llvm_library (and other add_target stuff) within its scope.

llvm-svn: 195927
2013-11-28 17:04:04 +00:00
Daniel Sanders 063b74ad4e [mips] Revert test commit r195922.
llvm-svn: 195923
2013-11-28 15:26:33 +00:00
Daniel Sanders eb16443fca [mips] A test commit to test my Herald and Audit workflow
Will be reverted in the next commit

llvm-svn: 195922
2013-11-28 15:25:43 +00:00
NAKAMURA Takumi 413518f1f8 [CMake] Prune include_directories() in llvm/lib/Target. add_llvm_target() sets them.
llvm-svn: 195921
2013-11-28 14:53:30 +00:00
Reed Kotler 0d409e2dfe Check in conditional branches for constant islands. Still need to finish
conditional branches for very large targets. That will be the next small
patch. Everything now should in principle work as good (functionality
wise) as without constant islands so we decided at Mips/Imagination to
make constant islands the default for Mips16 now so that it will get
excercised a lot and this port is still experimentatl though hopefully soon
we will change the status. Some more cleanup and code review is in order
but things are converging fast.

llvm-svn: 195902
2013-11-28 00:56:37 +00:00
Akira Hatanaka f6109e4ad7 [mips] Redefine TAILCALL as a pseudo instruction.
No functionality change.

llvm-svn: 195896
2013-11-27 23:58:32 +00:00
Akira Hatanaka f9a0ec4fc4 Add MipsOptimizePICCall.cpp to CMakeLists.txt.
llvm-svn: 195894
2013-11-27 23:47:25 +00:00
Akira Hatanaka 168d4e5b20 [mips] Implement the following optimizations using dominance information to
make PIC calls a little more efficient:

1. Remove instructions setting up $gp if it is known that a function has been
   called at least once.
2. Save the address of a called function in a register instead of loading
   it from the GOT at every call site.

llvm-svn: 195892
2013-11-27 23:38:42 +00:00
Reed Kotler 3aeb1d0857 Fix a bug related to constant islands for Mips16 and mips16/32 dual mode.
The determination of when we are doing constant pools was being made too
early in the asm printer.

llvm-svn: 195781
2013-11-26 20:38:40 +00:00
Reed Kotler a787aa2b1e Make sure that for C++ emitting LwConstant32 pseudos, that it corresponds
to what is needed for constant islands. The prescan method for Mips16 constant
islands will eventually go away. It is only temporary and should be done
earlier when the instructions are first created or from the DAG. If we keep
it here we need to handle better the situation where constant islands
is called multiple times since don't want to prescan more than once.

llvm-svn: 195569
2013-11-24 06:18:50 +00:00
Reed Kotler d3b28ebe03 Fix a funny bug I introduced during conversion of ARM constant islands to Mips.
I had to move some code and I moved a declaration forward past it's first use
in the function but by nutty coincidence there was another variable of the same
name and type and  with completely unrelated function that was declared globally
in the class so no compilation error ensued.
It required some unusual conditions for it to even matter. Caused test
case casts.c in test-suite to fail during compilation with a duplicate 
symbol error. I would have noticed it during final code review for this port.

llvm-svn: 195565
2013-11-24 02:53:09 +00:00
Daniel Sanders d40aea8768 Fix typo in a comment added in r195455.
Credit to Matheus Almeida for spotting it.

llvm-svn: 195456
2013-11-22 13:22:52 +00:00
Daniel Sanders 630dbe0a14 [mips][msa] Fix corner case for integer constant splats with undef values.
lowerBUILD_VECTOR() was treating integer constant splats as being legal
regardless of whether they had undef values. This caused instruction
selection failures when the undefs were legalized to zero, making the
constant non-splat.

Fixed this by requiring HasAnyUndef to be false for a integer constant
splat to be legal. If it is true, a new node is generated with the undefs
replaced with the necessary values to remain a splat.

llvm-svn: 195455
2013-11-22 13:14:06 +00:00
Daniel Sanders fd8e416879 [mips][msa] Float vector constants cannot use ldi.[wd] directly. Bitcast from the appropriate integer vector type.
Fixes an instruction selection failure detected by llvm-stress.

llvm-svn: 195444
2013-11-22 11:24:50 +00:00
Daniel Sanders c8c50fb41f [mips][msa] Fix a corner case in performORCombine() when combining nodes into VSELECT.
Mask == ~InvMask asserts if the width of Mask and InvMask differ.
The combine isn't valid (with two exceptions, see below) if the widths differ
so test for this before testing Mask == ~InvMask.

In the specific cases of Mask=~0 and InvMask=0, as well as Mask=0 and
InvMask=~0, the combine is still valid. However, there are more appropriate
combines that could be used in these cases such as folding x & 0 to 0, or
x & ~0 to x.

llvm-svn: 195364
2013-11-21 16:11:31 +00:00
Daniel Sanders 6e664bcef3 [mips][msa/dsp] Only do DSP combines if DSP is enabled.
Fixes a crash (null pointer dereferenced) when MSA is enabled.

llvm-svn: 195343
2013-11-21 11:40:14 +00:00
Reed Kotler 2fc05be887 Add, to constant islands, long jumps similar to ARM far branch.
llvm-svn: 195312
2013-11-21 05:13:23 +00:00
Daniel Sanders f93e8152c4 [mips][msa] Pseudo instructions require HasMSA too. Inherit from MSAPseudo instead of MipsPseudo
There's no test case for this commit. This is because it is doubtful that the
incorrect behaviour can actually trigger. When MSA is not enabled, the type
legalizer should have eliminated all occurrences of patterns the affected
pseudo-instruction could possibly match before instruction selection occurs.

llvm-svn: 195252
2013-11-20 14:32:28 +00:00
Daniel Sanders 6b97d604ff [mips][msa] Remove unused instruction class MSA_I8_X_DESC_BASE
llvm-svn: 195245
2013-11-20 13:01:10 +00:00
Jack Carter 03af6d1456 long line correction
llvm-svn: 195175
2013-11-20 00:12:44 +00:00
Jack Carter 6ef6cc5c40 reverts 195057 per request
llvm-svn: 195152
2013-11-19 20:53:28 +00:00
Simon Atanasyan 1093afe27a [Mips] Adjust float ABI settings in case of MIPS16 mode.
Hard float for mips16 means essentially to compile as soft float but to
use a runtime library for soft float that is written with native mips32
floating point instructions (those runtime routines run in mips32 hard
float mode).

The patch reviewed by Reed Kotler.

llvm-svn: 195123
2013-11-19 12:20:17 +00:00
Eric Christopher 37776fb3a6 Remove unused special member functions and reformat.
llvm-svn: 195077
2013-11-19 02:01:07 +00:00
Eric Christopher 1192a8b428 Fix previous commit and fully remove variable.
llvm-svn: 195076
2013-11-19 01:52:38 +00:00
Eric Christopher ac81451e50 Remove unused variable.
llvm-svn: 195075
2013-11-19 01:50:29 +00:00
Jack Carter b9fd457a32 [Mips] Support for MicroMips STO refactoring.
No true functional changes.

Change the "hack" name of emitMipsHackSTOCG to emitSymSTO.

Remove demonstration code in AsmParser for emitMipsHackSTOCG and
emitMipsHackELFFlags. The STO field is in an ELF symbol and is not
an explicit directive. That said, we are missing the compliment call
in AsmParser and that will need to be addressed soon.

XFAIL dummy tests for emitMipsHackELFFlags and emitMipsHackELFFlags.
These will built out with following patches.

llvm-svn: 195067
2013-11-19 01:25:18 +00:00
Juergen Ributzka d12ccbd343 [weak vtables] Remove a bunch of weak vtables
This patch removes most of the trivial cases of weak vtables by pinning them to
a single object file. The memory leaks in this version have been fixed. Thanks
Alexey for pointing them out.

Differential Revision: http://llvm-reviews.chandlerc.com/D2068

Reviewed by Andy

llvm-svn: 195064
2013-11-19 00:57:56 +00:00
Jack Carter 86ac5c1b39 [Mips] MipsTargetStreamer refactoring.
No functionality changes.

llvm-svn: 195057
2013-11-18 23:55:27 +00:00
Daniel Sanders 08d3cd163d [mips] Fix 'ran out of registers' in MIPS32 with FP64 when generating code for (ConstantFP 0.0)
Fixed an inappropriate use of BuildPairF64 when compiling for MIPS32 with FP64
which resulted in an impossible constraint on the register allocation. It now
uses BuildPairF64_64.

llvm-svn: 195007
2013-11-18 13:12:43 +00:00
Matheus Almeida 50c6e82222 [mips][msa] Update encoding of bnz.v (typo).
Note that there's no hardware yet that relies on that encoding.

llvm-svn: 195006
2013-11-18 13:09:54 +00:00
Matheus Almeida 779c593708 [mips][msa] Fix immediate value of LSA instruction as it was being wrongly encoded.
The immediate field should be encoded as "imm - 1" as the CPU always adds one to that field.

llvm-svn: 195004
2013-11-18 12:32:49 +00:00
Alexey Samsonov 49109a279c Revert r194865 and r194874.
This change is incorrect. If you delete virtual destructor of both a base class
and a subclass, then the following code:
  Base *foo = new Child();
  delete foo;
will not cause the destructor for members of Child class. As a result, I observe
plently of memory leaks. Notable examples I investigated are:
ObjectBuffer and ObjectBufferStream, AttributeImpl and StringSAttributeImpl.

llvm-svn: 194997
2013-11-18 09:31:53 +00:00
Juergen Ributzka dbedae89b9 [weak vtables] Remove a bunch of weak vtables
This patch removes most of the trivial cases of weak vtables by pinning them to
a single object file.

Differential Revision: http://llvm-reviews.chandlerc.com/D2068

Reviewed by Andy

llvm-svn: 194865
2013-11-15 22:34:48 +00:00
Daniel Sanders 71ce0cab02 [mips][msa] lowerMSABitClear() should use SelectionDAG::getNOT() instead of using a long-winded equivalent.
Now that getConstant(-1, MVT::v2i64) works correctly on MIPS32 we can use
SelectionDAG::getNOT() to produce the bitmask.

llvm-svn: 194819
2013-11-15 16:02:04 +00:00
Daniel Sanders 50b8041066 Fix illegal DAG produced by SelectionDAG::getConstant() for v2i64 type
Summary:
When getConstant() is called for an expanded vector type, it is split into
multiple scalar constants which are then combined using appropriate build_vector
and bitcast operations.

In addition to the usual big/little endian differences, the case where the
element-order of the vector does not have the same endianness as the elements
themselves is also accounted for.  For example, for v4i32 on big-endian MIPS,
the byte-order of the vector is <3210,7654,BA98,FEDC>. For little-endian, it is
<0123,4567,89AB,CDEF>.
Handling this case turns out to be a nop since getConstant() returns a splatted
vector (so reversing the element order doesn't change the value)

This fixes a number of cases in MIPS MSA where calling getConstant() during
operation legalization introduces illegal types (e.g. to legalize v2i64 UNDEF
into a v2i64 BUILD_VECTOR of illegal i64 zeros). It should also handle bigger
differences between illegal and legal types such as legalizing v2i64 into v8i16.

lowerMSASplatImm() in the MIPS backend no longer needs to avoid calling
getConstant() so this function has been updated in the same patch.

For the sake of transparency, the steps I've taken since the review are:
* Added 'virtual' to isVectorEltOrderLittleEndian() as requested. This revealed
  that the MIPS tests were falsely passing because a polymorphic function was
  not actually polymorphic in the reviewed patch.
* Fixed the tests that were now failing. This involved deleting the code to
  handle the MIPS MSA element-order (which was previously doing an byte-order
  swap instead of an element-order swap). This left
  isVectorEltOrderLittleEndian() unused and it was deleted.
* Fixed build failures caused by rebasing beyond r194467-r194472. These build
  failures involved the bset, bneg, and bclr instructions added in these commits
  using lowerMSASplatImm() in a way that was no longer valid after this patch.
  Some of these were fixed by calling SelectionDAG::getConstant() instead,
  others were fixed by a new function getBuildVectorSplat() that provided the
  removed functionality of lowerMSASplatImm() in a more sensible way.

Reviewers: bkramer

Reviewed By: bkramer

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D1973

llvm-svn: 194811
2013-11-15 12:56:49 +00:00
Zoran Jovanovic f4d4d789f7 Use instr mapping for microMIPS in llvm-mc.
llvm-svn: 194792
2013-11-15 08:07:34 +00:00
Reed Kotler 09e59155ef Make all the conditional Mips 16 branches get initially set for the
short form. Constant islands will expand them if they are out of range.
Since there is not direct object emitter at this time, it does not
have any material affect because the assembler sorts this out. But we
need to know for the actual constant island work. We track the difference
by putting # 16 inst in the comments.

llvm-svn: 194766
2013-11-15 02:21:52 +00:00
Reed Kotler 4b7afe5523 Take care of long short branch immediate instructions for mips16 in
constant islands.

llvm-svn: 194630
2013-11-13 23:52:18 +00:00
Vladimir Medic e10c1125df Fix bug in .gpword directive parsing.
llvm-svn: 194570
2013-11-13 13:18:04 +00:00
Zoran Jovanovic ccb70caa13 Support for microMIPS trap instruction with immediate operands.
llvm-svn: 194569
2013-11-13 13:15:03 +00:00
Vladimir Medic 77ffd7af4d This patch fixes a bug in floating point operands parsing, when instruction alias uses default register operand.
llvm-svn: 194562
2013-11-13 09:48:53 +00:00
NAKAMURA Takumi 435f62a841 Mips16InstrInfo.cpp: Use <cctype> instead of <ctype.h>
Also, prune <stdlib.h>, seems stray.

llvm-svn: 194557
2013-11-13 06:27:53 +00:00
Reed Kotler 5c8ae09537 Allow the code which returns the length for inline assembler to know
specifically about the .space directive. This allows us to force large
blocks of code to appear in test cases for things like constant islands
without having to make giant test cases to force things like long 
branches to take effect.

llvm-svn: 194555
2013-11-13 04:37:52 +00:00